1
+ ; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
1
2
; RUN: llc -mtriple=x86_64-linux-gnu -stop-after=finalize-isel -o - %s | FileCheck --check-prefix=MIR %s
2
3
3
4
; Ensure that the scoped AA is attached on loads/stores lowered from mem ops.
10
11
; MIR-DAG: ![[SET0:[0-9]+]] = !{![[SCOPE0]]}
11
12
; MIR-DAG: ![[SET1:[0-9]+]] = !{![[SCOPE1]]}
12
13
13
- ; MIR-LABEL: name: test_memcpy
14
- ; MIR: %2:gr64 = MOV64rm %0, 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]])
15
- ; MIR-NEXT: %3:gr64 = MOV64rm %0, 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]])
16
- ; MIR-NEXT: MOV64mr %0, 1, $noreg, 8, $noreg, killed %3 :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]])
17
- ; MIR-NEXT: MOV64mr %0, 1, $noreg, 0, $noreg, killed %2 :: (store (s64) into %ir.p0, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]])
18
14
define i32 @test_memcpy (ptr nocapture %p , ptr nocapture readonly %q ) {
15
+ ; MIR-LABEL: name: test_memcpy
16
+ ; MIR: bb.0 (%ir-block.0):
17
+ ; MIR-NEXT: liveins: $rdi, $rsi
18
+ ; MIR-NEXT: {{ $}}
19
+ ; MIR-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rsi
20
+ ; MIR-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
21
+ ; MIR-NEXT: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope !0, !noalias !3)
22
+ ; MIR-NEXT: [[MOV64rm1:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 4, !alias.scope !0, !noalias !3)
23
+ ; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 8, $noreg, killed [[MOV64rm1]] :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope !0, !noalias !3)
24
+ ; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, killed [[MOV64rm]] :: (store (s64) into %ir.p0, align 4, !alias.scope !0, !noalias !3)
25
+ ; MIR-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope !3, !noalias !0)
26
+ ; MIR-NEXT: [[ADD32rm:%[0-9]+]]:gr32 = ADD32rm [[MOV32rm]], [[COPY]], 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope !3, !noalias !0)
27
+ ; MIR-NEXT: $eax = COPY [[ADD32rm]]
28
+ ; MIR-NEXT: RET 0, $eax
19
29
%p0 = bitcast ptr %p to ptr
20
30
%add.ptr = getelementptr inbounds i32 , ptr %p , i64 4
21
31
%p1 = bitcast ptr %add.ptr to ptr
@@ -27,12 +37,21 @@ define i32 @test_memcpy(ptr nocapture %p, ptr nocapture readonly %q) {
27
37
ret i32 %add
28
38
}
29
39
30
- ; MIR-LABEL: name: test_memcpy_inline
31
- ; MIR: %2:gr64 = MOV64rm %0, 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]])
32
- ; MIR-NEXT: %3:gr64 = MOV64rm %0, 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]])
33
- ; MIR-NEXT: MOV64mr %0, 1, $noreg, 8, $noreg, killed %3 :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]])
34
- ; MIR-NEXT: MOV64mr %0, 1, $noreg, 0, $noreg, killed %2 :: (store (s64) into %ir.p0, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]])
35
40
define i32 @test_memcpy_inline (ptr nocapture %p , ptr nocapture readonly %q ) {
41
+ ; MIR-LABEL: name: test_memcpy_inline
42
+ ; MIR: bb.0 (%ir-block.0):
43
+ ; MIR-NEXT: liveins: $rdi, $rsi
44
+ ; MIR-NEXT: {{ $}}
45
+ ; MIR-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rsi
46
+ ; MIR-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
47
+ ; MIR-NEXT: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope !0, !noalias !3)
48
+ ; MIR-NEXT: [[MOV64rm1:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 4, !alias.scope !0, !noalias !3)
49
+ ; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 8, $noreg, killed [[MOV64rm1]] :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope !0, !noalias !3)
50
+ ; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, killed [[MOV64rm]] :: (store (s64) into %ir.p0, align 4, !alias.scope !0, !noalias !3)
51
+ ; MIR-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope !3, !noalias !0)
52
+ ; MIR-NEXT: [[ADD32rm:%[0-9]+]]:gr32 = ADD32rm [[MOV32rm]], [[COPY]], 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope !3, !noalias !0)
53
+ ; MIR-NEXT: $eax = COPY [[ADD32rm]]
54
+ ; MIR-NEXT: RET 0, $eax
36
55
%p0 = bitcast ptr %p to ptr
37
56
%add.ptr = getelementptr inbounds i32 , ptr %p , i64 4
38
57
%p1 = bitcast ptr %add.ptr to ptr
@@ -44,12 +63,21 @@ define i32 @test_memcpy_inline(ptr nocapture %p, ptr nocapture readonly %q) {
44
63
ret i32 %add
45
64
}
46
65
47
- ; MIR-LABEL: name: test_memmove
48
- ; MIR: %2:gr64 = MOV64rm %0, 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]])
49
- ; MIR-NEXT: %3:gr64 = MOV64rm %0, 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]])
50
- ; MIR-NEXT: MOV64mr %0, 1, $noreg, 0, $noreg, killed %2 :: (store (s64) into %ir.p0, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]])
51
- ; MIR-NEXT: MOV64mr %0, 1, $noreg, 8, $noreg, killed %3 :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]])
52
66
define i32 @test_memmove (ptr nocapture %p , ptr nocapture readonly %q ) {
67
+ ; MIR-LABEL: name: test_memmove
68
+ ; MIR: bb.0 (%ir-block.0):
69
+ ; MIR-NEXT: liveins: $rdi, $rsi
70
+ ; MIR-NEXT: {{ $}}
71
+ ; MIR-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rsi
72
+ ; MIR-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
73
+ ; MIR-NEXT: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope !0, !noalias !3)
74
+ ; MIR-NEXT: [[MOV64rm1:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 4, !alias.scope !0, !noalias !3)
75
+ ; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, killed [[MOV64rm]] :: (store (s64) into %ir.p0, align 4, !alias.scope !0, !noalias !3)
76
+ ; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 8, $noreg, killed [[MOV64rm1]] :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope !0, !noalias !3)
77
+ ; MIR-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope !3, !noalias !0)
78
+ ; MIR-NEXT: [[ADD32rm:%[0-9]+]]:gr32 = ADD32rm [[MOV32rm]], [[COPY]], 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope !3, !noalias !0)
79
+ ; MIR-NEXT: $eax = COPY [[ADD32rm]]
80
+ ; MIR-NEXT: RET 0, $eax
53
81
%p0 = bitcast ptr %p to ptr
54
82
%add.ptr = getelementptr inbounds i32 , ptr %p , i64 4
55
83
%p1 = bitcast ptr %add.ptr to ptr
@@ -61,11 +89,20 @@ define i32 @test_memmove(ptr nocapture %p, ptr nocapture readonly %q) {
61
89
ret i32 %add
62
90
}
63
91
64
- ; MIR-LABEL: name: test_memset
65
- ; MIR: %2:gr64 = MOV64ri -6148914691236517206
66
- ; MIR-NEXT: MOV64mr %0, 1, $noreg, 8, $noreg, %2 :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]])
67
- ; MIR-NEXT: MOV64mr %0, 1, $noreg, 0, $noreg, %2 :: (store (s64) into %ir.p0, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]])
68
92
define i32 @test_memset (ptr nocapture %p , ptr nocapture readonly %q ) {
93
+ ; MIR-LABEL: name: test_memset
94
+ ; MIR: bb.0 (%ir-block.0):
95
+ ; MIR-NEXT: liveins: $rdi, $rsi
96
+ ; MIR-NEXT: {{ $}}
97
+ ; MIR-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rsi
98
+ ; MIR-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
99
+ ; MIR-NEXT: [[MOV64ri:%[0-9]+]]:gr64 = MOV64ri -6148914691236517206
100
+ ; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 8, $noreg, [[MOV64ri]] :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope !0, !noalias !3)
101
+ ; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, [[MOV64ri]] :: (store (s64) into %ir.p0, align 4, !alias.scope !0, !noalias !3)
102
+ ; MIR-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope !3, !noalias !0)
103
+ ; MIR-NEXT: [[ADD32rm:%[0-9]+]]:gr32 = ADD32rm [[MOV32rm]], [[COPY]], 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope !3, !noalias !0)
104
+ ; MIR-NEXT: $eax = COPY [[ADD32rm]]
105
+ ; MIR-NEXT: RET 0, $eax
69
106
%p0 = bitcast ptr %p to ptr
70
107
tail call void @llvm.memset.p0.i64 (ptr noundef nonnull align 4 dereferenceable (16 ) %p0 , i8 170 , i64 16 , i1 false ), !alias.scope !2 , !noalias !4
71
108
%v0 = load i32 , ptr %q , align 4 , !alias.scope !4 , !noalias !2
@@ -75,12 +112,21 @@ define i32 @test_memset(ptr nocapture %p, ptr nocapture readonly %q) {
75
112
ret i32 %add
76
113
}
77
114
78
- ; MIR-LABEL: name: test_mempcpy
79
- ; MIR: %2:gr64 = MOV64rm %0, 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 1, !alias.scope ![[SET0]], !noalias ![[SET1]])
80
- ; MIR-NEXT: %3:gr64 = MOV64rm %0, 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 1, !alias.scope ![[SET0]], !noalias ![[SET1]])
81
- ; MIR-NEXT: MOV64mr %0, 1, $noreg, 8, $noreg, killed %3 :: (store (s64) into %ir.p0 + 8, align 1, !alias.scope ![[SET0]], !noalias ![[SET1]])
82
- ; MIR-NEXT: MOV64mr %0, 1, $noreg, 0, $noreg, killed %2 :: (store (s64) into %ir.p0, align 1, !alias.scope ![[SET0]], !noalias ![[SET1]])
83
115
define i32 @test_mempcpy (ptr nocapture %p , ptr nocapture readonly %q ) {
116
+ ; MIR-LABEL: name: test_mempcpy
117
+ ; MIR: bb.0 (%ir-block.0):
118
+ ; MIR-NEXT: liveins: $rdi, $rsi
119
+ ; MIR-NEXT: {{ $}}
120
+ ; MIR-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rsi
121
+ ; MIR-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
122
+ ; MIR-NEXT: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 1, !alias.scope !0, !noalias !3)
123
+ ; MIR-NEXT: [[MOV64rm1:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 1, !alias.scope !0, !noalias !3)
124
+ ; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 8, $noreg, killed [[MOV64rm1]] :: (store (s64) into %ir.p0 + 8, align 1, !alias.scope !0, !noalias !3)
125
+ ; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, killed [[MOV64rm]] :: (store (s64) into %ir.p0, align 1, !alias.scope !0, !noalias !3)
126
+ ; MIR-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope !3, !noalias !0)
127
+ ; MIR-NEXT: [[ADD32rm:%[0-9]+]]:gr32 = ADD32rm [[MOV32rm]], [[COPY]], 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope !3, !noalias !0)
128
+ ; MIR-NEXT: $eax = COPY [[ADD32rm]]
129
+ ; MIR-NEXT: RET 0, $eax
84
130
%p0 = bitcast ptr %p to ptr
85
131
%add.ptr = getelementptr inbounds i32 , ptr %p , i64 4
86
132
%p1 = bitcast ptr %add.ptr to ptr
0 commit comments