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2 files changed

+34
-49
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‎llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3666,7 +3666,8 @@ bool AMDGPUDAGToDAGISel::SelectVOP3PMadMixModsImpl(SDValue In, SDValue &Src,
36663666
}
36673667

36683668
// Prevent unnecessary subreg COPY to VGPR_16
3669-
if (Subtarget->useRealTrue16Insts() && Src.getOpcode() == ISD::TRUNCATE) {
3669+
if (Src.getOpcode() == ISD::TRUNCATE &&
3670+
Src.getOperand(0).getValueType().getSizeInBits() == 32) {
36703671
Src = Src.getOperand(0);
36713672
}
36723673
return true;

‎llvm/test/CodeGen/AMDGPU/mad-mix.ll

Lines changed: 32 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -207,21 +207,21 @@ define <2 x float> @v_mad_mix_v2f32(<2 x half> %src0, <2 x half> %src1, <2 x hal
207207
; GFX1100-NEXT: v_mov_b32_e32 v0, v3
208208
; GFX1100-NEXT: s_setpc_b64 s[30:31]
209209
;
210-
; SDAG-GFX900-LABEL: v_mad_mix_v2f32:
211-
; SDAG-GFX900: ; %bb.0:
212-
; SDAG-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
213-
; SDAG-GFX900-NEXT: v_mad_mix_f32 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]
214-
; SDAG-GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,1]
215-
; SDAG-GFX900-NEXT: v_mov_b32_e32 v1, v3
216-
; SDAG-GFX900-NEXT: s_setpc_b64 s[30:31]
210+
; GFX900-LABEL: v_mad_mix_v2f32:
211+
; GFX900: ; %bb.0:
212+
; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
213+
; GFX900-NEXT: v_mad_mix_f32 v3, v0, v1, v2 op_sel_hi:[1,1,1]
214+
; GFX900-NEXT: v_mad_mix_f32 v1, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]
215+
; GFX900-NEXT: v_mov_b32_e32 v0, v3
216+
; GFX900-NEXT: s_setpc_b64 s[30:31]
217217
;
218-
; SDAG-GFX906-LABEL: v_mad_mix_v2f32:
219-
; SDAG-GFX906: ; %bb.0:
220-
; SDAG-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
221-
; SDAG-GFX906-NEXT: v_fma_mix_f32 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]
222-
; SDAG-GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,1]
223-
; SDAG-GFX906-NEXT: v_mov_b32_e32 v1, v3
224-
; SDAG-GFX906-NEXT: s_setpc_b64 s[30:31]
218+
; GFX906-LABEL: v_mad_mix_v2f32:
219+
; GFX906: ; %bb.0:
220+
; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
221+
; GFX906-NEXT: v_fma_mix_f32 v3, v0, v1, v2 op_sel_hi:[1,1,1]
222+
; GFX906-NEXT: v_fma_mix_f32 v1, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]
223+
; GFX906-NEXT: v_mov_b32_e32 v0, v3
224+
; GFX906-NEXT: s_setpc_b64 s[30:31]
225225
;
226226
; SDAG-GFX9GEN-LABEL: v_mad_mix_v2f32:
227227
; SDAG-GFX9GEN: ; %bb.0:
@@ -269,22 +269,6 @@ define <2 x float> @v_mad_mix_v2f32(<2 x half> %src0, <2 x half> %src1, <2 x hal
269269
; SDAG-CI-NEXT: v_mac_f32_e32 v0, v4, v2
270270
; SDAG-CI-NEXT: s_setpc_b64 s[30:31]
271271
;
272-
; GISEL-GFX900-LABEL: v_mad_mix_v2f32:
273-
; GISEL-GFX900: ; %bb.0:
274-
; GISEL-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
275-
; GISEL-GFX900-NEXT: v_mad_mix_f32 v3, v0, v1, v2 op_sel_hi:[1,1,1]
276-
; GISEL-GFX900-NEXT: v_mad_mix_f32 v1, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]
277-
; GISEL-GFX900-NEXT: v_mov_b32_e32 v0, v3
278-
; GISEL-GFX900-NEXT: s_setpc_b64 s[30:31]
279-
;
280-
; GISEL-GFX906-LABEL: v_mad_mix_v2f32:
281-
; GISEL-GFX906: ; %bb.0:
282-
; GISEL-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
283-
; GISEL-GFX906-NEXT: v_fma_mix_f32 v3, v0, v1, v2 op_sel_hi:[1,1,1]
284-
; GISEL-GFX906-NEXT: v_fma_mix_f32 v1, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]
285-
; GISEL-GFX906-NEXT: v_mov_b32_e32 v0, v3
286-
; GISEL-GFX906-NEXT: s_setpc_b64 s[30:31]
287-
;
288272
; GISEL-GFX9GEN-LABEL: v_mad_mix_v2f32:
289273
; GISEL-GFX9GEN: ; %bb.0:
290274
; GISEL-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -1221,18 +1205,18 @@ define <2 x float> @v_mad_mix_v2f32_f32imm1(<2 x half> %src0, <2 x half> %src1)
12211205
; SDAG-GFX900: ; %bb.0:
12221206
; SDAG-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12231207
; SDAG-GFX900-NEXT: s_mov_b32 s4, 1.0
1224-
; SDAG-GFX900-NEXT: v_mad_mix_f32 v2, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1225-
; SDAG-GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]
1226-
; SDAG-GFX900-NEXT: v_mov_b32_e32 v1, v2
1208+
; SDAG-GFX900-NEXT: v_mad_mix_f32 v2, v0, v1, s4 op_sel_hi:[1,1,0]
1209+
; SDAG-GFX900-NEXT: v_mad_mix_f32 v1, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1210+
; SDAG-GFX900-NEXT: v_mov_b32_e32 v0, v2
12271211
; SDAG-GFX900-NEXT: s_setpc_b64 s[30:31]
12281212
;
12291213
; SDAG-GFX906-LABEL: v_mad_mix_v2f32_f32imm1:
12301214
; SDAG-GFX906: ; %bb.0:
12311215
; SDAG-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12321216
; SDAG-GFX906-NEXT: s_mov_b32 s4, 1.0
1233-
; SDAG-GFX906-NEXT: v_fma_mix_f32 v2, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1234-
; SDAG-GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]
1235-
; SDAG-GFX906-NEXT: v_mov_b32_e32 v1, v2
1217+
; SDAG-GFX906-NEXT: v_fma_mix_f32 v2, v0, v1, s4 op_sel_hi:[1,1,0]
1218+
; SDAG-GFX906-NEXT: v_fma_mix_f32 v1, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1219+
; SDAG-GFX906-NEXT: v_mov_b32_e32 v0, v2
12361220
; SDAG-GFX906-NEXT: s_setpc_b64 s[30:31]
12371221
;
12381222
; SDAG-GFX9GEN-LABEL: v_mad_mix_v2f32_f32imm1:
@@ -1353,18 +1337,18 @@ define <2 x float> @v_mad_mix_v2f32_cvtf16imminv2pi(<2 x half> %src0, <2 x half>
13531337
; SDAG-GFX900: ; %bb.0:
13541338
; SDAG-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
13551339
; SDAG-GFX900-NEXT: s_mov_b32 s4, 0x3e230000
1356-
; SDAG-GFX900-NEXT: v_mad_mix_f32 v2, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1357-
; SDAG-GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]
1358-
; SDAG-GFX900-NEXT: v_mov_b32_e32 v1, v2
1340+
; SDAG-GFX900-NEXT: v_mad_mix_f32 v2, v0, v1, s4 op_sel_hi:[1,1,0]
1341+
; SDAG-GFX900-NEXT: v_mad_mix_f32 v1, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1342+
; SDAG-GFX900-NEXT: v_mov_b32_e32 v0, v2
13591343
; SDAG-GFX900-NEXT: s_setpc_b64 s[30:31]
13601344
;
13611345
; SDAG-GFX906-LABEL: v_mad_mix_v2f32_cvtf16imminv2pi:
13621346
; SDAG-GFX906: ; %bb.0:
13631347
; SDAG-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
13641348
; SDAG-GFX906-NEXT: s_mov_b32 s4, 0x3e230000
1365-
; SDAG-GFX906-NEXT: v_fma_mix_f32 v2, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1366-
; SDAG-GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]
1367-
; SDAG-GFX906-NEXT: v_mov_b32_e32 v1, v2
1349+
; SDAG-GFX906-NEXT: v_fma_mix_f32 v2, v0, v1, s4 op_sel_hi:[1,1,0]
1350+
; SDAG-GFX906-NEXT: v_fma_mix_f32 v1, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1351+
; SDAG-GFX906-NEXT: v_mov_b32_e32 v0, v2
13681352
; SDAG-GFX906-NEXT: s_setpc_b64 s[30:31]
13691353
;
13701354
; SDAG-GFX9GEN-LABEL: v_mad_mix_v2f32_cvtf16imminv2pi:
@@ -1492,18 +1476,18 @@ define <2 x float> @v_mad_mix_v2f32_f32imminv2pi(<2 x half> %src0, <2 x half> %s
14921476
; SDAG-GFX900: ; %bb.0:
14931477
; SDAG-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
14941478
; SDAG-GFX900-NEXT: s_mov_b32 s4, 0.15915494
1495-
; SDAG-GFX900-NEXT: v_mad_mix_f32 v2, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1496-
; SDAG-GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]
1497-
; SDAG-GFX900-NEXT: v_mov_b32_e32 v1, v2
1479+
; SDAG-GFX900-NEXT: v_mad_mix_f32 v2, v0, v1, s4 op_sel_hi:[1,1,0]
1480+
; SDAG-GFX900-NEXT: v_mad_mix_f32 v1, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1481+
; SDAG-GFX900-NEXT: v_mov_b32_e32 v0, v2
14981482
; SDAG-GFX900-NEXT: s_setpc_b64 s[30:31]
14991483
;
15001484
; SDAG-GFX906-LABEL: v_mad_mix_v2f32_f32imminv2pi:
15011485
; SDAG-GFX906: ; %bb.0:
15021486
; SDAG-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
15031487
; SDAG-GFX906-NEXT: s_mov_b32 s4, 0.15915494
1504-
; SDAG-GFX906-NEXT: v_fma_mix_f32 v2, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1505-
; SDAG-GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]
1506-
; SDAG-GFX906-NEXT: v_mov_b32_e32 v1, v2
1488+
; SDAG-GFX906-NEXT: v_fma_mix_f32 v2, v0, v1, s4 op_sel_hi:[1,1,0]
1489+
; SDAG-GFX906-NEXT: v_fma_mix_f32 v1, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1490+
; SDAG-GFX906-NEXT: v_mov_b32_e32 v0, v2
15071491
; SDAG-GFX906-NEXT: s_setpc_b64 s[30:31]
15081492
;
15091493
; SDAG-GFX9GEN-LABEL: v_mad_mix_v2f32_f32imminv2pi:

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