|
| 1 | +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| 2 | +# RUN: llc -run-pass=aarch64-mi-peephole-opt -o - -mtriple=aarch64-unknown-linux -verify-machineinstrs %s | FileCheck %s |
| 3 | + |
| 4 | +--- |
| 5 | +name: remove_kill_flags |
| 6 | +tracksRegLiveness: true |
| 7 | +body: | |
| 8 | + bb.0.entry: |
| 9 | + liveins: $w0 |
| 10 | + ; CHECK-LABEL: name: remove_kill_flags |
| 11 | + ; CHECK: liveins: $w0 |
| 12 | + ; CHECK-NEXT: {{ $}} |
| 13 | + ; CHECK-NEXT: [[MOVIv2d_ns:%[0-9]+]]:fpr128 = MOVIv2d_ns 0 |
| 14 | + ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY [[MOVIv2d_ns]].dsub |
| 15 | + ; CHECK-NEXT: [[UQSHLv8i8_shift:%[0-9]+]]:fpr64 = UQSHLv8i8_shift killed [[COPY]], 1 |
| 16 | + ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:fpr128 = SUBREG_TO_REG 0, [[UQSHLv8i8_shift]], %subreg.dsub |
| 17 | + ; CHECK-NEXT: [[TBLv8i8One:%[0-9]+]]:fpr64 = TBLv8i8One killed [[SUBREG_TO_REG]], [[UQSHLv8i8_shift]] |
| 18 | + ; CHECK-NEXT: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF |
| 19 | + ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[UQSHLv8i8_shift]], %subreg.dsub |
| 20 | + ; CHECK-NEXT: RET_ReallyLR implicit $w0 |
| 21 | + %0:fpr128 = MOVIv2d_ns 0 |
| 22 | + %1:fpr64 = COPY %0.dsub:fpr128 |
| 23 | + %2:fpr64 = UQSHLv8i8_shift killed %1:fpr64, 1 |
| 24 | + %3:fpr64 = FMOVDr %2:fpr64 |
| 25 | + %4:fpr128 = SUBREG_TO_REG 0, killed %3:fpr64, %subreg.dsub |
| 26 | + %5:fpr64 = TBLv8i8One killed %4:fpr128, %2:fpr64 |
| 27 | + %7:fpr128 = IMPLICIT_DEF |
| 28 | + %6:fpr128 = INSERT_SUBREG %7:fpr128, killed %2:fpr64, %subreg.dsub |
| 29 | + RET_ReallyLR implicit $w0 |
| 30 | +... |
| 31 | +--- |
| 32 | +name: remove_kill_flags2 |
| 33 | +tracksRegLiveness: true |
| 34 | +body: | |
| 35 | + bb.0.entry: |
| 36 | + liveins: $w0 |
| 37 | + ; CHECK-LABEL: name: remove_kill_flags2 |
| 38 | + ; CHECK: liveins: $w0 |
| 39 | + ; CHECK-NEXT: {{ $}} |
| 40 | + ; CHECK-NEXT: [[MOVIv2d_ns:%[0-9]+]]:fpr128 = MOVIv2d_ns 0 |
| 41 | + ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY [[MOVIv2d_ns]].dsub |
| 42 | + ; CHECK-NEXT: [[UQSHLv8i8_shift:%[0-9]+]]:fpr64 = UQSHLv8i8_shift killed [[COPY]], 1 |
| 43 | + ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:fpr128 = SUBREG_TO_REG 0, [[UQSHLv8i8_shift]], %subreg.dsub |
| 44 | + ; CHECK-NEXT: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF |
| 45 | + ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[UQSHLv8i8_shift]], %subreg.dsub |
| 46 | + ; CHECK-NEXT: [[DEF1:%[0-9]+]]:fpr128 = IMPLICIT_DEF |
| 47 | + ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF1]], [[UQSHLv8i8_shift]], %subreg.dsub |
| 48 | + ; CHECK-NEXT: RET_ReallyLR implicit $w0 |
| 49 | + %0:fpr128 = MOVIv2d_ns 0 |
| 50 | + %1:fpr64 = COPY %0.dsub:fpr128 |
| 51 | + %2:fpr64 = UQSHLv8i8_shift killed %1:fpr64, 1 |
| 52 | + %3:fpr64 = FMOVDr %2:fpr64 |
| 53 | + %4:fpr128 = SUBREG_TO_REG 0, %3:fpr64, %subreg.dsub |
| 54 | + %7:fpr128 = IMPLICIT_DEF |
| 55 | + %6:fpr128 = INSERT_SUBREG %7:fpr128, killed %2:fpr64, %subreg.dsub |
| 56 | + %9:fpr128 = IMPLICIT_DEF |
| 57 | + %8:fpr128 = INSERT_SUBREG %9:fpr128, killed %3:fpr64, %subreg.dsub |
| 58 | + RET_ReallyLR implicit $w0 |
| 59 | +... |
| 60 | + |
0 commit comments