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LuoYuankeLuoYuanke
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[X86][AMX] Replace PXOR instruction with SET0 in AMX pre config.
To generate zero value, the PXOR instruction need 3 operands that is tied to the same vreg. If is not good in SSA form and with undef value two address instruction pass may convert `%0:vr128 = PXORrr undef %0, undef %0` to `%1:vr128 = PXORrr undef %1:vr128(tied-def 0), undef %0:vr128`. It is not expected. It can be simplified to SET0 instruction which only take 1 destination operand. It should be more friendly to two address instruction pass and register allocation pass. `%0:vr128 = V_SET0` Also add AVX1 code path so that it is consistant to other code. Differential Revision: https://reviews.llvm.org/D124903
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9 files changed

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‎llvm/lib/Target/X86/X86PreTileConfig.cpp

Lines changed: 8 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -380,33 +380,27 @@ bool X86PreTileConfig::runOnMachineFunction(MachineFunction &MF) {
380380
MachineInstr *MI = &*MBB.begin();
381381
if (ST.hasAVX512()) {
382382
Register Zmm = MRI->createVirtualRegister(&X86::VR512RegClass);
383-
BuildMI(MBB, MI, DL, TII->get(X86::VPXORDZrr), Zmm)
384-
.addReg(Zmm, RegState::Undef)
385-
.addReg(Zmm, RegState::Undef);
383+
BuildMI(MBB, MI, DL, TII->get(X86::AVX512_512_SET0), Zmm);
386384
addFrameReference(BuildMI(MBB, MI, DL, TII->get(X86::VMOVUPSZmr)), SS)
387385
.addReg(Zmm);
388386
} else if (ST.hasAVX2()) {
389387
Register Ymm = MRI->createVirtualRegister(&X86::VR256RegClass);
390-
BuildMI(MBB, MI, DL, TII->get(X86::VPXORYrr), Ymm)
391-
.addReg(Ymm, RegState::Undef)
392-
.addReg(Ymm, RegState::Undef);
388+
BuildMI(MBB, MI, DL, TII->get(X86::AVX_SET0), Ymm);
393389
addFrameReference(BuildMI(MBB, MI, DL, TII->get(X86::VMOVUPSYmr)), SS)
394390
.addReg(Ymm);
395391
addFrameReference(BuildMI(MBB, MI, DL, TII->get(X86::VMOVUPSYmr)), SS, 32)
396392
.addReg(Ymm);
397393
} else {
398394
assert(ST.hasSSE2() && "AMX should assume SSE2 enabled");
395+
unsigned StoreOpc = ST.hasAVX() ? X86::VMOVUPSmr : X86::MOVUPSmr;
399396
Register Xmm = MRI->createVirtualRegister(&X86::VR128RegClass);
400-
BuildMI(MBB, MI, DL, TII->get(X86::PXORrr), Xmm)
401-
.addReg(Xmm, RegState::Undef)
402-
.addReg(Xmm, RegState::Undef);
403-
addFrameReference(BuildMI(MBB, MI, DL, TII->get(X86::MOVUPSmr)), SS)
397+
BuildMI(MBB, MI, DL, TII->get(X86::V_SET0), Xmm);
398+
addFrameReference(BuildMI(MBB, MI, DL, TII->get(StoreOpc)), SS).addReg(Xmm);
399+
addFrameReference(BuildMI(MBB, MI, DL, TII->get(StoreOpc)), SS, 16)
404400
.addReg(Xmm);
405-
addFrameReference(BuildMI(MBB, MI, DL, TII->get(X86::MOVUPSmr)), SS, 16)
401+
addFrameReference(BuildMI(MBB, MI, DL, TII->get(StoreOpc)), SS, 32)
406402
.addReg(Xmm);
407-
addFrameReference(BuildMI(MBB, MI, DL, TII->get(X86::MOVUPSmr)), SS, 32)
408-
.addReg(Xmm);
409-
addFrameReference(BuildMI(MBB, MI, DL, TII->get(X86::MOVUPSmr)), SS, 48)
403+
addFrameReference(BuildMI(MBB, MI, DL, TII->get(StoreOpc)), SS, 48)
410404
.addReg(Xmm);
411405
}
412406
// Fill in the palette first.

‎llvm/test/CodeGen/X86/AMX/amx-across-func.ll

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -26,8 +26,8 @@ define dso_local void @test_api(i16 signext %0, i16 signext %1) nounwind {
2626
; CHECK-NEXT: subq $2120, %rsp # imm = 0x848
2727
; CHECK-NEXT: movl %esi, %ebx
2828
; CHECK-NEXT: movl %edi, %ebp
29-
; CHECK-NEXT: vpxord %zmm0, %zmm0, %zmm0
30-
; CHECK-NEXT: vmovdqu64 %zmm0, (%rsp)
29+
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
30+
; CHECK-NEXT: vmovups %zmm0, (%rsp)
3131
; CHECK-NEXT: movb $1, (%rsp)
3232
; CHECK-NEXT: movw $8, {{[0-9]+}}(%rsp)
3333
; CHECK-NEXT: movb $8, {{[0-9]+}}(%rsp)
@@ -68,8 +68,8 @@ define dso_local void @test_api(i16 signext %0, i16 signext %1) nounwind {
6868
; IPRA-LABEL: test_api:
6969
; IPRA: # %bb.0:
7070
; IPRA-NEXT: subq $72, %rsp
71-
; IPRA-NEXT: vpxord %zmm0, %zmm0, %zmm0
72-
; IPRA-NEXT: vmovdqu64 %zmm0, {{[0-9]+}}(%rsp)
71+
; IPRA-NEXT: vxorps %xmm0, %xmm0, %xmm0
72+
; IPRA-NEXT: vmovups %zmm0, {{[0-9]+}}(%rsp)
7373
; IPRA-NEXT: movb $1, {{[0-9]+}}(%rsp)
7474
; IPRA-NEXT: movw $8, {{[0-9]+}}(%rsp)
7575
; IPRA-NEXT: movb $8, {{[0-9]+}}(%rsp)
@@ -113,8 +113,8 @@ define dso_local i32 @test_loop(i32 %0) nounwind {
113113
; CHECK-NEXT: pushq %rbx
114114
; CHECK-NEXT: subq $1096, %rsp # imm = 0x448
115115
; CHECK-NEXT: movl %edi, %r14d
116-
; CHECK-NEXT: vpxord %zmm0, %zmm0, %zmm0
117-
; CHECK-NEXT: vmovdqu64 %zmm0, (%rsp)
116+
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
117+
; CHECK-NEXT: vmovups %zmm0, (%rsp)
118118
; CHECK-NEXT: movb $1, (%rsp)
119119
; CHECK-NEXT: movb $8, {{[0-9]+}}(%rsp)
120120
; CHECK-NEXT: movw $8, {{[0-9]+}}(%rsp)
@@ -179,8 +179,8 @@ define dso_local i32 @test_loop(i32 %0) nounwind {
179179
; IPRA: # %bb.0:
180180
; IPRA-NEXT: subq $72, %rsp
181181
; IPRA-NEXT: movl %edi, %eax
182-
; IPRA-NEXT: vpxord %zmm0, %zmm0, %zmm0
183-
; IPRA-NEXT: vmovdqu64 %zmm0, {{[0-9]+}}(%rsp)
182+
; IPRA-NEXT: vxorps %xmm0, %xmm0, %xmm0
183+
; IPRA-NEXT: vmovups %zmm0, {{[0-9]+}}(%rsp)
184184
; IPRA-NEXT: movb $1, {{[0-9]+}}(%rsp)
185185
; IPRA-NEXT: movb $8, {{[0-9]+}}(%rsp)
186186
; IPRA-NEXT: movw $8, {{[0-9]+}}(%rsp)
@@ -272,8 +272,8 @@ define dso_local void @test_loop2(i32 %0) nounwind {
272272
; CHECK-NEXT: pushq %rbx
273273
; CHECK-NEXT: subq $1088, %rsp # imm = 0x440
274274
; CHECK-NEXT: movl %edi, %ebx
275-
; CHECK-NEXT: vpxord %zmm0, %zmm0, %zmm0
276-
; CHECK-NEXT: vmovdqu64 %zmm0, (%rsp)
275+
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
276+
; CHECK-NEXT: vmovups %zmm0, (%rsp)
277277
; CHECK-NEXT: movb $1, (%rsp)
278278
; CHECK-NEXT: movb $8, {{[0-9]+}}(%rsp)
279279
; CHECK-NEXT: movw $8, {{[0-9]+}}(%rsp)
@@ -312,8 +312,8 @@ define dso_local void @test_loop2(i32 %0) nounwind {
312312
; IPRA-LABEL: test_loop2:
313313
; IPRA: # %bb.0:
314314
; IPRA-NEXT: subq $72, %rsp
315-
; IPRA-NEXT: vpxord %zmm0, %zmm0, %zmm0
316-
; IPRA-NEXT: vmovdqu64 %zmm0, {{[0-9]+}}(%rsp)
315+
; IPRA-NEXT: vxorps %xmm0, %xmm0, %xmm0
316+
; IPRA-NEXT: vmovups %zmm0, {{[0-9]+}}(%rsp)
317317
; IPRA-NEXT: movb $1, {{[0-9]+}}(%rsp)
318318
; IPRA-NEXT: movb $8, {{[0-9]+}}(%rsp)
319319
; IPRA-NEXT: movw $8, {{[0-9]+}}(%rsp)

‎llvm/test/CodeGen/X86/AMX/amx-config.ll

Lines changed: 50 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -1,17 +1,18 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck %s --check-prefix=AVX512
3-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx2 -verify-machineinstrs | FileCheck %s --check-prefix=AVX2
2+
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8,+avx512f -verify-machineinstrs | FileCheck %s --check-prefix=AVX512
3+
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8,+avx2 -verify-machineinstrs | FileCheck %s --check-prefix=AVX2
4+
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8,+avx -verify-machineinstrs | FileCheck %s --check-prefix=AVX1
45
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -verify-machineinstrs | FileCheck %s --check-prefix=SSE2
56

67
@buf = dso_local global [1024 x i8] zeroinitializer, align 64
78
@buf2 = dso_local global [1024 x i8] zeroinitializer, align 64
89

910
; Function Attrs: nounwind uwtable
10-
define dso_local void @test_api(i32 %0, i16 signext %1, i16 signext %2) {
11+
define <4 x i32> @test_api(i32 %0, i16 signext %1, i16 signext %2, <4 x i32> %xmm0) {
1112
; AVX512-LABEL: test_api:
1213
; AVX512: # %bb.0:
13-
; AVX512-NEXT: vpxord %zmm0, %zmm0, %zmm0
14-
; AVX512-NEXT: vmovdqu64 %zmm0, -{{[0-9]+}}(%rsp)
14+
; AVX512-NEXT: vxorps %xmm1, %xmm1, %xmm1
15+
; AVX512-NEXT: vmovups %zmm1, -{{[0-9]+}}(%rsp)
1516
; AVX512-NEXT: movb $1, -{{[0-9]+}}(%rsp)
1617
; AVX512-NEXT: movw %dx, -{{[0-9]+}}(%rsp)
1718
; AVX512-NEXT: movw %dx, -{{[0-9]+}}(%rsp)
@@ -43,9 +44,9 @@ define dso_local void @test_api(i32 %0, i16 signext %1, i16 signext %2) {
4344
;
4445
; AVX2-LABEL: test_api:
4546
; AVX2: # %bb.0:
46-
; AVX2-NEXT: vxorps %ymm0, %ymm0, %ymm0
47-
; AVX2-NEXT: vmovups %ymm0, -{{[0-9]+}}(%rsp)
48-
; AVX2-NEXT: vmovups %ymm0, -{{[0-9]+}}(%rsp)
47+
; AVX2-NEXT: vxorps %xmm1, %xmm1, %xmm1
48+
; AVX2-NEXT: vmovups %ymm1, -{{[0-9]+}}(%rsp)
49+
; AVX2-NEXT: vmovups %ymm1, -{{[0-9]+}}(%rsp)
4950
; AVX2-NEXT: movb $1, -{{[0-9]+}}(%rsp)
5051
; AVX2-NEXT: movw %dx, -{{[0-9]+}}(%rsp)
5152
; AVX2-NEXT: movw %dx, -{{[0-9]+}}(%rsp)
@@ -75,13 +76,48 @@ define dso_local void @test_api(i32 %0, i16 signext %1, i16 signext %2) {
7576
; AVX2-NEXT: vzeroupper
7677
; AVX2-NEXT: retq
7778
;
79+
; AVX1-LABEL: test_api:
80+
; AVX1: # %bb.0:
81+
; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
82+
; AVX1-NEXT: movups %xmm1, -{{[0-9]+}}(%rsp)
83+
; AVX1-NEXT: movups %xmm1, -{{[0-9]+}}(%rsp)
84+
; AVX1-NEXT: movups %xmm1, -{{[0-9]+}}(%rsp)
85+
; AVX1-NEXT: movups %xmm1, -{{[0-9]+}}(%rsp)
86+
; AVX1-NEXT: movb $1, -{{[0-9]+}}(%rsp)
87+
; AVX1-NEXT: movw %dx, -{{[0-9]+}}(%rsp)
88+
; AVX1-NEXT: movw %dx, -{{[0-9]+}}(%rsp)
89+
; AVX1-NEXT: movw %si, -{{[0-9]+}}(%rsp)
90+
; AVX1-NEXT: testl %edi, %edi
91+
; AVX1-NEXT: movsbl %sil, %eax
92+
; AVX1-NEXT: movb %al, -{{[0-9]+}}(%rsp)
93+
; AVX1-NEXT: movb %al, -{{[0-9]+}}(%rsp)
94+
; AVX1-NEXT: movb %al, -{{[0-9]+}}(%rsp)
95+
; AVX1-NEXT: ldtilecfg -{{[0-9]+}}(%rsp)
96+
; AVX1-NEXT: je .LBB0_2
97+
; AVX1-NEXT: # %bb.1:
98+
; AVX1-NEXT: movl $buf, %ecx
99+
; AVX1-NEXT: jmp .LBB0_3
100+
; AVX1-NEXT: .LBB0_2:
101+
; AVX1-NEXT: movl $buf2, %ecx
102+
; AVX1-NEXT: .LBB0_3:
103+
; AVX1-NEXT: movl $32, %edi
104+
; AVX1-NEXT: tileloadd (%rcx,%rdi), %tmm0
105+
; AVX1-NEXT: tileloadd (%rcx,%rdi), %tmm2
106+
; AVX1-NEXT: tileloadd (%rcx,%rdi), %tmm1
107+
; AVX1-NEXT: tdpbssd %tmm2, %tmm0, %tmm1
108+
; AVX1-NEXT: movl $buf, %ecx
109+
; AVX1-NEXT: movl $32, %esi
110+
; AVX1-NEXT: tilestored %tmm1, (%rcx,%rsi)
111+
; AVX1-NEXT: tilerelease
112+
; AVX1-NEXT: retq
113+
;
78114
; SSE2-LABEL: test_api:
79115
; SSE2: # %bb.0:
80-
; SSE2-NEXT: xorps %xmm0, %xmm0
81-
; SSE2-NEXT: movups %xmm0, -{{[0-9]+}}(%rsp)
82-
; SSE2-NEXT: movups %xmm0, -{{[0-9]+}}(%rsp)
83-
; SSE2-NEXT: movups %xmm0, -{{[0-9]+}}(%rsp)
84-
; SSE2-NEXT: movups %xmm0, -{{[0-9]+}}(%rsp)
116+
; SSE2-NEXT: xorps %xmm1, %xmm1
117+
; SSE2-NEXT: movups %xmm1, -{{[0-9]+}}(%rsp)
118+
; SSE2-NEXT: movups %xmm1, -{{[0-9]+}}(%rsp)
119+
; SSE2-NEXT: movups %xmm1, -{{[0-9]+}}(%rsp)
120+
; SSE2-NEXT: movups %xmm1, -{{[0-9]+}}(%rsp)
85121
; SSE2-NEXT: movb $1, -{{[0-9]+}}(%rsp)
86122
; SSE2-NEXT: movw %dx, -{{[0-9]+}}(%rsp)
87123
; SSE2-NEXT: movw %dx, -{{[0-9]+}}(%rsp)
@@ -132,11 +168,9 @@ define dso_local void @test_api(i32 %0, i16 signext %1, i16 signext %2) {
132168
%18 = phi x86_amx [ %14, %11 ], [ %10, %7 ]
133169
%19 = tail call x86_amx @llvm.x86.tdpbssd.internal(i16 %6, i16 %2, i16 %1, x86_amx %18, x86_amx %16, x86_amx %17)
134170
tail call void @llvm.x86.tilestored64.internal(i16 %6, i16 %2, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @buf, i64 0, i64 0), i64 32, x86_amx %19)
135-
ret void
171+
ret <4 x i32> %xmm0
136172
}
137173

138174
declare x86_amx @llvm.x86.tileloadd64.internal(i16, i16, i8*, i64)
139-
140175
declare x86_amx @llvm.x86.tdpbssd.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)
141-
142176
declare void @llvm.x86.tilestored64.internal(i16, i16, i8*, i64, x86_amx)

‎llvm/test/CodeGen/X86/AMX/amx-intrinsic-chain.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4,8 +4,8 @@
44
define dso_local void @test_chain(i8* %A_mem, i8* %B_mem, i8* %C_mem) {
55
; CHECK-LABEL: test_chain:
66
; CHECK: # %bb.0: # %entry
7-
; CHECK-NEXT: vpxord %zmm0, %zmm0, %zmm0
8-
; CHECK-NEXT: vmovdqu64 %zmm0, -{{[0-9]+}}(%rsp)
7+
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
8+
; CHECK-NEXT: vmovups %zmm0, -{{[0-9]+}}(%rsp)
99
; CHECK-NEXT: movb $1, -{{[0-9]+}}(%rsp)
1010
; CHECK-NEXT: movb $16, -{{[0-9]+}}(%rsp)
1111
; CHECK-NEXT: movw $64, -{{[0-9]+}}(%rsp)

‎llvm/test/CodeGen/X86/AMX/amx-ldtilecfg-insert.ll

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -5,8 +5,8 @@
55
define dso_local void @test1(i16 signext %0, i16 signext %1) nounwind {
66
; CHECK-LABEL: test1:
77
; CHECK: # %bb.0:
8-
; CHECK-NEXT: vpxord %zmm0, %zmm0, %zmm0
9-
; CHECK-NEXT: vmovdqu64 %zmm0, -{{[0-9]+}}(%rsp)
8+
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
9+
; CHECK-NEXT: vmovups %zmm0, -{{[0-9]+}}(%rsp)
1010
; CHECK-NEXT: movb $1, -{{[0-9]+}}(%rsp)
1111
; CHECK-NEXT: movw $8, -{{[0-9]+}}(%rsp)
1212
; CHECK-NEXT: movb $8, -{{[0-9]+}}(%rsp)
@@ -46,8 +46,8 @@ define dso_local void @test2(i16 signext %0, i16 signext %1) nounwind {
4646
; CHECK-NEXT: subq $72, %rsp
4747
; CHECK-NEXT: movl %esi, %ebx
4848
; CHECK-NEXT: movl %edi, %ebp
49-
; CHECK-NEXT: vpxord %zmm0, %zmm0, %zmm0
50-
; CHECK-NEXT: vmovdqu64 %zmm0, {{[0-9]+}}(%rsp)
49+
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
50+
; CHECK-NEXT: vmovups %zmm0, {{[0-9]+}}(%rsp)
5151
; CHECK-NEXT: movb $1, {{[0-9]+}}(%rsp)
5252
; CHECK-NEXT: movw $8, {{[0-9]+}}(%rsp)
5353
; CHECK-NEXT: movb $8, {{[0-9]+}}(%rsp)
@@ -119,8 +119,8 @@ exit:
119119
define dso_local void @test3(i16 signext %0, i16 signext %1) nounwind {
120120
; CHECK-LABEL: test3:
121121
; CHECK: # %bb.0:
122-
; CHECK-NEXT: vpxord %zmm0, %zmm0, %zmm0
123-
; CHECK-NEXT: vmovdqu64 %zmm0, -{{[0-9]+}}(%rsp)
122+
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
123+
; CHECK-NEXT: vmovups %zmm0, -{{[0-9]+}}(%rsp)
124124
; CHECK-NEXT: movb $1, -{{[0-9]+}}(%rsp)
125125
; CHECK-NEXT: movw %si, -{{[0-9]+}}(%rsp)
126126
; CHECK-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
@@ -162,8 +162,8 @@ exit:
162162
define dso_local void @test4(i16 signext %0, i16 signext %1) nounwind {
163163
; CHECK-LABEL: test4:
164164
; CHECK: # %bb.0:
165-
; CHECK-NEXT: vpxord %zmm0, %zmm0, %zmm0
166-
; CHECK-NEXT: vmovdqu64 %zmm0, -{{[0-9]+}}(%rsp)
165+
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
166+
; CHECK-NEXT: vmovups %zmm0, -{{[0-9]+}}(%rsp)
167167
; CHECK-NEXT: movb $1, -{{[0-9]+}}(%rsp)
168168
; CHECK-NEXT: movw %si, -{{[0-9]+}}(%rsp)
169169
; CHECK-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
@@ -231,8 +231,8 @@ define dso_local void @test5(i16 signext %0, i16 signext %1) nounwind {
231231
; CHECK-LABEL: test5:
232232
; CHECK: # %bb.0: # %entry
233233
; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
234-
; CHECK-NEXT: vpxord %zmm0, %zmm0, %zmm0
235-
; CHECK-NEXT: vmovdqu64 %zmm0, -{{[0-9]+}}(%rsp)
234+
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
235+
; CHECK-NEXT: vmovups %zmm0, -{{[0-9]+}}(%rsp)
236236
; CHECK-NEXT: movb $1, -{{[0-9]+}}(%rsp)
237237
; CHECK-NEXT: movw %si, -{{[0-9]+}}(%rsp)
238238
; CHECK-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
@@ -292,8 +292,8 @@ define dso_local void @test6(i16 signext %0) nounwind {
292292
; CHECK-LABEL: test6:
293293
; CHECK: # %bb.0: # %entry
294294
; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
295-
; CHECK-NEXT: vpxord %zmm0, %zmm0, %zmm0
296-
; CHECK-NEXT: vmovdqu64 %zmm0, -{{[0-9]+}}(%rsp)
295+
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
296+
; CHECK-NEXT: vmovups %zmm0, -{{[0-9]+}}(%rsp)
297297
; CHECK-NEXT: movb $1, -{{[0-9]+}}(%rsp)
298298
; CHECK-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
299299
; CHECK-NEXT: xorl %r8d, %r8d

‎llvm/test/CodeGen/X86/AMX/amx-lower-tile-copy.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -9,8 +9,8 @@ define dso_local void @test1(i8 *%buf) nounwind {
99
; CHECK-NEXT: pushq %r14
1010
; CHECK-NEXT: pushq %rbx
1111
; CHECK-NEXT: subq $4056, %rsp # imm = 0xFD8
12-
; CHECK-NEXT: vpxord %zmm0, %zmm0, %zmm0
13-
; CHECK-NEXT: vmovdqu64 %zmm0, {{[0-9]+}}(%rsp)
12+
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
13+
; CHECK-NEXT: vmovups %zmm0, {{[0-9]+}}(%rsp)
1414
; CHECK-NEXT: movb $1, {{[0-9]+}}(%rsp)
1515
; CHECK-NEXT: movb $8, {{[0-9]+}}(%rsp)
1616
; CHECK-NEXT: movw $8, {{[0-9]+}}(%rsp)
@@ -96,8 +96,8 @@ define dso_local void @test2(i8 *%buf) nounwind {
9696
; CHECK-NEXT: pushq %r14
9797
; CHECK-NEXT: pushq %rbx
9898
; CHECK-NEXT: subq $72, %rsp
99-
; CHECK-NEXT: vpxord %zmm0, %zmm0, %zmm0
100-
; CHECK-NEXT: vmovdqu64 %zmm0, {{[0-9]+}}(%rsp)
99+
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
100+
; CHECK-NEXT: vmovups %zmm0, {{[0-9]+}}(%rsp)
101101
; CHECK-NEXT: movb $1, {{[0-9]+}}(%rsp)
102102
; CHECK-NEXT: movb $8, {{[0-9]+}}(%rsp)
103103
; CHECK-NEXT: movw $8, {{[0-9]+}}(%rsp)

‎llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -13,8 +13,8 @@ define dso_local void @test_api(i16 signext %0, i16 signext %1) nounwind {
1313
; CHECK-NEXT: subq $2120, %rsp # imm = 0x848
1414
; CHECK-NEXT: movl %esi, %ebx
1515
; CHECK-NEXT: movl %edi, %ebp
16-
; CHECK-NEXT: vpxord %zmm0, %zmm0, %zmm0
17-
; CHECK-NEXT: vmovdqu64 %zmm0, (%rsp)
16+
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
17+
; CHECK-NEXT: vmovups %zmm0, (%rsp)
1818
; CHECK-NEXT: movb $1, (%rsp)
1919
; CHECK-NEXT: movw $8, {{[0-9]+}}(%rsp)
2020
; CHECK-NEXT: movb $8, {{[0-9]+}}(%rsp)
@@ -121,8 +121,8 @@ define dso_local void @test3(i8 *%buf) nounwind {
121121
; CHECK-NEXT: pushq %r14
122122
; CHECK-NEXT: pushq %rbx
123123
; CHECK-NEXT: subq $72, %rsp
124-
; CHECK-NEXT: vpxord %zmm0, %zmm0, %zmm0
125-
; CHECK-NEXT: vmovdqu64 %zmm0, {{[0-9]+}}(%rsp)
124+
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
125+
; CHECK-NEXT: vmovups %zmm0, {{[0-9]+}}(%rsp)
126126
; CHECK-NEXT: movb $1, {{[0-9]+}}(%rsp)
127127
; CHECK-NEXT: movb $8, {{[0-9]+}}(%rsp)
128128
; CHECK-NEXT: movw $8, {{[0-9]+}}(%rsp)

‎llvm/test/CodeGen/X86/AMX/amx-spill.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,8 +8,8 @@ define dso_local void @test_api(i32 %0, i16 signext %1, i16 signext %2) nounwind
88
; CHECK-LABEL: test_api:
99
; CHECK: # %bb.0:
1010
; CHECK-NEXT: subq $968, %rsp # imm = 0x3C8
11-
; CHECK-NEXT: vpxord %zmm0, %zmm0, %zmm0
12-
; CHECK-NEXT: vmovdqu64 %zmm0, -{{[0-9]+}}(%rsp)
11+
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
12+
; CHECK-NEXT: vmovups %zmm0, -{{[0-9]+}}(%rsp)
1313
; CHECK-NEXT: movb $1, -{{[0-9]+}}(%rsp)
1414
; CHECK-NEXT: movw %dx, -{{[0-9]+}}(%rsp)
1515
; CHECK-NEXT: movb %sil, -{{[0-9]+}}(%rsp)

‎llvm/test/CodeGen/X86/AMX/amx-tile-basic.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4,8 +4,8 @@
44
define void @test_amx(i8* %pointer, i8* %base, i64 %stride) {
55
; CHECK-LABEL: test_amx:
66
; CHECK: # %bb.0:
7-
; CHECK-NEXT: vpxord %zmm0, %zmm0, %zmm0
8-
; CHECK-NEXT: vmovdqu64 %zmm0, -{{[0-9]+}}(%rsp)
7+
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
8+
; CHECK-NEXT: vmovups %zmm0, -{{[0-9]+}}(%rsp)
99
; CHECK-NEXT: movb $1, -{{[0-9]+}}(%rsp)
1010
; CHECK-NEXT: movb $8, -{{[0-9]+}}(%rsp)
1111
; CHECK-NEXT: movw $8, -{{[0-9]+}}(%rsp)

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