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2 | 2 | ; RUN: llc -O0 -mtriple=riscv32 -mattr=+m -mattr=+xcvalu -verify-machineinstrs < %s \
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3 | 3 | ; RUN: | FileCheck %s
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4 | 4 |
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| 5 | +declare i32 @llvm.abs.i32(i32, i1) |
| 6 | +declare i32 @llvm.smin.i32(i32, i32) |
| 7 | +declare i32 @llvm.smax.i32(i32, i32) |
| 8 | +declare i32 @llvm.umin.i32(i32, i32) |
| 9 | +declare i32 @llvm.umax.i32(i32, i32) |
| 10 | + |
| 11 | +define i32 @abs(i32 %a) { |
| 12 | +; CHECK-LABEL: abs: |
| 13 | +; CHECK: # %bb.0: |
| 14 | +; CHECK-NEXT: cv.abs a0, a0 |
| 15 | +; CHECK-NEXT: ret |
| 16 | + %1 = call i32 @llvm.abs.i32(i32 %a, i1 false) |
| 17 | + ret i32 %1 |
| 18 | +} |
| 19 | + |
| 20 | +define i1 @slet(i32 %a, i32 %b) { |
| 21 | +; CHECK-LABEL: slet: |
| 22 | +; CHECK: # %bb.0: |
| 23 | +; CHECK-NEXT: cv.slet a0, a0, a1 |
| 24 | +; CHECK-NEXT: ret |
| 25 | + %1 = icmp sle i32 %a, %b |
| 26 | + ret i1 %1 |
| 27 | +} |
| 28 | + |
| 29 | +define i1 @sletu(i32 %a, i32 %b) { |
| 30 | +; CHECK-LABEL: sletu: |
| 31 | +; CHECK: # %bb.0: |
| 32 | +; CHECK-NEXT: cv.sletu a0, a0, a1 |
| 33 | +; CHECK-NEXT: ret |
| 34 | + %1 = icmp ule i32 %a, %b |
| 35 | + ret i1 %1 |
| 36 | +} |
| 37 | + |
| 38 | +define i32 @smin(i32 %a, i32 %b) { |
| 39 | +; CHECK-LABEL: smin: |
| 40 | +; CHECK: # %bb.0: |
| 41 | +; CHECK-NEXT: cv.min a0, a0, a1 |
| 42 | +; CHECK-NEXT: ret |
| 43 | + %1 = call i32 @llvm.smin.i32(i32 %a, i32 %b) |
| 44 | + ret i32 %1 |
| 45 | +} |
| 46 | + |
| 47 | +define i32 @umin(i32 %a, i32 %b) { |
| 48 | +; CHECK-LABEL: umin: |
| 49 | +; CHECK: # %bb.0: |
| 50 | +; CHECK-NEXT: cv.minu a0, a0, a1 |
| 51 | +; CHECK-NEXT: ret |
| 52 | + %1 = call i32 @llvm.umin.i32(i32 %a, i32 %b) |
| 53 | + ret i32 %1 |
| 54 | +} |
| 55 | + |
| 56 | +define i32 @smax(i32 %a, i32 %b) { |
| 57 | +; CHECK-LABEL: smax: |
| 58 | +; CHECK: # %bb.0: |
| 59 | +; CHECK-NEXT: cv.max a0, a0, a1 |
| 60 | +; CHECK-NEXT: ret |
| 61 | + %1 = call i32 @llvm.smax.i32(i32 %a, i32 %b) |
| 62 | + ret i32 %1 |
| 63 | +} |
| 64 | + |
| 65 | +define i32 @umax(i32 %a, i32 %b) { |
| 66 | +; CHECK-LABEL: umax: |
| 67 | +; CHECK: # %bb.0: |
| 68 | +; CHECK-NEXT: cv.maxu a0, a0, a1 |
| 69 | +; CHECK-NEXT: ret |
| 70 | + %1 = call i32 @llvm.umax.i32(i32 %a, i32 %b) |
| 71 | + ret i32 %1 |
| 72 | +} |
| 73 | + |
| 74 | +define i32 @exths(i16 %a) { |
| 75 | +; CHECK-LABEL: exths: |
| 76 | +; CHECK: # %bb.0: |
| 77 | +; CHECK-NEXT: # kill: def $x11 killed $x10 |
| 78 | +; CHECK-NEXT: cv.exths a0, a0 |
| 79 | +; CHECK-NEXT: ret |
| 80 | + %1 = sext i16 %a to i32 |
| 81 | + ret i32 %1 |
| 82 | +} |
| 83 | + |
| 84 | +define i32 @exthz(i16 %a) { |
| 85 | +; CHECK-LABEL: exthz: |
| 86 | +; CHECK: # %bb.0: |
| 87 | +; CHECK-NEXT: # kill: def $x11 killed $x10 |
| 88 | +; CHECK-NEXT: cv.exthz a0, a0 |
| 89 | +; CHECK-NEXT: ret |
| 90 | + %1 = zext i16 %a to i32 |
| 91 | + ret i32 %1 |
| 92 | +} |
| 93 | + |
5 | 94 | declare i32 @llvm.riscv.cv.alu.clip(i32, i32)
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6 | 95 |
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7 | 96 | define i32 @test.cv.alu.clip.case.a(i32 %a) {
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