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[LoongArch] Enable the TypePromotion pass from AArch64 (#98868)
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4 files changed

+36
-32
lines changed

4 files changed

+36
-32
lines changed

‎llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -151,6 +151,7 @@ class LoongArchPassConfig : public TargetPassConfig {
151151
}
152152

153153
void addIRPasses() override;
154+
void addCodeGenPrepare() override;
154155
bool addInstSelector() override;
155156
void addPreEmitPass() override;
156157
void addPreEmitPass2() override;
@@ -178,6 +179,12 @@ void LoongArchPassConfig::addIRPasses() {
178179
TargetPassConfig::addIRPasses();
179180
}
180181

182+
void LoongArchPassConfig::addCodeGenPrepare() {
183+
if (getOptLevel() != CodeGenOptLevel::None)
184+
addPass(createTypePromotionLegacyPass());
185+
TargetPassConfig::addCodeGenPrepare();
186+
}
187+
181188
bool LoongArchPassConfig::addInstSelector() {
182189
addPass(createLoongArchISelDag(getLoongArchTargetMachine()));
183190

‎llvm/test/CodeGen/LoongArch/andn-icmp.ll

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,12 +6,14 @@ define i1 @andn_icmp_eq_i8(i8 signext %a, i8 signext %b) nounwind {
66
; LA32-LABEL: andn_icmp_eq_i8:
77
; LA32: # %bb.0:
88
; LA32-NEXT: andn $a0, $a1, $a0
9+
; LA32-NEXT: andi $a0, $a0, 255
910
; LA32-NEXT: sltui $a0, $a0, 1
1011
; LA32-NEXT: ret
1112
;
1213
; LA64-LABEL: andn_icmp_eq_i8:
1314
; LA64: # %bb.0:
1415
; LA64-NEXT: andn $a0, $a1, $a0
16+
; LA64-NEXT: andi $a0, $a0, 255
1517
; LA64-NEXT: sltui $a0, $a0, 1
1618
; LA64-NEXT: ret
1719
%and = and i8 %a, %b
@@ -23,12 +25,14 @@ define i1 @andn_icmp_eq_i16(i16 signext %a, i16 signext %b) nounwind {
2325
; LA32-LABEL: andn_icmp_eq_i16:
2426
; LA32: # %bb.0:
2527
; LA32-NEXT: andn $a0, $a1, $a0
28+
; LA32-NEXT: bstrpick.w $a0, $a0, 15, 0
2629
; LA32-NEXT: sltui $a0, $a0, 1
2730
; LA32-NEXT: ret
2831
;
2932
; LA64-LABEL: andn_icmp_eq_i16:
3033
; LA64: # %bb.0:
3134
; LA64-NEXT: andn $a0, $a1, $a0
35+
; LA64-NEXT: bstrpick.d $a0, $a0, 15, 0
3236
; LA64-NEXT: sltui $a0, $a0, 1
3337
; LA64-NEXT: ret
3438
%and = and i16 %a, %b
@@ -76,12 +80,14 @@ define i1 @andn_icmp_ne_i8(i8 signext %a, i8 signext %b) nounwind {
7680
; LA32-LABEL: andn_icmp_ne_i8:
7781
; LA32: # %bb.0:
7882
; LA32-NEXT: andn $a0, $a1, $a0
83+
; LA32-NEXT: andi $a0, $a0, 255
7984
; LA32-NEXT: sltu $a0, $zero, $a0
8085
; LA32-NEXT: ret
8186
;
8287
; LA64-LABEL: andn_icmp_ne_i8:
8388
; LA64: # %bb.0:
8489
; LA64-NEXT: andn $a0, $a1, $a0
90+
; LA64-NEXT: andi $a0, $a0, 255
8591
; LA64-NEXT: sltu $a0, $zero, $a0
8692
; LA64-NEXT: ret
8793
%and = and i8 %a, %b
@@ -93,12 +99,14 @@ define i1 @andn_icmp_ne_i16(i16 signext %a, i16 signext %b) nounwind {
9399
; LA32-LABEL: andn_icmp_ne_i16:
94100
; LA32: # %bb.0:
95101
; LA32-NEXT: andn $a0, $a1, $a0
102+
; LA32-NEXT: bstrpick.w $a0, $a0, 15, 0
96103
; LA32-NEXT: sltu $a0, $zero, $a0
97104
; LA32-NEXT: ret
98105
;
99106
; LA64-LABEL: andn_icmp_ne_i16:
100107
; LA64: # %bb.0:
101108
; LA64-NEXT: andn $a0, $a1, $a0
109+
; LA64-NEXT: bstrpick.d $a0, $a0, 15, 0
102110
; LA64-NEXT: sltu $a0, $zero, $a0
103111
; LA64-NEXT: ret
104112
%and = and i16 %a, %b

‎llvm/test/CodeGen/LoongArch/opt-pipeline.ll

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -68,6 +68,7 @@
6868
; LAXX-NEXT: Expand reduction intrinsics
6969
; LAXX-NEXT: Natural Loop Information
7070
; LAXX-NEXT: TLS Variable Hoist
71+
; LAXX-NEXT: Type Promotion
7172
; LAXX-NEXT: CodeGen Prepare
7273
; LAXX-NEXT: Dominator Tree Construction
7374
; LAXX-NEXT: Exception handling preparation

‎llvm/test/CodeGen/LoongArch/typepromotion-overflow.ll

Lines changed: 20 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -287,7 +287,6 @@ define i32 @safe_add_underflow_neg(i8 zeroext %a) {
287287
; LA32-LABEL: safe_add_underflow_neg:
288288
; LA32: # %bb.0:
289289
; LA32-NEXT: addi.w $a0, $a0, -2
290-
; LA32-NEXT: andi $a0, $a0, 255
291290
; LA32-NEXT: sltui $a0, $a0, 251
292291
; LA32-NEXT: ori $a1, $zero, 16
293292
; LA32-NEXT: masknez $a1, $a1, $a0
@@ -299,7 +298,6 @@ define i32 @safe_add_underflow_neg(i8 zeroext %a) {
299298
; LA64-LABEL: safe_add_underflow_neg:
300299
; LA64: # %bb.0:
301300
; LA64-NEXT: addi.d $a0, $a0, -2
302-
; LA64-NEXT: andi $a0, $a0, 255
303301
; LA64-NEXT: sltui $a0, $a0, 251
304302
; LA64-NEXT: ori $a1, $zero, 16
305303
; LA64-NEXT: masknez $a1, $a1, $a0
@@ -344,8 +342,7 @@ define i32 @sext_sub_underflow(i8 zeroext %a) {
344342
; LA32-LABEL: sext_sub_underflow:
345343
; LA32: # %bb.0:
346344
; LA32-NEXT: addi.w $a0, $a0, -6
347-
; LA32-NEXT: andi $a0, $a0, 255
348-
; LA32-NEXT: ori $a1, $zero, 250
345+
; LA32-NEXT: addi.w $a1, $zero, -6
349346
; LA32-NEXT: sltu $a0, $a1, $a0
350347
; LA32-NEXT: ori $a1, $zero, 16
351348
; LA32-NEXT: masknez $a1, $a1, $a0
@@ -357,8 +354,7 @@ define i32 @sext_sub_underflow(i8 zeroext %a) {
357354
; LA64-LABEL: sext_sub_underflow:
358355
; LA64: # %bb.0:
359356
; LA64-NEXT: addi.d $a0, $a0, -6
360-
; LA64-NEXT: andi $a0, $a0, 255
361-
; LA64-NEXT: ori $a1, $zero, 250
357+
; LA64-NEXT: addi.w $a1, $zero, -6
362358
; LA64-NEXT: sltu $a0, $a1, $a0
363359
; LA64-NEXT: ori $a1, $zero, 16
364360
; LA64-NEXT: masknez $a1, $a1, $a0
@@ -401,7 +397,6 @@ define i32 @safe_sub_underflow_neg(i8 zeroext %a) {
401397
; LA32-LABEL: safe_sub_underflow_neg:
402398
; LA32: # %bb.0:
403399
; LA32-NEXT: addi.w $a0, $a0, -4
404-
; LA32-NEXT: andi $a0, $a0, 255
405400
; LA32-NEXT: ori $a1, $zero, 250
406401
; LA32-NEXT: sltu $a0, $a1, $a0
407402
; LA32-NEXT: ori $a1, $zero, 16
@@ -414,7 +409,6 @@ define i32 @safe_sub_underflow_neg(i8 zeroext %a) {
414409
; LA64-LABEL: safe_sub_underflow_neg:
415410
; LA64: # %bb.0:
416411
; LA64-NEXT: addi.d $a0, $a0, -4
417-
; LA64-NEXT: andi $a0, $a0, 255
418412
; LA64-NEXT: ori $a1, $zero, 250
419413
; LA64-NEXT: sltu $a0, $a1, $a0
420414
; LA64-NEXT: ori $a1, $zero, 16
@@ -433,8 +427,7 @@ define i32 @sext_sub_underflow_neg(i8 zeroext %a) {
433427
; LA32-LABEL: sext_sub_underflow_neg:
434428
; LA32: # %bb.0:
435429
; LA32-NEXT: addi.w $a0, $a0, -4
436-
; LA32-NEXT: andi $a0, $a0, 255
437-
; LA32-NEXT: sltui $a0, $a0, 253
430+
; LA32-NEXT: sltui $a0, $a0, -3
438431
; LA32-NEXT: ori $a1, $zero, 16
439432
; LA32-NEXT: masknez $a1, $a1, $a0
440433
; LA32-NEXT: ori $a2, $zero, 8
@@ -445,8 +438,7 @@ define i32 @sext_sub_underflow_neg(i8 zeroext %a) {
445438
; LA64-LABEL: sext_sub_underflow_neg:
446439
; LA64: # %bb.0:
447440
; LA64-NEXT: addi.d $a0, $a0, -4
448-
; LA64-NEXT: andi $a0, $a0, 255
449-
; LA64-NEXT: sltui $a0, $a0, 253
441+
; LA64-NEXT: sltui $a0, $a0, -3
450442
; LA64-NEXT: ori $a1, $zero, 16
451443
; LA64-NEXT: masknez $a1, $a1, $a0
452444
; LA64-NEXT: ori $a2, $zero, 8
@@ -476,19 +468,17 @@ entry:
476468
define i32 @safe_sub_var_imm(ptr nocapture readonly %b) local_unnamed_addr #1 {
477469
; LA32-LABEL: safe_sub_var_imm:
478470
; LA32: # %bb.0: # %entry
479-
; LA32-NEXT: ld.b $a0, $a0, 0
480-
; LA32-NEXT: addi.w $a0, $a0, 8
481-
; LA32-NEXT: andi $a0, $a0, 255
482-
; LA32-NEXT: ori $a1, $zero, 252
471+
; LA32-NEXT: ld.bu $a0, $a0, 0
472+
; LA32-NEXT: addi.w $a0, $a0, -248
473+
; LA32-NEXT: addi.w $a1, $zero, -4
483474
; LA32-NEXT: sltu $a0, $a1, $a0
484475
; LA32-NEXT: ret
485476
;
486477
; LA64-LABEL: safe_sub_var_imm:
487478
; LA64: # %bb.0: # %entry
488-
; LA64-NEXT: ld.b $a0, $a0, 0
489-
; LA64-NEXT: addi.d $a0, $a0, 8
490-
; LA64-NEXT: andi $a0, $a0, 255
491-
; LA64-NEXT: ori $a1, $zero, 252
479+
; LA64-NEXT: ld.bu $a0, $a0, 0
480+
; LA64-NEXT: addi.d $a0, $a0, -248
481+
; LA64-NEXT: addi.w $a1, $zero, -4
492482
; LA64-NEXT: sltu $a0, $a1, $a0
493483
; LA64-NEXT: ret
494484
entry:
@@ -533,11 +523,10 @@ define i8 @convert_add_order(i8 zeroext %arg) {
533523
; LA32-NEXT: ori $a1, $a0, 1
534524
; LA32-NEXT: sltui $a2, $a1, 50
535525
; LA32-NEXT: addi.w $a1, $a1, -40
536-
; LA32-NEXT: andi $a1, $a1, 255
537526
; LA32-NEXT: sltui $a1, $a1, 20
538527
; LA32-NEXT: ori $a3, $zero, 2
539528
; LA32-NEXT: sub.w $a1, $a3, $a1
540-
; LA32-NEXT: addi.w $a3, $zero, -1
529+
; LA32-NEXT: ori $a3, $zero, 255
541530
; LA32-NEXT: masknez $a3, $a3, $a2
542531
; LA32-NEXT: maskeqz $a1, $a1, $a2
543532
; LA32-NEXT: or $a1, $a1, $a3
@@ -549,11 +538,10 @@ define i8 @convert_add_order(i8 zeroext %arg) {
549538
; LA64-NEXT: ori $a1, $a0, 1
550539
; LA64-NEXT: sltui $a2, $a1, 50
551540
; LA64-NEXT: addi.d $a1, $a1, -40
552-
; LA64-NEXT: andi $a1, $a1, 255
553541
; LA64-NEXT: sltui $a1, $a1, 20
554542
; LA64-NEXT: ori $a3, $zero, 2
555543
; LA64-NEXT: sub.d $a1, $a3, $a1
556-
; LA64-NEXT: addi.w $a3, $zero, -1
544+
; LA64-NEXT: ori $a3, $zero, 255
557545
; LA64-NEXT: masknez $a3, $a3, $a2
558546
; LA64-NEXT: maskeqz $a1, $a1, $a2
559547
; LA64-NEXT: or $a1, $a1, $a3
@@ -574,9 +562,8 @@ define i8 @underflow_if_sub(i32 %arg, i8 zeroext %arg1) {
574562
; LA32: # %bb.0:
575563
; LA32-NEXT: slt $a2, $zero, $a0
576564
; LA32-NEXT: and $a0, $a2, $a0
577-
; LA32-NEXT: addi.w $a0, $a0, -11
578-
; LA32-NEXT: andi $a2, $a0, 247
579-
; LA32-NEXT: sltu $a1, $a2, $a1
565+
; LA32-NEXT: addi.w $a0, $a0, 245
566+
; LA32-NEXT: sltu $a1, $a0, $a1
580567
; LA32-NEXT: maskeqz $a0, $a0, $a1
581568
; LA32-NEXT: ori $a2, $zero, 100
582569
; LA32-NEXT: masknez $a1, $a2, $a1
@@ -588,9 +575,8 @@ define i8 @underflow_if_sub(i32 %arg, i8 zeroext %arg1) {
588575
; LA64-NEXT: addi.w $a2, $a0, 0
589576
; LA64-NEXT: slt $a2, $zero, $a2
590577
; LA64-NEXT: and $a0, $a2, $a0
591-
; LA64-NEXT: addi.d $a0, $a0, -11
592-
; LA64-NEXT: andi $a2, $a0, 247
593-
; LA64-NEXT: sltu $a1, $a2, $a1
578+
; LA64-NEXT: addi.d $a0, $a0, 245
579+
; LA64-NEXT: sltu $a1, $a0, $a1
594580
; LA64-NEXT: maskeqz $a0, $a0, $a1
595581
; LA64-NEXT: ori $a2, $zero, 100
596582
; LA64-NEXT: masknez $a1, $a2, $a1
@@ -609,9 +595,10 @@ define i8 @underflow_if_sub(i32 %arg, i8 zeroext %arg1) {
609595
define i8 @underflow_if_sub_signext(i32 %arg, i8 signext %arg1) {
610596
; LA32-LABEL: underflow_if_sub_signext:
611597
; LA32: # %bb.0:
598+
; LA32-NEXT: andi $a1, $a1, 255
612599
; LA32-NEXT: slt $a2, $zero, $a0
613600
; LA32-NEXT: and $a0, $a2, $a0
614-
; LA32-NEXT: addi.w $a0, $a0, -11
601+
; LA32-NEXT: addi.w $a0, $a0, 245
615602
; LA32-NEXT: sltu $a1, $a0, $a1
616603
; LA32-NEXT: maskeqz $a0, $a0, $a1
617604
; LA32-NEXT: ori $a2, $zero, 100
@@ -622,9 +609,10 @@ define i8 @underflow_if_sub_signext(i32 %arg, i8 signext %arg1) {
622609
; LA64-LABEL: underflow_if_sub_signext:
623610
; LA64: # %bb.0:
624611
; LA64-NEXT: addi.w $a2, $a0, 0
612+
; LA64-NEXT: andi $a1, $a1, 255
625613
; LA64-NEXT: slt $a2, $zero, $a2
626614
; LA64-NEXT: and $a0, $a2, $a0
627-
; LA64-NEXT: addi.d $a0, $a0, -11
615+
; LA64-NEXT: addi.d $a0, $a0, 245
628616
; LA64-NEXT: sltu $a1, $a0, $a1
629617
; LA64-NEXT: maskeqz $a0, $a0, $a1
630618
; LA64-NEXT: ori $a2, $zero, 100

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