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Commit 3863f8e

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Dale Johannesen
committed
Rewrite logic to figure out whether LR needs to
be saved/restored in the prolog/epilog. We need to do this iff something in the function stores into it. llvm-svn: 58116
1 parent 4bc52fd commit 3863f8e

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+34
-32
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2 files changed

+34
-32
lines changed

llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h

Lines changed: 11 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -31,9 +31,10 @@ class PPCFunctionInfo : public MachineFunctionInfo {
3131
///
3232
int ReturnAddrSaveIndex;
3333

34-
/// UsesLR - Indicates whether LR is used in the current function. This is
35-
/// only valid after the initial scan of the function by PEI.
36-
bool UsesLR;
34+
/// MustSaveLR - Indicates whether LR is defined (or clobbered) in the current
35+
/// function. This is only valid after the initial scan of the function by
36+
/// PEI.
37+
bool MustSaveLR;
3738

3839
/// SpillsCR - Indicates whether CR is spilled in the current function.
3940
bool SpillsCR;
@@ -79,12 +80,13 @@ class PPCFunctionInfo : public MachineFunctionInfo {
7980
int getTailCallSPDelta() const { return TailCallSPDelta; }
8081
void setTailCallSPDelta(int size) { TailCallSPDelta = size; }
8182

82-
/// UsesLR - This is set when the prolog/epilog inserter does its initial scan
83-
/// of the function, it is true if the LR/LR8 register is ever explicitly
84-
/// accessed/clobbered in the machine function (e.g. by calls and movpctolr,
85-
/// which is used in PIC generation).
86-
void setUsesLR(bool U) { UsesLR = U; }
87-
bool usesLR() const { return UsesLR; }
83+
/// MustSaveLR - This is set when the prolog/epilog inserter does its initial
84+
/// scan of the function. It is true if the LR/LR8 register is ever explicitly
85+
/// defined/clobbered in the machine function (e.g. by calls and movpctolr,
86+
/// which is used in PIC generation), or if the LR stack slot is explicitly
87+
/// referenced by builtin_return_address.
88+
void setMustSaveLR(bool U) { MustSaveLR = U; }
89+
bool mustSaveLR() const { return MustSaveLR; }
8890

8991
void setSpillsCR() { SpillsCR = true; }
9092
bool isCRSpilled() const { return SpillsCR; }

llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp

Lines changed: 23 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -389,15 +389,15 @@ bool PPCRegisterInfo::hasFP(const MachineFunction &MF) const {
389389
/// MustSaveLR - Return true if this function requires that we save the LR
390390
/// register onto the stack in the prolog and restore it in the epilog of the
391391
/// function.
392-
static bool MustSaveLR(const MachineFunction &MF) {
392+
static bool MustSaveLR(const MachineFunction &MF, unsigned LR) {
393393
const PPCFunctionInfo *MFI = MF.getInfo<PPCFunctionInfo>();
394394

395-
// We need an save/restore of LR if there is any use/def of LR explicitly, or
396-
// if there is some use of the LR stack slot (e.g. for builtin_return_address.
397-
return MFI->usesLR() || MFI->isLRStoreRequired() ||
398-
// FIXME: Anything that has a call should clobber the LR register,
399-
// isn't this redundant??
400-
MF.getFrameInfo()->hasCalls();
395+
// We need a save/restore of LR if there is any def of LR (which is
396+
// defined by calls, including the PIC setup sequence), or if there is
397+
// some use of the LR stack slot (e.g. for builtin_return_address).
398+
// (LR comes in 32 and 64 bit versions.)
399+
MachineRegisterInfo::def_iterator RI = MF.getRegInfo().def_begin(LR);
400+
return RI !=MF.getRegInfo().def_end() || MFI->isLRStoreRequired();
401401
}
402402

403403

@@ -406,7 +406,7 @@ void PPCRegisterInfo::
406406
eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
407407
MachineBasicBlock::iterator I) const {
408408
if (PerformTailCallOpt && I->getOpcode() == PPC::ADJCALLSTACKUP) {
409-
// Add (actually substract) back the amount the callee popped on return.
409+
// Add (actually subtract) back the amount the callee popped on return.
410410
if (int CalleeAmt = I->getOperand(1).getImm()) {
411411
bool is64Bit = Subtarget.isPPC64();
412412
CalleeAmt *= -1;
@@ -934,7 +934,7 @@ PPCRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
934934
// Save and clear the LR state.
935935
PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>();
936936
unsigned LR = getRARegister();
937-
FI->setUsesLR(MF.getRegInfo().isPhysRegUsed(LR));
937+
FI->setMustSaveLR(MustSaveLR(MF, LR));
938938
MF.getRegInfo().setPhysRegUnused(LR);
939939

940940
// Save R31 if necessary
@@ -1015,16 +1015,17 @@ PPCRegisterInfo::emitPrologue(MachineFunction &MF) const {
10151015
bool IsPPC64 = Subtarget.isPPC64();
10161016
// Get operating system
10171017
bool IsMachoABI = Subtarget.isMachoABI();
1018-
// Check if the link register (LR) has been used.
1019-
bool UsesLR = MustSaveLR(MF);
1018+
// Check if the link register (LR) must be saved.
1019+
PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>();
1020+
bool MustSaveLR = FI->mustSaveLR();
10201021
// Do we have a frame pointer for this function?
10211022
bool HasFP = hasFP(MF) && FrameSize;
10221023

10231024
int LROffset = PPCFrameInfo::getReturnSaveOffset(IsPPC64, IsMachoABI);
10241025
int FPOffset = PPCFrameInfo::getFramePointerSaveOffset(IsPPC64, IsMachoABI);
10251026

10261027
if (IsPPC64) {
1027-
if (UsesLR)
1028+
if (MustSaveLR)
10281029
BuildMI(MBB, MBBI, TII.get(PPC::MFLR8), PPC::X0);
10291030

10301031
if (HasFP)
@@ -1033,13 +1034,13 @@ PPCRegisterInfo::emitPrologue(MachineFunction &MF) const {
10331034
.addImm(FPOffset/4)
10341035
.addReg(PPC::X1);
10351036

1036-
if (UsesLR)
1037+
if (MustSaveLR)
10371038
BuildMI(MBB, MBBI, TII.get(PPC::STD))
10381039
.addReg(PPC::X0)
10391040
.addImm(LROffset / 4)
10401041
.addReg(PPC::X1);
10411042
} else {
1042-
if (UsesLR)
1043+
if (MustSaveLR)
10431044
BuildMI(MBB, MBBI, TII.get(PPC::MFLR), PPC::R0);
10441045

10451046
if (HasFP)
@@ -1048,7 +1049,7 @@ PPCRegisterInfo::emitPrologue(MachineFunction &MF) const {
10481049
.addImm(FPOffset)
10491050
.addReg(PPC::R1);
10501051

1051-
if (UsesLR)
1052+
if (MustSaveLR)
10521053
BuildMI(MBB, MBBI, TII.get(PPC::STW))
10531054
.addReg(PPC::R0)
10541055
.addImm(LROffset)
@@ -1222,8 +1223,9 @@ void PPCRegisterInfo::emitEpilogue(MachineFunction &MF,
12221223
bool IsPPC64 = Subtarget.isPPC64();
12231224
// Get operating system
12241225
bool IsMachoABI = Subtarget.isMachoABI();
1225-
// Check if the link register (LR) has been used.
1226-
bool UsesLR = MustSaveLR(MF);
1226+
// Check if the link register (LR) has been saved.
1227+
PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>();
1228+
bool MustSaveLR = FI->mustSaveLR();
12271229
// Do we have a frame pointer for this function?
12281230
bool HasFP = hasFP(MF) && FrameSize;
12291231

@@ -1237,8 +1239,6 @@ void PPCRegisterInfo::emitEpilogue(MachineFunction &MF,
12371239
RetOpcode == PPC::TCRETURNdi8 ||
12381240
RetOpcode == PPC::TCRETURNai8;
12391241

1240-
PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>();
1241-
12421242
if (UsesTCRet) {
12431243
int MaxTCRetDelta = FI->getTailCallSPDelta();
12441244
MachineOperand &StackAdjust = MBBI->getOperand(1);
@@ -1309,26 +1309,26 @@ void PPCRegisterInfo::emitEpilogue(MachineFunction &MF,
13091309
}
13101310

13111311
if (IsPPC64) {
1312-
if (UsesLR)
1312+
if (MustSaveLR)
13131313
BuildMI(MBB, MBBI, TII.get(PPC::LD), PPC::X0)
13141314
.addImm(LROffset/4).addReg(PPC::X1);
13151315

13161316
if (HasFP)
13171317
BuildMI(MBB, MBBI, TII.get(PPC::LD), PPC::X31)
13181318
.addImm(FPOffset/4).addReg(PPC::X1);
13191319

1320-
if (UsesLR)
1320+
if (MustSaveLR)
13211321
BuildMI(MBB, MBBI, TII.get(PPC::MTLR8)).addReg(PPC::X0);
13221322
} else {
1323-
if (UsesLR)
1323+
if (MustSaveLR)
13241324
BuildMI(MBB, MBBI, TII.get(PPC::LWZ), PPC::R0)
13251325
.addImm(LROffset).addReg(PPC::R1);
13261326

13271327
if (HasFP)
13281328
BuildMI(MBB, MBBI, TII.get(PPC::LWZ), PPC::R31)
13291329
.addImm(FPOffset).addReg(PPC::R1);
13301330

1331-
if (UsesLR)
1331+
if (MustSaveLR)
13321332
BuildMI(MBB, MBBI, TII.get(PPC::MTLR)).addReg(PPC::R0);
13331333
}
13341334

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