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[AMDGPU] Add new GFX12 image atomic float instructions (#76946)
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‎llvm/include/llvm/IR/IntrinsicsAMDGPU.td

Lines changed: 3 additions & 0 deletions
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@@ -1025,6 +1025,9 @@ defset list<AMDGPUImageDimIntrinsic> AMDGPUImageDimAtomicIntrinsics = {
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defm int_amdgcn_image_atomic_xor : AMDGPUImageDimAtomic<"ATOMIC_XOR">;
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defm int_amdgcn_image_atomic_inc : AMDGPUImageDimAtomic<"ATOMIC_INC">;
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defm int_amdgcn_image_atomic_dec : AMDGPUImageDimAtomic<"ATOMIC_DEC">;
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defm int_amdgcn_image_atomic_add_flt : AMDGPUImageDimFloatAtomic<"ATOMIC_ADD_FLT">;
1029+
defm int_amdgcn_image_atomic_min_flt : AMDGPUImageDimFloatAtomic<"ATOMIC_MIN_FLT">;
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defm int_amdgcn_image_atomic_max_flt : AMDGPUImageDimFloatAtomic<"ATOMIC_MAX_FLT">;
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defm int_amdgcn_image_atomic_cmpswap :
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AMDGPUImageDimAtomicX<"ATOMIC_CMPSWAP", [AMDGPUArg<LLVMMatchType<0>, "src">,

‎llvm/lib/Target/AMDGPU/MIMGInstructions.td

Lines changed: 3 additions & 0 deletions
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@@ -1553,6 +1553,9 @@ defm IMAGE_ATOMIC_DEC : MIMG_Atomic_Renamed <mimgopc<0x16, 0x16, 0x1c>
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defm IMAGE_ATOMIC_FCMPSWAP : MIMG_Atomic <mimgopc<MIMG.NOP, MIMG.NOP, 0x1d, MIMG.NOP>, "image_atomic_fcmpswap", 1, 1>;
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defm IMAGE_ATOMIC_FMIN : MIMG_Atomic <mimgopc<MIMG.NOP, MIMG.NOP, 0x1e, MIMG.NOP>, "image_atomic_fmin", 0, 1>;
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defm IMAGE_ATOMIC_FMAX : MIMG_Atomic <mimgopc<MIMG.NOP, MIMG.NOP, 0x1f, MIMG.NOP>, "image_atomic_fmax", 0, 1>;
1556+
defm IMAGE_ATOMIC_ADD_FLT : MIMG_Atomic <mimgopc<0x83, MIMG.NOP, MIMG.NOP, MIMG.NOP>, "image_atomic_add_flt", 0, 1>;
1557+
defm IMAGE_ATOMIC_MIN_FLT : MIMG_Atomic <mimgopc<0x84, MIMG.NOP, MIMG.NOP, MIMG.NOP>, "image_atomic_min_num_flt", 0, 1, "image_atomic_min_flt">;
1558+
defm IMAGE_ATOMIC_MAX_FLT : MIMG_Atomic <mimgopc<0x85, MIMG.NOP, MIMG.NOP, MIMG.NOP>, "image_atomic_max_num_flt", 0, 1, "image_atomic_max_flt">;
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defm IMAGE_SAMPLE : MIMG_Sampler_WQM <mimgopc<0x1b, 0x1b, 0x20>, AMDGPUSample>;
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let OtherPredicates = [HasExtendedImageInsts] in {

‎llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.flt.ll

Lines changed: 40 additions & 0 deletions
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@@ -0,0 +1,40 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx1200 < %s | FileCheck -check-prefix=GFX12 %s
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; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx1200 < %s | FileCheck -check-prefix=GFX12 %s
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define amdgpu_ps float @atomic_min_flt_1d(<8 x i32> inreg %rsrc, float %data, i32 %s) {
6+
; GFX12-LABEL: atomic_min_flt_1d:
7+
; GFX12: ; %bb.0: ; %main_body
8+
; GFX12-NEXT: image_atomic_min_flt v0, v1, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_ATOMIC_RETURN
9+
; GFX12-NEXT: s_waitcnt vmcnt(0)
10+
; GFX12-NEXT: ; return to shader part epilog
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main_body:
12+
%v = call float @llvm.amdgcn.image.atomic.min.flt.1d.f32.f32(float %data, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)
13+
ret float %v
14+
}
15+
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define amdgpu_ps float @atomic_max_flt_1d(<8 x i32> inreg %rsrc, float %data, i32 %s) {
17+
; GFX12-LABEL: atomic_max_flt_1d:
18+
; GFX12: ; %bb.0: ; %main_body
19+
; GFX12-NEXT: image_atomic_max_flt v0, v1, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_ATOMIC_RETURN
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; GFX12-NEXT: s_waitcnt vmcnt(0)
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; GFX12-NEXT: ; return to shader part epilog
22+
main_body:
23+
%v = call float @llvm.amdgcn.image.atomic.max.flt.1d.f32.f32(float %data, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)
24+
ret float %v
25+
}
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define amdgpu_ps float @atomic_add_flt_1d(<8 x i32> inreg %rsrc, float %data, i32 %s) {
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; GFX12-LABEL: atomic_add_flt_1d:
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; GFX12: ; %bb.0: ; %main_body
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; GFX12-NEXT: image_atomic_add_flt v0, v1, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_ATOMIC_RETURN
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; GFX12-NEXT: s_waitcnt vmcnt(0)
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; GFX12-NEXT: ; return to shader part epilog
33+
main_body:
34+
%v = call float @llvm.amdgcn.image.atomic.add.flt.1d.f32.f32(float %data, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)
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ret float %v
36+
}
37+
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declare float @llvm.amdgcn.image.atomic.add.flt.1d.f32.f32(float, i32, <8 x i32>, i32, i32)
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declare float @llvm.amdgcn.image.atomic.min.flt.1d.f32.f32(float, i32, <8 x i32>, i32, i32)
40+
declare float @llvm.amdgcn.image.atomic.max.flt.1d.f32.f32(float, i32, <8 x i32>, i32, i32)

‎llvm/test/MC/AMDGPU/gfx12_asm_vimage.s

Lines changed: 81 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -883,6 +883,87 @@ image_atomic_dec_uint v[254:255], [v4, v5, v6, v7], s[96:103] dmask:0x3 dim:SQ_R
883883
image_atomic_dec_uint v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_ATOMIC_NT
884884
// GFX12: encoding: [0x00,0x80,0x45,0xd0,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00]
885885

886+
image_atomic_add_flt v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D
887+
// GFX12: encoding: [0x00,0xc0,0x60,0xd0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
888+
889+
image_atomic_add_flt v1, [v2, v3], s[4:11] dmask:0x1 dim:SQ_RSRC_IMG_2D
890+
// GFX12: encoding: [0x01,0xc0,0x60,0xd0,0x01,0x08,0x00,0x00,0x02,0x03,0x00,0x00]
891+
892+
image_atomic_add_flt v4, [v4, v5, v6], s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_3D
893+
// GFX12: encoding: [0x02,0xc0,0x60,0xd0,0x04,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
894+
895+
image_atomic_add_flt v255, [v4, v5, v6], s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_CUBE
896+
// GFX12: encoding: [0x03,0xc0,0x60,0xd0,0xff,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
897+
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image_atomic_add_flt v[0:1], [v4, v5], s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_1D_ARRAY
899+
// GFX12: encoding: [0x04,0xc0,0xe0,0xd0,0x00,0x10,0x00,0x00,0x04,0x05,0x00,0x00]
900+
901+
image_atomic_add_flt v[1:2], [v4, v5, v6], s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_2D_ARRAY
902+
// GFX12: encoding: [0x05,0xc0,0xe0,0xd0,0x01,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
903+
904+
image_atomic_add_flt v[3:4], [v4, v5, v6], s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_2D_MSAA
905+
// GFX12: encoding: [0x06,0xc0,0xe0,0xd0,0x03,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
906+
907+
image_atomic_add_flt v[254:255], [v4, v5, v6, v7], s[96:103] dmask:0x3 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY
908+
// GFX12: encoding: [0x07,0xc0,0xe0,0xd0,0xfe,0xc0,0x00,0x00,0x04,0x05,0x06,0x07]
909+
910+
image_atomic_add_flt v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_ATOMIC_NT
911+
// GFX12: encoding: [0x00,0xc0,0x60,0xd0,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00]
912+
913+
image_atomic_min_flt v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D
914+
// GFX12: encoding: [0x00,0x00,0x61,0xd0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
915+
916+
image_atomic_min_flt v1, [v2, v3], s[4:11] dmask:0x1 dim:SQ_RSRC_IMG_2D
917+
// GFX12: encoding: [0x01,0x00,0x61,0xd0,0x01,0x08,0x00,0x00,0x02,0x03,0x00,0x00]
918+
919+
image_atomic_min_flt v4, [v4, v5, v6], s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_3D
920+
// GFX12: encoding: [0x02,0x00,0x61,0xd0,0x04,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
921+
922+
image_atomic_min_flt v255, [v4, v5, v6], s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_CUBE
923+
// GFX12: encoding: [0x03,0x00,0x61,0xd0,0xff,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
924+
925+
image_atomic_min_flt v[0:1], [v4, v5], s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_1D_ARRAY
926+
// GFX12: encoding: [0x04,0x00,0xe1,0xd0,0x00,0x10,0x00,0x00,0x04,0x05,0x00,0x00]
927+
928+
image_atomic_min_flt v[1:2], [v4, v5, v6], s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_2D_ARRAY
929+
// GFX12: encoding: [0x05,0x00,0xe1,0xd0,0x01,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
930+
931+
image_atomic_min_flt v[3:4], [v4, v5, v6], s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_2D_MSAA
932+
// GFX12: encoding: [0x06,0x00,0xe1,0xd0,0x03,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
933+
934+
image_atomic_min_flt v[254:255], [v4, v5, v6, v7], s[96:103] dmask:0x3 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY
935+
// GFX12: encoding: [0x07,0x00,0xe1,0xd0,0xfe,0xc0,0x00,0x00,0x04,0x05,0x06,0x07]
936+
937+
image_atomic_min_flt v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_ATOMIC_NT
938+
// GFX12: encoding: [0x00,0x00,0x61,0xd0,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00]
939+
940+
image_atomic_max_flt v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D
941+
// GFX12: encoding: [0x00,0x40,0x61,0xd0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
942+
943+
image_atomic_max_flt v1, [v2, v3], s[4:11] dmask:0x1 dim:SQ_RSRC_IMG_2D
944+
// GFX12: encoding: [0x01,0x40,0x61,0xd0,0x01,0x08,0x00,0x00,0x02,0x03,0x00,0x00]
945+
946+
image_atomic_max_flt v4, [v4, v5, v6], s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_3D
947+
// GFX12: encoding: [0x02,0x40,0x61,0xd0,0x04,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
948+
949+
image_atomic_max_flt v255, [v4, v5, v6], s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_CUBE
950+
// GFX12: encoding: [0x03,0x40,0x61,0xd0,0xff,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
951+
952+
image_atomic_max_flt v[0:1], [v4, v5], s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_1D_ARRAY
953+
// GFX12: encoding: [0x04,0x40,0xe1,0xd0,0x00,0x10,0x00,0x00,0x04,0x05,0x00,0x00]
954+
955+
image_atomic_max_flt v[1:2], [v4, v5, v6], s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_2D_ARRAY
956+
// GFX12: encoding: [0x05,0x40,0xe1,0xd0,0x01,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
957+
958+
image_atomic_max_flt v[3:4], [v4, v5, v6], s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_2D_MSAA
959+
// GFX12: encoding: [0x06,0x40,0xe1,0xd0,0x03,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
960+
961+
image_atomic_max_flt v[254:255], [v4, v5, v6, v7], s[96:103] dmask:0x3 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY
962+
// GFX12: encoding: [0x07,0x40,0xe1,0xd0,0xfe,0xc0,0x00,0x00,0x04,0x05,0x06,0x07]
963+
964+
image_atomic_max_flt v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_ATOMIC_NT
965+
// GFX12: encoding: [0x00,0x40,0x61,0xd0,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00]
966+
886967
image_bvh_intersect_ray v[4:7], [v9, v10, v[11:13], v[14:16], v[17:19]], s[4:7]
887968
// GFX12: encoding: [0x10,0x40,0xc6,0xd3,0x04,0x08,0x00,0x11,0x09,0x0a,0x0b,0x0e]
888969

‎llvm/test/MC/AMDGPU/gfx12_asm_vimage_alias.s

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,3 +23,9 @@ image_atomic_inc v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D
2323

2424
image_atomic_dec v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D
2525
// GFX12: image_atomic_dec_uint v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D ; encoding: [0x00,0x80,0x45,0xd0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
26+
27+
image_atomic_min_num_flt v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D
28+
// GFX12: image_atomic_min_flt v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D ; encoding: [0x00,0x00,0x61,0xd0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
29+
30+
image_atomic_max_num_flt v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D
31+
// GFX12: image_atomic_max_flt v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D ; encoding: [0x00,0x40,0x61,0xd0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00]

‎llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vimage.txt

Lines changed: 81 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -883,6 +883,87 @@
883883
# GFX12: image_atomic_dec_uint v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_ATOMIC_NT ; encoding: [0x00,0x80,0x45,0xd0,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00]
884884
0x00,0x80,0x45,0xd0,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00
885885

886+
# GFX12: image_atomic_add_flt v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D ; encoding: [0x00,0xc0,0x60,0xd0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
887+
0x00,0xc0,0x60,0xd0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
888+
889+
# GFX12: image_atomic_add_flt v1, [v2, v3], s[4:11] dmask:0x1 dim:SQ_RSRC_IMG_2D ; encoding: [0x01,0xc0,0x60,0xd0,0x01,0x08,0x00,0x00,0x02,0x03,0x00,0x00]
890+
0x01,0xc0,0x60,0xd0,0x01,0x08,0x00,0x00,0x02,0x03,0x00,0x00
891+
892+
# GFX12: image_atomic_add_flt v4, [v4, v5, v6], s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_3D ; encoding: [0x02,0xc0,0x60,0xd0,0x04,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
893+
0x02,0xc0,0x60,0xd0,0x04,0x10,0x00,0x00,0x04,0x05,0x06,0x00
894+
895+
# GFX12: image_atomic_add_flt v255, [v4, v5, v6], s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_CUBE ; encoding: [0x03,0xc0,0x60,0xd0,0xff,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
896+
0x03,0xc0,0x60,0xd0,0xff,0x10,0x00,0x00,0x04,0x05,0x06,0x00
897+
898+
# GFX12: image_atomic_add_flt v[0:1], [v4, v5], s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_1D_ARRAY ; encoding: [0x04,0xc0,0xe0,0xd0,0x00,0x10,0x00,0x00,0x04,0x05,0x00,0x00]
899+
0x04,0xc0,0xe0,0xd0,0x00,0x10,0x00,0x00,0x04,0x05,0x00,0x00
900+
901+
# GFX12: image_atomic_add_flt v[1:2], [v4, v5, v6], s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_2D_ARRAY ; encoding: [0x05,0xc0,0xe0,0xd0,0x01,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
902+
0x05,0xc0,0xe0,0xd0,0x01,0x10,0x00,0x00,0x04,0x05,0x06,0x00
903+
904+
# GFX12: image_atomic_add_flt v[3:4], [v4, v5, v6], s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_2D_MSAA ; encoding: [0x06,0xc0,0xe0,0xd0,0x03,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
905+
0x06,0xc0,0xe0,0xd0,0x03,0x10,0x00,0x00,0x04,0x05,0x06,0x00
906+
907+
# GFX12: image_atomic_add_flt v[254:255], [v4, v5, v6, v7], s[96:103] dmask:0x3 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY ; encoding: [0x07,0xc0,0xe0,0xd0,0xfe,0xc0,0x00,0x00,0x04,0x05,0x06,0x07]
908+
0x07,0xc0,0xe0,0xd0,0xfe,0xc0,0x00,0x00,0x04,0x05,0x06,0x07
909+
910+
# GFX12: image_atomic_add_flt v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_ATOMIC_NT ; encoding: [0x00,0xc0,0x60,0xd0,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00]
911+
0x00,0xc0,0x60,0xd0,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00
912+
913+
# GFX12: image_atomic_min_flt v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D ; encoding: [0x00,0x00,0x61,0xd0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
914+
0x00,0x00,0x61,0xd0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
915+
916+
# GFX12: image_atomic_min_flt v1, [v2, v3], s[4:11] dmask:0x1 dim:SQ_RSRC_IMG_2D ; encoding: [0x01,0x00,0x61,0xd0,0x01,0x08,0x00,0x00,0x02,0x03,0x00,0x00]
917+
0x01,0x00,0x61,0xd0,0x01,0x08,0x00,0x00,0x02,0x03,0x00,0x00
918+
919+
# GFX12: image_atomic_min_flt v4, [v4, v5, v6], s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_3D ; encoding: [0x02,0x00,0x61,0xd0,0x04,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
920+
0x02,0x00,0x61,0xd0,0x04,0x10,0x00,0x00,0x04,0x05,0x06,0x00
921+
922+
# GFX12: image_atomic_min_flt v255, [v4, v5, v6], s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_CUBE ; encoding: [0x03,0x00,0x61,0xd0,0xff,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
923+
0x03,0x00,0x61,0xd0,0xff,0x10,0x00,0x00,0x04,0x05,0x06,0x00
924+
925+
# GFX12: image_atomic_min_flt v[0:1], [v4, v5], s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_1D_ARRAY ; encoding: [0x04,0x00,0xe1,0xd0,0x00,0x10,0x00,0x00,0x04,0x05,0x00,0x00]
926+
0x04,0x00,0xe1,0xd0,0x00,0x10,0x00,0x00,0x04,0x05,0x00,0x00
927+
928+
# GFX12: image_atomic_min_flt v[1:2], [v4, v5, v6], s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_2D_ARRAY ; encoding: [0x05,0x00,0xe1,0xd0,0x01,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
929+
0x05,0x00,0xe1,0xd0,0x01,0x10,0x00,0x00,0x04,0x05,0x06,0x00
930+
931+
# GFX12: image_atomic_min_flt v[3:4], [v4, v5, v6], s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_2D_MSAA ; encoding: [0x06,0x00,0xe1,0xd0,0x03,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
932+
0x06,0x00,0xe1,0xd0,0x03,0x10,0x00,0x00,0x04,0x05,0x06,0x00
933+
934+
# GFX12: image_atomic_min_flt v[254:255], [v4, v5, v6, v7], s[96:103] dmask:0x3 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY ; encoding: [0x07,0x00,0xe1,0xd0,0xfe,0xc0,0x00,0x00,0x04,0x05,0x06,0x07]
935+
0x07,0x00,0xe1,0xd0,0xfe,0xc0,0x00,0x00,0x04,0x05,0x06,0x07
936+
937+
# GFX12: image_atomic_min_flt v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_ATOMIC_NT ; encoding: [0x00,0x00,0x61,0xd0,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00]
938+
0x00,0x00,0x61,0xd0,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00
939+
940+
# GFX12: image_atomic_max_flt v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D ; encoding: [0x00,0x40,0x61,0xd0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
941+
0x00,0x40,0x61,0xd0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
942+
943+
# GFX12: image_atomic_max_flt v1, [v2, v3], s[4:11] dmask:0x1 dim:SQ_RSRC_IMG_2D ; encoding: [0x01,0x40,0x61,0xd0,0x01,0x08,0x00,0x00,0x02,0x03,0x00,0x00]
944+
0x01,0x40,0x61,0xd0,0x01,0x08,0x00,0x00,0x02,0x03,0x00,0x00
945+
946+
# GFX12: image_atomic_max_flt v4, [v4, v5, v6], s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_3D ; encoding: [0x02,0x40,0x61,0xd0,0x04,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
947+
0x02,0x40,0x61,0xd0,0x04,0x10,0x00,0x00,0x04,0x05,0x06,0x00
948+
949+
# GFX12: image_atomic_max_flt v255, [v4, v5, v6], s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_CUBE ; encoding: [0x03,0x40,0x61,0xd0,0xff,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
950+
0x03,0x40,0x61,0xd0,0xff,0x10,0x00,0x00,0x04,0x05,0x06,0x00
951+
952+
# GFX12: image_atomic_max_flt v[0:1], [v4, v5], s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_1D_ARRAY ; encoding: [0x04,0x40,0xe1,0xd0,0x00,0x10,0x00,0x00,0x04,0x05,0x00,0x00]
953+
0x04,0x40,0xe1,0xd0,0x00,0x10,0x00,0x00,0x04,0x05,0x00,0x00
954+
955+
# GFX12: image_atomic_max_flt v[1:2], [v4, v5, v6], s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_2D_ARRAY ; encoding: [0x05,0x40,0xe1,0xd0,0x01,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
956+
0x05,0x40,0xe1,0xd0,0x01,0x10,0x00,0x00,0x04,0x05,0x06,0x00
957+
958+
# GFX12: image_atomic_max_flt v[3:4], [v4, v5, v6], s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_2D_MSAA ; encoding: [0x06,0x40,0xe1,0xd0,0x03,0x10,0x00,0x00,0x04,0x05,0x06,0x00]
959+
0x06,0x40,0xe1,0xd0,0x03,0x10,0x00,0x00,0x04,0x05,0x06,0x00
960+
961+
# GFX12: image_atomic_max_flt v[254:255], [v4, v5, v6, v7], s[96:103] dmask:0x3 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY ; encoding: [0x07,0x40,0xe1,0xd0,0xfe,0xc0,0x00,0x00,0x04,0x05,0x06,0x07]
962+
0x07,0x40,0xe1,0xd0,0xfe,0xc0,0x00,0x00,0x04,0x05,0x06,0x07
963+
964+
# GFX12: image_atomic_max_flt v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_ATOMIC_NT ; encoding: [0x00,0x40,0x61,0xd0,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00]
965+
0x00,0x40,0x61,0xd0,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00
966+
886967
# GFX12: image_bvh_intersect_ray v[4:7], [v9, v10, v[11:13], v[14:16], v[17:19]], s[4:7] ; encoding: [0x10,0x40,0xc6,0xd3,0x04,0x08,0x00,0x11,0x09,0x0a,0x0b,0x0e]
887968
0x10,0x40,0xc6,0xd3,0x04,0x08,0x00,0x11,0x09,0x0a,0x0b,0x0e
888969

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