@@ -575,7 +575,7 @@ multiclass VALU_IV_X<string opcodestr, bits<6> funct6> {
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}
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multiclass VALU_IV_I<string opcodestr, bits<6> funct6> {
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- def I : VALUVI<funct6, opcodestr # ".vi", simm5 >,
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+ def I : VALUVI<funct6, opcodestr # ".vi">,
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SchedUnaryMC<"WriteVIALUI", "ReadVIALUV">;
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}
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@@ -661,7 +661,7 @@ multiclass VALUNoVm_IV_V_X<string opcodestr, bits<6> funct6> {
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multiclass VALUNoVm_IV_V_X_I<string opcodestr, bits<6> funct6>
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: VALUNoVm_IV_V_X<opcodestr, funct6> {
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- def I : VALUVINoVm<funct6, opcodestr # ".vi", simm5 >,
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+ def I : VALUVINoVm<funct6, opcodestr # ".vi">,
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SchedUnaryMC<"WriteVICALUI", "ReadVICALUV", forceMasked=0>;
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}
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@@ -900,7 +900,7 @@ multiclass VCMP_IV_X<string opcodestr, bits<6> funct6> {
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}
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multiclass VCMP_IV_I<string opcodestr, bits<6> funct6> {
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- def I : VALUVI<funct6, opcodestr # ".vi", simm5 >,
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+ def I : VALUVI<funct6, opcodestr # ".vi">,
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SchedUnaryMC<"WriteVICmpI", "ReadVICmpV">;
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}
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@@ -947,7 +947,7 @@ multiclass VSALU_IV_V_X<string opcodestr, bits<6> funct6> {
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multiclass VSALU_IV_V_X_I<string opcodestr, bits<6> funct6>
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: VSALU_IV_V_X<opcodestr, funct6> {
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- def I : VALUVI<funct6, opcodestr # ".vi", simm5 >,
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+ def I : VALUVI<funct6, opcodestr # ".vi">,
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SchedUnaryMC<"WriteVSALUI", "ReadVSALUV">;
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}
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