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| 1 | +// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.2-compute -finclude-default-header -fnative-half-type -emit-llvm -o - %s | FileCheck %s -check-prefixes=DXIL |
| 2 | + |
| 3 | +// NOTE: The number in type name and whether the struct is packed or not will mostly |
| 4 | +// likely change once subscript operators are properly implemented (llvm/llvm-project#95956) |
| 5 | +// and theinterim field of the contained type is removed. |
| 6 | + |
| 7 | +struct MyStruct { |
| 8 | + float4 a; |
| 9 | + int2 b; |
| 10 | +}; |
| 11 | + |
| 12 | +// DXIL: %"class.hlsl::RasterizerOrderedStructuredBuffer" = type <{ target("dx.RawBuffer", i16, 1, 1) |
| 13 | +// DXIL: %"class.hlsl::RasterizerOrderedStructuredBuffer.0" = type <{ target("dx.RawBuffer", i16, 1, 1) |
| 14 | +// DXIL: %"class.hlsl::RasterizerOrderedStructuredBuffer.2" = type { target("dx.RawBuffer", i32, 1, 1) |
| 15 | +// DXIL: %"class.hlsl::RasterizerOrderedStructuredBuffer.3" = type { target("dx.RawBuffer", i32, 1, 1) |
| 16 | +// DXIL: %"class.hlsl::RasterizerOrderedStructuredBuffer.4" = type { target("dx.RawBuffer", i64, 1, 1) |
| 17 | +// DXIL: %"class.hlsl::RasterizerOrderedStructuredBuffer.5" = type { target("dx.RawBuffer", i64, 1, 1) |
| 18 | +// DXIL: %"class.hlsl::RasterizerOrderedStructuredBuffer.6" = type <{ target("dx.RawBuffer", half, 1, 1) |
| 19 | +// DXIL: %"class.hlsl::RasterizerOrderedStructuredBuffer.8" = type { target("dx.RawBuffer", float, 1, 1) |
| 20 | +// DXIL: %"class.hlsl::RasterizerOrderedStructuredBuffer.9" = type { target("dx.RawBuffer", double, 1, 1) |
| 21 | +// DXIL: %"class.hlsl::RasterizerOrderedStructuredBuffer.10" = type { target("dx.RawBuffer", <4 x i16>, 1, 1) |
| 22 | +// DXIL: %"class.hlsl::RasterizerOrderedStructuredBuffer.11" = type { target("dx.RawBuffer", <3 x i32>, 1, 1) |
| 23 | +// DXIL: %"class.hlsl::RasterizerOrderedStructuredBuffer.12" = type { target("dx.RawBuffer", <2 x half>, 1, 1) |
| 24 | +// DXIL: %"class.hlsl::RasterizerOrderedStructuredBuffer.13" = type { target("dx.RawBuffer", <3 x float>, 1, 1) |
| 25 | +// DXIL: %"class.hlsl::RasterizerOrderedStructuredBuffer.14" = type { target("dx.RawBuffer", %struct.MyStruct = type { <4 x float>, <2 x i32>, [8 x i8] }, 1, 1) |
| 26 | + |
| 27 | +RasterizerOrderedStructuredBuffer<int16_t> BufI16; |
| 28 | +RasterizerOrderedStructuredBuffer<uint16_t> BufU16; |
| 29 | +RasterizerOrderedStructuredBuffer<int> BufI32; |
| 30 | +RasterizerOrderedStructuredBuffer<uint> BufU32; |
| 31 | +RasterizerOrderedStructuredBuffer<int64_t> BufI64; |
| 32 | +RasterizerOrderedStructuredBuffer<uint64_t> BufU64; |
| 33 | +RasterizerOrderedStructuredBuffer<half> BufF16; |
| 34 | +RasterizerOrderedStructuredBuffer<float> BufF32; |
| 35 | +RasterizerOrderedStructuredBuffer<double> BufF64; |
| 36 | +RasterizerOrderedStructuredBuffer< vector<int16_t, 4> > BufI16x4; |
| 37 | +RasterizerOrderedStructuredBuffer< vector<uint, 3> > BufU32x3; |
| 38 | +RasterizerOrderedStructuredBuffer<half2> BufF16x2; |
| 39 | +RasterizerOrderedStructuredBuffer<float3> BufF32x3; |
| 40 | +// TODO: RasterizerOrderedStructuredBuffer<snorm half> BufSNormF16; |
| 41 | +// TODO: RasterizerOrderedStructuredBuffer<unorm half> BufUNormF16; |
| 42 | +// TODO: RasterizerOrderedStructuredBuffer<snorm float> BufSNormF32; |
| 43 | +// TODO: RasterizerOrderedStructuredBuffer<unorm float> BufUNormF32; |
| 44 | +// TODO: RasterizerOrderedStructuredBuffer<snorm double> BufSNormF64; |
| 45 | +// TODO: RasterizerOrderedStructuredBuffer<unorm double> BufUNormF64; |
| 46 | +RasterizerOrderedStructuredBuffer<MyStruct> BufMyStruct; |
| 47 | + |
| 48 | +[numthreads(1,1,1)] |
| 49 | +void main(int GI : SV_GroupIndex) { |
| 50 | + BufI16[GI] = 0; |
| 51 | + BufU16[GI] = 0; |
| 52 | + BufI32[GI] = 0; |
| 53 | + BufU32[GI] = 0; |
| 54 | + BufI64[GI] = 0; |
| 55 | + BufU64[GI] = 0; |
| 56 | + BufF16[GI] = 0; |
| 57 | + BufF32[GI] = 0; |
| 58 | + BufF64[GI] = 0; |
| 59 | + BufI16x4[GI] = 0; |
| 60 | + BufU32x3[GI] = 0; |
| 61 | + BufF16x2[GI] = 0; |
| 62 | + BufF32x3[GI] = 0; |
| 63 | + BufMyStruct[GI] = {{0,0,0,0},{0,0}}; |
| 64 | +} |
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