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convert tests to filecheck
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‎llvm/test/CodeGen/SPIRV/structurizer/cf.for.continue.hlsl

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‎llvm/test/CodeGen/SPIRV/structurizer/cf.for.continue.ll

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; RUN: llc -mtriple=spirv-unknown-vulkan-compute -O0 %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-vulkan-compute %s -o - -filetype=obj | spirv-val %}
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; RUN: llc -mtriple=spirv-unknown-vulkan-compute -O0 %s -o - | spirv-sim --function=_Z7processv --wave=1 --expects=19
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;
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; int process() {
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; int val = 0;
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;
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; for (int i = 0; i < 10; ++i) {
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; if (i < 5) {
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; continue;
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; }
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; val = i;
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;
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; {
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; continue;
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; }
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; val++; // No SPIR-V should be emitted for this statement.
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; continue; // No SPIR-V should be emitted for this statement.
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; while(true); // No SPIR-V should be emitted for this statement.
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; }
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;
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; //////////////////////////////////////////////////////////////////////////////////////
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; // Nested for loops with continue statements //
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; // Each continue statement should branch to the corresponding loop's continue block //
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; //////////////////////////////////////////////////////////////////////////////////////
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;
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; for (int j = 0; j < 10; ++j) {
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; val = j+5;
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;
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; for ( ; val < 20; ++val) {
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; int k = val + j;
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; continue;
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; k++; // No SPIR-V should be emitted for this statement.
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; }
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;
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; val -= 1;
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; continue;
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; continue; // No SPIR-V should be emitted for this statement.
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; val = val*10; // No SPIR-V should be emitted for this statement.
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; }
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;
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; return val;
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; }
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;
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; [numthreads(1, 1, 1)]
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; void main() {
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; process();
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; }
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; CHECK: %[[#func_12:]] = OpFunction %[[#uint:]] DontInline %[[#]]
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; CHECK: %[[#bb44:]] = OpLabel
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; CHECK: OpBranch %[[#bb45:]]
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; CHECK: %[[#bb45:]] = OpLabel
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; CHECK: OpLoopMerge %[[#bb46:]] %[[#bb47:]] None
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; CHECK: OpBranchConditional %[[#]] %[[#bb48:]] %[[#bb46:]]
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; CHECK: %[[#bb46:]] = OpLabel
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; CHECK: OpBranch %[[#bb49:]]
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; CHECK: %[[#bb49:]] = OpLabel
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; CHECK: OpLoopMerge %[[#bb50:]] %[[#bb51:]] None
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; CHECK: OpBranchConditional %[[#]] %[[#bb52:]] %[[#bb50:]]
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; CHECK: %[[#bb50:]] = OpLabel
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; CHECK: OpReturnValue %[[#]]
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; CHECK: %[[#bb52:]] = OpLabel
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; CHECK: OpBranch %[[#bb53:]]
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; CHECK: %[[#bb53:]] = OpLabel
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; CHECK: OpLoopMerge %[[#bb54:]] %[[#bb55:]] None
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; CHECK: OpBranchConditional %[[#]] %[[#bb56:]] %[[#bb54:]]
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; CHECK: %[[#bb54:]] = OpLabel
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; CHECK: OpBranch %[[#bb51:]]
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; CHECK: %[[#bb51:]] = OpLabel
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; CHECK: OpBranch %[[#bb49:]]
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; CHECK: %[[#bb56:]] = OpLabel
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; CHECK: OpBranch %[[#bb55:]]
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; CHECK: %[[#bb55:]] = OpLabel
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; CHECK: OpBranch %[[#bb53:]]
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; CHECK: %[[#bb48:]] = OpLabel
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; CHECK: OpSelectionMerge %[[#bb57:]] None
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; CHECK: OpBranchConditional %[[#]] %[[#bb57:]] %[[#bb58:]]
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; CHECK: %[[#bb58:]] = OpLabel
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; CHECK: OpBranch %[[#bb57:]]
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; CHECK: %[[#bb57:]] = OpLabel
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; CHECK: OpBranch %[[#bb47:]]
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; CHECK: %[[#bb47:]] = OpLabel
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; CHECK: OpBranch %[[#bb45:]]
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; CHECK: OpFunctionEnd
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; CHECK: %[[#func_40:]] = OpFunction %[[#void:]] DontInline %[[#]]
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; CHECK: %[[#bb59:]] = OpLabel
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; CHECK: OpReturn
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; CHECK: OpFunctionEnd
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; CHECK: %[[#func_42:]] = OpFunction %[[#void:]] None %[[#]]
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; CHECK: %[[#bb60:]] = OpLabel
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; CHECK: OpReturn
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; CHECK: OpFunctionEnd
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target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-G1"
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target triple = "spirv-unknown-vulkan1.3-compute"
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; Function Attrs: convergent noinline norecurse nounwind optnone
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define spir_func noundef i32 @_Z7processv() #0 {
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entry:
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%0 = call token @llvm.experimental.convergence.entry()
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%val = alloca i32, align 4
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%i = alloca i32, align 4
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%j = alloca i32, align 4
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%k = alloca i32, align 4
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store i32 0, ptr %val, align 4
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store i32 0, ptr %i, align 4
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br label %for.cond
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for.cond: ; preds = %for.inc, %entry
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%1 = call token @llvm.experimental.convergence.loop() [ "convergencectrl"(token %0) ]
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%2 = load i32, ptr %i, align 4
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%cmp = icmp slt i32 %2, 10
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br i1 %cmp, label %for.body, label %for.end
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for.body: ; preds = %for.cond
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%3 = load i32, ptr %i, align 4
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%cmp1 = icmp slt i32 %3, 5
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br i1 %cmp1, label %if.then, label %if.end
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if.then: ; preds = %for.body
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br label %for.inc
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if.end: ; preds = %for.body
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%4 = load i32, ptr %i, align 4
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store i32 %4, ptr %val, align 4
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br label %for.inc
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for.inc: ; preds = %if.end, %if.then
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%5 = load i32, ptr %i, align 4
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%inc = add nsw i32 %5, 1
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store i32 %inc, ptr %i, align 4
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br label %for.cond
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for.end: ; preds = %for.cond
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store i32 0, ptr %j, align 4
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br label %for.cond2
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for.cond2: ; preds = %for.inc12, %for.end
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%6 = call token @llvm.experimental.convergence.loop() [ "convergencectrl"(token %0) ]
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%7 = load i32, ptr %j, align 4
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%cmp3 = icmp slt i32 %7, 10
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br i1 %cmp3, label %for.body4, label %for.end14
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for.body4: ; preds = %for.cond2
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%8 = load i32, ptr %j, align 4
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%add = add nsw i32 %8, 5
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store i32 %add, ptr %val, align 4
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br label %for.cond5
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for.cond5: ; preds = %for.inc9, %for.body4
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%9 = call token @llvm.experimental.convergence.loop() [ "convergencectrl"(token %6) ]
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%10 = load i32, ptr %val, align 4
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%cmp6 = icmp slt i32 %10, 20
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br i1 %cmp6, label %for.body7, label %for.end11
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for.body7: ; preds = %for.cond5
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%11 = load i32, ptr %val, align 4
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%12 = load i32, ptr %j, align 4
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%add8 = add nsw i32 %11, %12
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store i32 %add8, ptr %k, align 4
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br label %for.inc9
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for.inc9: ; preds = %for.body7
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%13 = load i32, ptr %val, align 4
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%inc10 = add nsw i32 %13, 1
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store i32 %inc10, ptr %val, align 4
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br label %for.cond5
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for.end11: ; preds = %for.cond5
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%14 = load i32, ptr %val, align 4
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%sub = sub nsw i32 %14, 1
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store i32 %sub, ptr %val, align 4
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br label %for.inc12
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for.inc12: ; preds = %for.end11
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%15 = load i32, ptr %j, align 4
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%inc13 = add nsw i32 %15, 1
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store i32 %inc13, ptr %j, align 4
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br label %for.cond2
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for.end14: ; preds = %for.cond2
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%16 = load i32, ptr %val, align 4
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ret i32 %16
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}
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; Function Attrs: convergent nocallback nofree nosync nounwind willreturn memory(none)
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declare token @llvm.experimental.convergence.entry() #1
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; Function Attrs: convergent nocallback nofree nosync nounwind willreturn memory(none)
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declare token @llvm.experimental.convergence.loop() #1
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; Function Attrs: convergent noinline norecurse nounwind optnone
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define internal spir_func void @main() #0 {
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entry:
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%0 = call token @llvm.experimental.convergence.entry()
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%call1 = call spir_func noundef i32 @_Z7processv() #3 [ "convergencectrl"(token %0) ]
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ret void
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}
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; Function Attrs: convergent norecurse
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define void @main.1() #2 {
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entry:
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call void @main()
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ret void
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}
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attributes #0 = { convergent noinline norecurse nounwind optnone "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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attributes #1 = { convergent nocallback nofree nosync nounwind willreturn memory(none) }
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attributes #2 = { convergent norecurse "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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attributes #3 = { convergent }
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!llvm.module.flags = !{!0, !1, !2}
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!0 = !{i32 1, !"wchar_size", i32 4}
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!1 = !{i32 4, !"dx.disable_optimizations", i32 1}
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!2 = !{i32 7, !"frame-pointer", i32 2}
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‎llvm/test/CodeGen/SPIRV/structurizer/cf.for.nested.hlsl

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