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[AMDGPU][NFC] Eliminate unnecessary TableGen casts. (#71802)
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llvm/lib/Target/AMDGPU/VOP3PInstructions.td

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -353,23 +353,23 @@ foreach Type = ["I", "U"] in
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(!cast<Extract>(Type#Index#"_4bit") node:$src1))>;
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}
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356-
class UDot2Pat<Instruction Inst> : GCNPat <
356+
class UDot2Pat<VOP_Pseudo Inst> : GCNPat <
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(add (add_oneuse (AMDGPUmul_u24_oneuse (srl i32:$src0, (i32 16)),
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(srl i32:$src1, (i32 16))), i32:$src2),
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(AMDGPUmul_u24_oneuse (and i32:$src0, (i32 65535)),
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(and i32:$src1, (i32 65535)))
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),
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(Inst (i32 8), $src0, (i32 8), $src1, (i32 8), $src2, (i1 0))> {
363-
let Predicates = !cast<VOP_Pseudo>(Inst).Predicates;
363+
let Predicates = Inst.Predicates;
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}
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366-
class SDot2Pat<Instruction Inst> : GCNPat <
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class SDot2Pat<VOP_Pseudo Inst> : GCNPat <
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(add (add_oneuse (AMDGPUmul_i24_oneuse (sra i32:$src0, (i32 16)),
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(sra i32:$src1, (i32 16))), i32:$src2),
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(AMDGPUmul_i24_oneuse (sext_inreg i32:$src0, i16),
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(sext_inreg i32:$src1, i16))),
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(Inst (i32 8), $src0, (i32 8), $src1, (i32 8), $src2, (i1 0))> {
372-
let Predicates = !cast<VOP_Pseudo>(Inst).Predicates;
372+
let Predicates = Inst.Predicates;
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}
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let IsDOT = 1 in {

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