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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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- ; RUN: llc < %s -mtriple=i386-unknown-unknown -disable-cgp-branch-opts | FileCheck %s --check-prefix=X32
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+ ; RUN: llc < %s -mtriple=i386-unknown-unknown -disable-cgp-branch-opts | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -disable-cgp-branch-opts | FileCheck %s --check-prefix=X64
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; rdar://7573216
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; PR6146
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define i32 @t1 (i32 %x ) nounwind readnone ssp {
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- ; X32 -LABEL: t1:
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- ; X32 : # %bb.0:
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- ; X32 -NEXT: xorl %eax, %eax
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- ; X32 -NEXT: cmpl $1, {{[0-9]+}}(%esp)
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- ; X32 -NEXT: sbbl %eax, %eax
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- ; X32 -NEXT: retl
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+ ; X86 -LABEL: t1:
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+ ; X86 : # %bb.0:
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+ ; X86 -NEXT: xorl %eax, %eax
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+ ; X86 -NEXT: cmpl $1, {{[0-9]+}}(%esp)
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+ ; X86 -NEXT: sbbl %eax, %eax
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+ ; X86 -NEXT: retl
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;
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; X64-LABEL: t1:
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; X64: # %bb.0:
@@ -25,12 +25,12 @@ define i32 @t1(i32 %x) nounwind readnone ssp {
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}
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define i32 @t2 (i32 %x ) nounwind readnone ssp {
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- ; X32 -LABEL: t2:
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- ; X32 : # %bb.0:
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- ; X32 -NEXT: xorl %eax, %eax
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- ; X32 -NEXT: cmpl $1, {{[0-9]+}}(%esp)
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- ; X32 -NEXT: sbbl %eax, %eax
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- ; X32 -NEXT: retl
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+ ; X86 -LABEL: t2:
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+ ; X86 : # %bb.0:
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+ ; X86 -NEXT: xorl %eax, %eax
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+ ; X86 -NEXT: cmpl $1, {{[0-9]+}}(%esp)
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+ ; X86 -NEXT: sbbl %eax, %eax
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+ ; X86 -NEXT: retl
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;
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; X64-LABEL: t2:
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; X64: # %bb.0:
@@ -44,16 +44,16 @@ define i32 @t2(i32 %x) nounwind readnone ssp {
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}
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define i32 @t3 (i32 %x , i64 %y ) nounwind readonly {
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- ; X32 -LABEL: t3:
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- ; X32 : # %bb.0: # %entry
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- ; X32 -NEXT: movl {{[0-9]+}}(%esp), %eax
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- ; X32 -NEXT: xorl %ecx, %ecx
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- ; X32 -NEXT: cmpl $1, {{[0-9]+}}(%esp)
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- ; X32 -NEXT: sbbl %ecx, %ecx
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- ; X32 -NEXT: cmpl %ecx, {{[0-9]+}}(%esp)
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- ; X32 -NEXT: sbbl %ecx, %eax
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- ; X32 -NEXT: xorl %eax, %eax
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- ; X32 -NEXT: retl
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+ ; X86 -LABEL: t3:
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+ ; X86 : # %bb.0: # %entry
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+ ; X86 -NEXT: movl {{[0-9]+}}(%esp), %eax
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+ ; X86 -NEXT: xorl %ecx, %ecx
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+ ; X86 -NEXT: cmpl $1, {{[0-9]+}}(%esp)
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+ ; X86 -NEXT: sbbl %ecx, %ecx
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+ ; X86 -NEXT: cmpl %ecx, {{[0-9]+}}(%esp)
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+ ; X86 -NEXT: sbbl %ecx, %eax
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+ ; X86 -NEXT: xorl %eax, %eax
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+ ; X86 -NEXT: retl
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;
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; X64-LABEL: t3:
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; X64: # %bb.0: # %entry
@@ -81,14 +81,14 @@ if.end:
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}
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define i32 @t4 (i64 %x ) nounwind readnone ssp {
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- ; X32 -LABEL: t4:
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- ; X32 : # %bb.0:
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- ; X32 -NEXT: movl {{[0-9]+}}(%esp), %ecx
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- ; X32 -NEXT: xorl %eax, %eax
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- ; X32 -NEXT: orl {{[0-9]+}}(%esp), %ecx
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- ; X32 -NEXT: sete %al
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- ; X32 -NEXT: negl %eax
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- ; X32 -NEXT: retl
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+ ; X86 -LABEL: t4:
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+ ; X86 : # %bb.0:
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+ ; X86 -NEXT: movl {{[0-9]+}}(%esp), %ecx
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+ ; X86 -NEXT: xorl %eax, %eax
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+ ; X86 -NEXT: orl {{[0-9]+}}(%esp), %ecx
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+ ; X86 -NEXT: sete %al
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+ ; X86 -NEXT: negl %eax
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+ ; X86 -NEXT: retl
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;
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; X64-LABEL: t4:
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; X64: # %bb.0:
@@ -102,13 +102,13 @@ define i32 @t4(i64 %x) nounwind readnone ssp {
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}
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define i64 @t5 (i32 %x ) nounwind readnone ssp {
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- ; X32 -LABEL: t5:
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- ; X32 : # %bb.0:
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- ; X32 -NEXT: xorl %eax, %eax
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- ; X32 -NEXT: cmpl $1, {{[0-9]+}}(%esp)
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- ; X32 -NEXT: sbbl %eax, %eax
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- ; X32 -NEXT: movl %eax, %edx
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- ; X32 -NEXT: retl
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+ ; X86 -LABEL: t5:
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+ ; X86 : # %bb.0:
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+ ; X86 -NEXT: xorl %eax, %eax
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+ ; X86 -NEXT: cmpl $1, {{[0-9]+}}(%esp)
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+ ; X86 -NEXT: sbbl %eax, %eax
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+ ; X86 -NEXT: movl %eax, %edx
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+ ; X86 -NEXT: retl
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;
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; X64-LABEL: t5:
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; X64: # %bb.0:
@@ -124,12 +124,12 @@ define i64 @t5(i32 %x) nounwind readnone ssp {
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; sext (xor Bool, -1) --> sub (zext Bool), 1
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define i32 @select_0_or_1s (i1 %cond ) {
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- ; X32 -LABEL: select_0_or_1s:
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- ; X32 : # %bb.0:
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- ; X32 -NEXT: movzbl {{[0-9]+}}(%esp), %eax
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- ; X32 -NEXT: andl $1, %eax
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- ; X32 -NEXT: decl %eax
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- ; X32 -NEXT: retl
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+ ; X86 -LABEL: select_0_or_1s:
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+ ; X86 : # %bb.0:
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+ ; X86 -NEXT: movzbl {{[0-9]+}}(%esp), %eax
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+ ; X86 -NEXT: andl $1, %eax
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+ ; X86 -NEXT: decl %eax
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+ ; X86 -NEXT: retl
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;
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; X64-LABEL: select_0_or_1s:
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; X64: # %bb.0:
@@ -145,11 +145,11 @@ define i32 @select_0_or_1s(i1 %cond) {
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; sext (xor Bool, -1) --> sub (zext Bool), 1
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define i32 @select_0_or_1s_zeroext (i1 zeroext %cond ) {
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- ; X32 -LABEL: select_0_or_1s_zeroext:
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- ; X32 : # %bb.0:
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- ; X32 -NEXT: movzbl {{[0-9]+}}(%esp), %eax
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- ; X32 -NEXT: decl %eax
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- ; X32 -NEXT: retl
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+ ; X86 -LABEL: select_0_or_1s_zeroext:
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+ ; X86 : # %bb.0:
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+ ; X86 -NEXT: movzbl {{[0-9]+}}(%esp), %eax
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+ ; X86 -NEXT: decl %eax
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+ ; X86 -NEXT: retl
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;
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; X64-LABEL: select_0_or_1s_zeroext:
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; X64: # %bb.0:
@@ -164,12 +164,12 @@ define i32 @select_0_or_1s_zeroext(i1 zeroext %cond) {
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; sext (xor Bool, -1) --> sub (zext Bool), 1
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define i32 @select_0_or_1s_signext (i1 signext %cond ) {
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- ; X32 -LABEL: select_0_or_1s_signext:
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- ; X32 : # %bb.0:
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- ; X32 -NEXT: movzbl {{[0-9]+}}(%esp), %eax
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- ; X32 -NEXT: andl $1, %eax
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- ; X32 -NEXT: decl %eax
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- ; X32 -NEXT: retl
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+ ; X86 -LABEL: select_0_or_1s_signext:
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+ ; X86 : # %bb.0:
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+ ; X86 -NEXT: movzbl {{[0-9]+}}(%esp), %eax
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+ ; X86 -NEXT: andl $1, %eax
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+ ; X86 -NEXT: decl %eax
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+ ; X86 -NEXT: retl
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;
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; X64-LABEL: select_0_or_1s_signext:
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; X64: # %bb.0:
@@ -182,11 +182,11 @@ define i32 @select_0_or_1s_signext(i1 signext %cond) {
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}
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define i32 @zext_decrement_sext (i8 %x ) {
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- ; X32 -LABEL: zext_decrement_sext:
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- ; X32 : # %bb.0:
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- ; X32 -NEXT: movzbl {{[0-9]+}}(%esp), %eax
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- ; X32 -NEXT: decl %eax
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- ; X32 -NEXT: retl
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+ ; X86 -LABEL: zext_decrement_sext:
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+ ; X86 : # %bb.0:
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+ ; X86 -NEXT: movzbl {{[0-9]+}}(%esp), %eax
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+ ; X86 -NEXT: decl %eax
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+ ; X86 -NEXT: retl
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;
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; X64-LABEL: zext_decrement_sext:
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; X64: # %bb.0:
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