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[X86] sext-i1.ll - replace X32 check prefixes with X86
We try to only use X32 for gnux32 triple tests.
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llvm/test/CodeGen/X86/sext-i1.ll

Lines changed: 60 additions & 60 deletions
Original file line numberDiff line numberDiff line change
@@ -1,17 +1,17 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=i386-unknown-unknown -disable-cgp-branch-opts | FileCheck %s --check-prefix=X32
2+
; RUN: llc < %s -mtriple=i386-unknown-unknown -disable-cgp-branch-opts | FileCheck %s --check-prefix=X86
33
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -disable-cgp-branch-opts | FileCheck %s --check-prefix=X64
44

55
; rdar://7573216
66
; PR6146
77

88
define i32 @t1(i32 %x) nounwind readnone ssp {
9-
; X32-LABEL: t1:
10-
; X32: # %bb.0:
11-
; X32-NEXT: xorl %eax, %eax
12-
; X32-NEXT: cmpl $1, {{[0-9]+}}(%esp)
13-
; X32-NEXT: sbbl %eax, %eax
14-
; X32-NEXT: retl
9+
; X86-LABEL: t1:
10+
; X86: # %bb.0:
11+
; X86-NEXT: xorl %eax, %eax
12+
; X86-NEXT: cmpl $1, {{[0-9]+}}(%esp)
13+
; X86-NEXT: sbbl %eax, %eax
14+
; X86-NEXT: retl
1515
;
1616
; X64-LABEL: t1:
1717
; X64: # %bb.0:
@@ -25,12 +25,12 @@ define i32 @t1(i32 %x) nounwind readnone ssp {
2525
}
2626

2727
define i32 @t2(i32 %x) nounwind readnone ssp {
28-
; X32-LABEL: t2:
29-
; X32: # %bb.0:
30-
; X32-NEXT: xorl %eax, %eax
31-
; X32-NEXT: cmpl $1, {{[0-9]+}}(%esp)
32-
; X32-NEXT: sbbl %eax, %eax
33-
; X32-NEXT: retl
28+
; X86-LABEL: t2:
29+
; X86: # %bb.0:
30+
; X86-NEXT: xorl %eax, %eax
31+
; X86-NEXT: cmpl $1, {{[0-9]+}}(%esp)
32+
; X86-NEXT: sbbl %eax, %eax
33+
; X86-NEXT: retl
3434
;
3535
; X64-LABEL: t2:
3636
; X64: # %bb.0:
@@ -44,16 +44,16 @@ define i32 @t2(i32 %x) nounwind readnone ssp {
4444
}
4545

4646
define i32 @t3(i32 %x, i64 %y) nounwind readonly {
47-
; X32-LABEL: t3:
48-
; X32: # %bb.0: # %entry
49-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
50-
; X32-NEXT: xorl %ecx, %ecx
51-
; X32-NEXT: cmpl $1, {{[0-9]+}}(%esp)
52-
; X32-NEXT: sbbl %ecx, %ecx
53-
; X32-NEXT: cmpl %ecx, {{[0-9]+}}(%esp)
54-
; X32-NEXT: sbbl %ecx, %eax
55-
; X32-NEXT: xorl %eax, %eax
56-
; X32-NEXT: retl
47+
; X86-LABEL: t3:
48+
; X86: # %bb.0: # %entry
49+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
50+
; X86-NEXT: xorl %ecx, %ecx
51+
; X86-NEXT: cmpl $1, {{[0-9]+}}(%esp)
52+
; X86-NEXT: sbbl %ecx, %ecx
53+
; X86-NEXT: cmpl %ecx, {{[0-9]+}}(%esp)
54+
; X86-NEXT: sbbl %ecx, %eax
55+
; X86-NEXT: xorl %eax, %eax
56+
; X86-NEXT: retl
5757
;
5858
; X64-LABEL: t3:
5959
; X64: # %bb.0: # %entry
@@ -81,14 +81,14 @@ if.end:
8181
}
8282

8383
define i32 @t4(i64 %x) nounwind readnone ssp {
84-
; X32-LABEL: t4:
85-
; X32: # %bb.0:
86-
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
87-
; X32-NEXT: xorl %eax, %eax
88-
; X32-NEXT: orl {{[0-9]+}}(%esp), %ecx
89-
; X32-NEXT: sete %al
90-
; X32-NEXT: negl %eax
91-
; X32-NEXT: retl
84+
; X86-LABEL: t4:
85+
; X86: # %bb.0:
86+
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
87+
; X86-NEXT: xorl %eax, %eax
88+
; X86-NEXT: orl {{[0-9]+}}(%esp), %ecx
89+
; X86-NEXT: sete %al
90+
; X86-NEXT: negl %eax
91+
; X86-NEXT: retl
9292
;
9393
; X64-LABEL: t4:
9494
; X64: # %bb.0:
@@ -102,13 +102,13 @@ define i32 @t4(i64 %x) nounwind readnone ssp {
102102
}
103103

104104
define i64 @t5(i32 %x) nounwind readnone ssp {
105-
; X32-LABEL: t5:
106-
; X32: # %bb.0:
107-
; X32-NEXT: xorl %eax, %eax
108-
; X32-NEXT: cmpl $1, {{[0-9]+}}(%esp)
109-
; X32-NEXT: sbbl %eax, %eax
110-
; X32-NEXT: movl %eax, %edx
111-
; X32-NEXT: retl
105+
; X86-LABEL: t5:
106+
; X86: # %bb.0:
107+
; X86-NEXT: xorl %eax, %eax
108+
; X86-NEXT: cmpl $1, {{[0-9]+}}(%esp)
109+
; X86-NEXT: sbbl %eax, %eax
110+
; X86-NEXT: movl %eax, %edx
111+
; X86-NEXT: retl
112112
;
113113
; X64-LABEL: t5:
114114
; X64: # %bb.0:
@@ -124,12 +124,12 @@ define i64 @t5(i32 %x) nounwind readnone ssp {
124124
; sext (xor Bool, -1) --> sub (zext Bool), 1
125125

126126
define i32 @select_0_or_1s(i1 %cond) {
127-
; X32-LABEL: select_0_or_1s:
128-
; X32: # %bb.0:
129-
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
130-
; X32-NEXT: andl $1, %eax
131-
; X32-NEXT: decl %eax
132-
; X32-NEXT: retl
127+
; X86-LABEL: select_0_or_1s:
128+
; X86: # %bb.0:
129+
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
130+
; X86-NEXT: andl $1, %eax
131+
; X86-NEXT: decl %eax
132+
; X86-NEXT: retl
133133
;
134134
; X64-LABEL: select_0_or_1s:
135135
; X64: # %bb.0:
@@ -145,11 +145,11 @@ define i32 @select_0_or_1s(i1 %cond) {
145145
; sext (xor Bool, -1) --> sub (zext Bool), 1
146146

147147
define i32 @select_0_or_1s_zeroext(i1 zeroext %cond) {
148-
; X32-LABEL: select_0_or_1s_zeroext:
149-
; X32: # %bb.0:
150-
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
151-
; X32-NEXT: decl %eax
152-
; X32-NEXT: retl
148+
; X86-LABEL: select_0_or_1s_zeroext:
149+
; X86: # %bb.0:
150+
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
151+
; X86-NEXT: decl %eax
152+
; X86-NEXT: retl
153153
;
154154
; X64-LABEL: select_0_or_1s_zeroext:
155155
; X64: # %bb.0:
@@ -164,12 +164,12 @@ define i32 @select_0_or_1s_zeroext(i1 zeroext %cond) {
164164
; sext (xor Bool, -1) --> sub (zext Bool), 1
165165

166166
define i32 @select_0_or_1s_signext(i1 signext %cond) {
167-
; X32-LABEL: select_0_or_1s_signext:
168-
; X32: # %bb.0:
169-
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
170-
; X32-NEXT: andl $1, %eax
171-
; X32-NEXT: decl %eax
172-
; X32-NEXT: retl
167+
; X86-LABEL: select_0_or_1s_signext:
168+
; X86: # %bb.0:
169+
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
170+
; X86-NEXT: andl $1, %eax
171+
; X86-NEXT: decl %eax
172+
; X86-NEXT: retl
173173
;
174174
; X64-LABEL: select_0_or_1s_signext:
175175
; X64: # %bb.0:
@@ -182,11 +182,11 @@ define i32 @select_0_or_1s_signext(i1 signext %cond) {
182182
}
183183

184184
define i32 @zext_decrement_sext(i8 %x) {
185-
; X32-LABEL: zext_decrement_sext:
186-
; X32: # %bb.0:
187-
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
188-
; X32-NEXT: decl %eax
189-
; X32-NEXT: retl
185+
; X86-LABEL: zext_decrement_sext:
186+
; X86: # %bb.0:
187+
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
188+
; X86-NEXT: decl %eax
189+
; X86-NEXT: retl
190190
;
191191
; X64-LABEL: zext_decrement_sext:
192192
; X64: # %bb.0:

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