Skip to content

Commit 3abbe78

Browse files
committed
[DAGCombiner] In mergeTruncStore, make sure we aren't storing shifted in bits.
When looking through a right shift, we need to make sure that all of the bits we are using from the shift come from the shift input and not the sign or zero bits that are shifted in. Fixes #90936.
1 parent 54d6f66 commit 3abbe78

File tree

2 files changed

+8
-2
lines changed

2 files changed

+8
-2
lines changed

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8840,6 +8840,10 @@ SDValue DAGCombiner::mergeTruncStores(StoreSDNode *N) {
88408840
if (ShiftAmtC % NarrowNumBits != 0)
88418841
return SDValue();
88428842

8843+
// Make sure we aren't reading bits that are shifted in.
8844+
if (ShiftAmtC > WideVal.getScalarValueSizeInBits() - NarrowNumBits)
8845+
return SDValue();
8846+
88438847
Offset = ShiftAmtC / NarrowNumBits;
88448848
WideVal = WideVal.getOperand(0);
88458849
}

llvm/test/CodeGen/AArch64/pr90936.ll

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,8 +3,10 @@
33

44
define void @f(i16 %arg, ptr %arg1) {
55
; CHECK-LABEL: f:
6-
; CHECK: // %bb.0: // %bb
7-
; CHECK-NEXT: strh w0, [x1]
6+
; CHECK: // %bb.0:
7+
; CHECK-NEXT: ubfx w8, w0, #8, #6
8+
; CHECK-NEXT: strb w0, [x1]
9+
; CHECK-NEXT: strb w8, [x1, #1]
810
; CHECK-NEXT: ret
911
bb:
1012
%i = trunc i16 %arg to i8

0 commit comments

Comments
 (0)