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[Codegen] Revert rL354676/rL354677 and followups - introduced PR43446 miscompile
This reverts https://reviews.llvm.org/D58468 (rL354676, 44037d7), and all and any follow-ups to that code block. https://bugs.llvm.org/show_bug.cgi?id=43446 (cherry picked from commit d20907d)
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-40
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7 files changed

+67
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llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 0 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -16510,33 +16510,6 @@ SDValue DAGCombiner::visitSTORE(SDNode *N) {
1651016510
CombineTo(ST1, ST1->getChain());
1651116511
return SDValue();
1651216512
}
16513-
16514-
// If ST stores to a subset of preceding store's write set, we may be
16515-
// able to fold ST's value into the preceding stored value. As we know
16516-
// the other uses of ST1's chain are unconcerned with ST, this folding
16517-
// will not affect those nodes.
16518-
int64_t BitOffset;
16519-
if (ChainBase.contains(DAG, ChainBitSize, STBase, STBitSize,
16520-
BitOffset)) {
16521-
SDValue ChainValue = ST1->getValue();
16522-
if (auto *C1 = dyn_cast<ConstantSDNode>(ChainValue)) {
16523-
if (auto *C = dyn_cast<ConstantSDNode>(Value)) {
16524-
APInt Val = C1->getAPIntValue();
16525-
APInt InsertVal = C->getAPIntValue().zextOrTrunc(STBitSize);
16526-
// FIXME: Handle Big-endian mode.
16527-
if (!DAG.getDataLayout().isBigEndian()) {
16528-
Val.insertBits(InsertVal, BitOffset);
16529-
SDValue NewSDVal =
16530-
DAG.getConstant(Val, SDLoc(C), ChainValue.getValueType(),
16531-
C1->isTargetOpcode(), C1->isOpaque());
16532-
SDNode *NewST1 = DAG.UpdateNodeOperands(
16533-
ST1, ST1->getChain(), NewSDVal, ST1->getOperand(2),
16534-
ST1->getOperand(3));
16535-
return CombineTo(ST, SDValue(NewST1, 0));
16536-
}
16537-
}
16538-
}
16539-
} // End ST subset of ST1 case.
1654016513
}
1654116514
}
1654216515
}

llvm/test/CodeGen/AArch64/ldst-paired-aliasing.ll

Lines changed: 27 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
12
; RUN: llc -mcpu cortex-a53 < %s | FileCheck %s
23
target datalayout = "e-m:e-i64:64-i128:128-n8:16:32:64-S128"
34
target triple = "aarch64--linux-gnu"
@@ -10,11 +11,33 @@ declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) #3
1011
define i32 @main() local_unnamed_addr #1 {
1112
; Make sure the stores happen in the correct order (the exact instructions could change).
1213
; CHECK-LABEL: main:
14+
; CHECK: // %bb.0: // %for.body.lr.ph.i.i.i.i.i.i63
15+
; CHECK-NEXT: sub sp, sp, #112 // =112
16+
; CHECK-NEXT: str x30, [sp, #96] // 8-byte Folded Spill
17+
; CHECK-NEXT: .cfi_def_cfa_offset 112
18+
; CHECK-NEXT: .cfi_offset w30, -16
19+
; CHECK-NEXT: bl _Z5setupv
20+
; CHECK-NEXT: movi v0.4s, #1
21+
; CHECK-NEXT: mov w9, #1
22+
; CHECK-NEXT: add x0, sp, #48 // =48
23+
; CHECK-NEXT: mov x1, sp
24+
; CHECK-NEXT: str xzr, [sp, #80]
25+
; CHECK-NEXT: str w9, [sp, #80]
26+
; CHECK-NEXT: stp q0, q0, [sp, #48]
27+
; CHECK-NEXT: ldr w8, [sp, #48]
28+
; CHECK-NEXT: cmp w8, #1 // =1
29+
; CHECK-NEXT: b.ne .LBB0_2
30+
; CHECK-NEXT: // %bb.1: // %for.inc
31+
; CHECK-NEXT: bl f
32+
; CHECK-NEXT: b .LBB0_3
33+
; CHECK-NEXT: .LBB0_2: // %if.then
34+
; CHECK-NEXT: bl f2
35+
; CHECK-NEXT: .LBB0_3: // %for.inc
36+
; CHECK-NEXT: ldr x30, [sp, #96] // 8-byte Folded Reload
37+
; CHECK-NEXT: mov w0, wzr
38+
; CHECK-NEXT: add sp, sp, #112 // =112
39+
; CHECK-NEXT: ret
1340

14-
; CHECK: mov w9, #1
15-
; CHECK: str x9, [sp, #80]
16-
; CHECK: stp q0, q0, [sp, #48]
17-
; CHECK: ldr w8, [sp, #48]
1841

1942
for.body.lr.ph.i.i.i.i.i.i63:
2043
%b1 = alloca [10 x i32], align 16

llvm/test/CodeGen/PowerPC/constant-combines.ll

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -13,8 +13,10 @@ define void @fold_constant_stores_loaddr(i8* %i8_ptr) {
1313
;
1414
; LE-LABEL: fold_constant_stores_loaddr:
1515
; LE: # %bb.0: # %entry
16-
; LE-NEXT: li 4, 170
16+
; LE-NEXT: li 4, 0
17+
; LE-NEXT: li 5, -86
1718
; LE-NEXT: std 4, 0(3)
19+
; LE-NEXT: stb 5, 0(3)
1820
; LE-NEXT: blr
1921
entry:
2022
%i64_ptr = bitcast i8* %i8_ptr to i64*
@@ -35,8 +37,10 @@ define void @fold_constant_stores_hiaddr(i8* %i8_ptr) {
3537
;
3638
; LE-LABEL: fold_constant_stores_hiaddr:
3739
; LE: # %bb.0: # %entry
38-
; LE-NEXT: li 4, 170
40+
; LE-NEXT: li 4, 0
41+
; LE-NEXT: li 5, -86
3942
; LE-NEXT: std 4, 0(3)
43+
; LE-NEXT: stb 5, 0(3)
4044
; LE-NEXT: blr
4145
entry:
4246
%i64_ptr = bitcast i8* %i8_ptr to i64*

llvm/test/CodeGen/X86/constant-combines.ll

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,8 @@ target triple = "x86_64-unknown-unknown"
77
define void @bitstore_fold() {
88
; CHECK-LABEL: bitstore_fold:
99
; CHECK: # %bb.0: # %BB
10-
; CHECK-NEXT: movl $-2, 0
10+
; CHECK-NEXT: movl $-1, 0
11+
; CHECK-NEXT: movb $0, 0
1112
; CHECK-NEXT: retq
1213
BB:
1314
store i32 -1, i32* null

llvm/test/CodeGen/X86/lifetime-alias.ll

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@ target triple = "x86_64-unknown-linux-gnu"
2323
@__PRETTY_FUNCTION__.main = private unnamed_addr constant [11 x i8] c"int main()\00", align 1
2424

2525
; Function Attrs: norecurse uwtable
26-
define dso_local i8 @main() local_unnamed_addr #0 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
26+
define i8 @main() local_unnamed_addr #0 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2727
; CHECK-LABEL: main:
2828
; CHECK: # %bb.0: # %_ZNSt3__312basic_stringIcNS_11char_traitsIcEENS_9allocatorIcEEED2Ev.exit50
2929
; CHECK-NEXT: pushq %rax
@@ -35,6 +35,8 @@ define dso_local i8 @main() local_unnamed_addr #0 personality i8* bitcast (i32 (
3535
; CHECK-NEXT: movw $5632, {{[0-9]+}}(%rsp) # imm = 0x1600
3636
; CHECK-NEXT: xorps %xmm0, %xmm0
3737
; CHECK-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
38+
; CHECK-NEXT: movq $0, -{{[0-9]+}}(%rsp)
39+
; CHECK-NEXT: movb $11, -{{[0-9]+}}(%rsp)
3840
; CHECK-NEXT: movabsq $8389209137051166804, %rax # imm = 0x746C754320656854
3941
; CHECK-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
4042
; CHECK-NEXT: movl $1701999988, -{{[0-9]+}}(%rsp) # imm = 0x65727574
@@ -47,7 +49,7 @@ define dso_local i8 @main() local_unnamed_addr #0 personality i8* bitcast (i32 (
4749
; CHECK-NEXT: movups {{.*}}(%rip), %xmm1
4850
; CHECK-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
4951
; CHECK-NEXT: movb $0, -{{[0-9]+}}(%rsp)
50-
; CHECK-NEXT: movabsq $792633534417207296, %rax # imm = 0xB00000000000000
52+
; CHECK-NEXT: movq -{{[0-9]+}}(%rsp), %rax
5153
; CHECK-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
5254
; CHECK-NEXT: movq -{{[0-9]+}}(%rsp), %rax
5355
; CHECK-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
@@ -68,9 +70,9 @@ define dso_local i8 @main() local_unnamed_addr #0 personality i8* bitcast (i32 (
6870
; CHECK-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
6971
; CHECK-NEXT: movq $0, -{{[0-9]+}}(%rsp)
7072
; CHECK-NEXT: leaq -{{[0-9]+}}(%rsp), %rax
71-
; CHECK-NEXT: movq %rax, {{.*}}(%rip)
73+
; CHECK-NEXT: movq %rax, do_not_optimize{{.*}}(%rip)
7274
; CHECK-NEXT: leaq -{{[0-9]+}}(%rsp), %rax
73-
; CHECK-NEXT: movq %rax, {{.*}}(%rip)
75+
; CHECK-NEXT: movq %rax, do_not_optimize{{.*}}(%rip)
7476
; CHECK-NEXT: cmpb $0, -{{[0-9]+}}(%rsp)
7577
; CHECK-NEXT: jns .LBB0_1
7678
; CHECK-NEXT: # %bb.2: # %_ZNSt3__312basic_stringIcNS_11char_traitsIcEENS_9allocatorIcEEED2Ev.exit50

llvm/test/CodeGen/X86/pr40631_deadstore_elision.ll

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,12 +12,13 @@ define i32 @ipt_do_table(%struct.sk_buff* noalias nocapture readonly) {
1212
; CHECK-NEXT: movq (%rdi), %rax
1313
; CHECK-NEXT: xorps %xmm0, %xmm0
1414
; CHECK-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
15-
; CHECK-NEXT: movq $170, {{[0-9]+}}(%rsp)
15+
; CHECK-NEXT: movq $0, {{[0-9]+}}(%rsp)
1616
; CHECK-NEXT: movaps {{.*#+}} xmm0 = [12297829382473034410,12297829382473034410]
1717
; CHECK-NEXT: movaps %xmm0, (%rsp)
1818
; CHECK-NEXT: movabsq $-6148914691236517206, %rcx # imm = 0xAAAAAAAAAAAAAAAA
1919
; CHECK-NEXT: movq %rcx, {{[0-9]+}}(%rsp)
2020
; CHECK-NEXT: movq %rcx, {{[0-9]+}}(%rsp)
21+
; CHECK-NEXT: movb $-86, {{[0-9]+}}(%rsp)
2122
; CHECK-NEXT: movzwl 2(%rax), %ecx
2223
; CHECK-NEXT: andl $8191, %ecx # imm = 0x1FFF
2324
; CHECK-NEXT: movl %ecx, {{[0-9]+}}(%rsp)

llvm/test/CodeGen/X86/stores-merging.ll

Lines changed: 24 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -26,8 +26,9 @@ define void @redundant_stores_merging() {
2626
define void @redundant_stores_merging_reverse() {
2727
; CHECK-LABEL: redundant_stores_merging_reverse:
2828
; CHECK: # %bb.0:
29-
; CHECK-NEXT: movabsq $1958505086977, %rax # imm = 0x1C800000001
29+
; CHECK-NEXT: movabsq $528280977409, %rax # imm = 0x7B00000001
3030
; CHECK-NEXT: movq %rax, e+{{.*}}(%rip)
31+
; CHECK-NEXT: movl $456, e+{{.*}}(%rip) # imm = 0x1C8
3132
; CHECK-NEXT: retq
3233
store i32 123, i32* getelementptr inbounds (%structTy, %structTy* @e, i64 0, i32 2), align 4
3334
store i32 456, i32* getelementptr inbounds (%structTy, %structTy* @e, i64 0, i32 2), align 4
@@ -219,3 +220,25 @@ define void @extract_vector_store_32_consecutive_bytes(<4 x i64> %v, i8* %ptr) #
219220
ret void
220221
}
221222

223+
; https://bugs.llvm.org/show_bug.cgi?id=43446
224+
define void @pr43446_0(i64 %x) {
225+
; CHECK-LABEL: pr43446_0:
226+
; CHECK: # %bb.0:
227+
; CHECK-NEXT: movb $1, (%rdi)
228+
; CHECK-NEXT: retq
229+
%a = inttoptr i64 %x to i8*
230+
store i8 -2, i8* %a, align 1
231+
%b = inttoptr i64 %x to i1*
232+
store i1 true, i1* %b, align 1
233+
ret void
234+
}
235+
define void @pr43446_1(i8* %a) {
236+
; CHECK-LABEL: pr43446_1:
237+
; CHECK: # %bb.0:
238+
; CHECK-NEXT: movb $1, (%rdi)
239+
; CHECK-NEXT: retq
240+
store i8 -2, i8* %a, align 1
241+
%b = bitcast i8* %a to i1*
242+
store i1 true, i1* %b, align 1
243+
ret void
244+
}

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