Skip to content

Commit 3b70387

Browse files
dtcxzywdtcxzyw
authored
[ValueTracking] Handle more integer intrinsics in propagatesPoison (#82749)
This patch extends `propagatesPoison` to handle more integer intrinsics. It will turn more logical ands/ors into bitwise ands/ors. See also https://reviews.llvm.org/D99671.
1 parent e09e0d5 commit 3b70387

File tree

3 files changed

+40
-38
lines changed

3 files changed

+40
-38
lines changed

‎llvm/lib/Analysis/ValueTracking.cpp

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7194,6 +7194,21 @@ bool llvm::propagatesPoison(const Use &PoisonOp) {
71947194
// corresponding lanes are poison.
71957195
return true;
71967196
case Intrinsic::ctpop:
7197+
case Intrinsic::ctlz:
7198+
case Intrinsic::cttz:
7199+
case Intrinsic::abs:
7200+
case Intrinsic::smax:
7201+
case Intrinsic::smin:
7202+
case Intrinsic::umax:
7203+
case Intrinsic::umin:
7204+
case Intrinsic::bitreverse:
7205+
case Intrinsic::bswap:
7206+
case Intrinsic::sadd_sat:
7207+
case Intrinsic::ssub_sat:
7208+
case Intrinsic::sshl_sat:
7209+
case Intrinsic::uadd_sat:
7210+
case Intrinsic::usub_sat:
7211+
case Intrinsic::ushl_sat:
71977212
return true;
71987213
}
71997214
}

‎llvm/test/Analysis/ScalarEvolution/exit-count-select-safe.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -177,9 +177,9 @@ define i32 @logical_or_3ops_redundant_uminseq_operand(i32 %n, i32 %m, i32 %k) {
177177
; CHECK-NEXT: %umin = call i32 @llvm.umin.i32(i32 %n, i32 %m)
178178
; CHECK-NEXT: --> (%n umin %m) U: full-set S: full-set Exits: (%n umin %m) LoopDispositions: { %loop: Invariant }
179179
; CHECK-NEXT: %cond_p3 = select i1 %cond_p0, i1 true, i1 %cond_p1
180-
; CHECK-NEXT: --> (true + ((true + %cond_p0) umin_seq (true + %cond_p1))) U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
180+
; CHECK-NEXT: --> (true + ((true + %cond_p0) umin (true + %cond_p1))) U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
181181
; CHECK-NEXT: %cond = select i1 %cond_p3, i1 true, i1 %cond_p2
182-
; CHECK-NEXT: --> (true + ((true + %cond_p0) umin_seq (true + %cond_p1) umin_seq (true + %cond_p2))) U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
182+
; CHECK-NEXT: --> (true + (((true + %cond_p0) umin (true + %cond_p1)) umin_seq (true + %cond_p2))) U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
183183
; CHECK-NEXT: Determining loop execution counts for: @logical_or_3ops_redundant_uminseq_operand
184184
; CHECK-NEXT: Loop %loop: backedge-taken count is ((%n umin %m) umin_seq %k)
185185
; CHECK-NEXT: Loop %loop: constant max backedge-taken count is -1

‎llvm/unittests/Analysis/ValueTrackingTest.cpp

Lines changed: 23 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -824,42 +824,7 @@ TEST_F(ValueTrackingTest, ComputeNumSignBits_Shuffle_Pointers) {
824824
TEST(ValueTracking, propagatesPoison) {
825825
std::string AsmHead =
826826
"declare i32 @g(i32)\n"
827-
"declare {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)\n"
828-
"declare {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 %b)\n"
829-
"declare {i32, i1} @llvm.smul.with.overflow.i32(i32 %a, i32 %b)\n"
830-
"declare {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)\n"
831-
"declare {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)\n"
832-
"declare {i32, i1} @llvm.umul.with.overflow.i32(i32 %a, i32 %b)\n"
833-
"declare float @llvm.sqrt.f32(float)\n"
834-
"declare float @llvm.powi.f32.i32(float, i32)\n"
835-
"declare float @llvm.sin.f32(float)\n"
836-
"declare float @llvm.cos.f32(float)\n"
837-
"declare float @llvm.pow.f32(float, float)\n"
838-
"declare float @llvm.exp.f32(float)\n"
839-
"declare float @llvm.exp2.f32(float)\n"
840-
"declare float @llvm.log.f32(float)\n"
841-
"declare float @llvm.log10.f32(float)\n"
842-
"declare float @llvm.log2.f32(float)\n"
843-
"declare float @llvm.fma.f32(float, float, float)\n"
844-
"declare float @llvm.fabs.f32(float)\n"
845-
"declare float @llvm.minnum.f32(float, float)\n"
846-
"declare float @llvm.maxnum.f32(float, float)\n"
847-
"declare float @llvm.minimum.f32(float, float)\n"
848-
"declare float @llvm.maximum.f32(float, float)\n"
849-
"declare float @llvm.copysign.f32(float, float)\n"
850-
"declare float @llvm.floor.f32(float)\n"
851-
"declare float @llvm.ceil.f32(float)\n"
852-
"declare float @llvm.trunc.f32(float)\n"
853-
"declare float @llvm.rint.f32(float)\n"
854-
"declare float @llvm.nearbyint.f32(float)\n"
855-
"declare float @llvm.round.f32(float)\n"
856-
"declare float @llvm.roundeven.f32(float)\n"
857-
"declare i32 @llvm.lround.f32(float)\n"
858-
"declare i64 @llvm.llround.f32(float)\n"
859-
"declare i32 @llvm.lrint.f32(float)\n"
860-
"declare i64 @llvm.llrint.f32(float)\n"
861-
"declare float @llvm.fmuladd.f32(float, float, float)\n"
862-
"define void @f(i32 %x, i32 %y, float %fx, float %fy, "
827+
"define void @f(i32 %x, i32 %y, i32 %shamt, float %fx, float %fy, "
863828
"i1 %cond, ptr %p) {\n";
864829
std::string AsmTail = " ret void\n}";
865830
// (propagates poison?, IR instruction)
@@ -912,6 +877,28 @@ TEST(ValueTracking, propagatesPoison) {
912877
{true, "call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %x, i32 %y)", 0},
913878
{true, "call {i32, i1} @llvm.usub.with.overflow.i32(i32 %x, i32 %y)", 0},
914879
{true, "call {i32, i1} @llvm.umul.with.overflow.i32(i32 %x, i32 %y)", 0},
880+
{true, "call i32 @llvm.sadd.sat.i32(i32 %x, i32 %y)", 0},
881+
{true, "call i32 @llvm.ssub.sat.i32(i32 %x, i32 %y)", 0},
882+
{true, "call i32 @llvm.sshl.sat.i32(i32 %x, i32 %y)", 0},
883+
{true, "call i32 @llvm.uadd.sat.i32(i32 %x, i32 %y)", 0},
884+
{true, "call i32 @llvm.usub.sat.i32(i32 %x, i32 %y)", 0},
885+
{true, "call i32 @llvm.ushl.sat.i32(i32 %x, i32 %y)", 0},
886+
{true, "call i32 @llvm.ctpop.i32(i32 %x)", 0},
887+
{true, "call i32 @llvm.ctlz.i32(i32 %x, i1 true)", 0},
888+
{true, "call i32 @llvm.cttz.i32(i32 %x, i1 true)", 0},
889+
{true, "call i32 @llvm.abs.i32(i32 %x, i1 true)", 0},
890+
{true, "call i32 @llvm.smax.i32(i32 %x, i32 %y)", 0},
891+
{true, "call i32 @llvm.smin.i32(i32 %x, i32 %y)", 0},
892+
{true, "call i32 @llvm.umax.i32(i32 %x, i32 %y)", 0},
893+
{true, "call i32 @llvm.umin.i32(i32 %x, i32 %y)", 0},
894+
{true, "call i32 @llvm.bitreverse.i32(i32 %x)", 0},
895+
{true, "call i32 @llvm.bswap.i32(i32 %x)", 0},
896+
{false, "call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 %shamt)", 0},
897+
{false, "call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 %shamt)", 1},
898+
{false, "call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 %shamt)", 2},
899+
{false, "call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 %shamt)", 0},
900+
{false, "call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 %shamt)", 1},
901+
{false, "call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 %shamt)", 2},
915902
{false, "call float @llvm.sqrt.f32(float %fx)", 0},
916903
{false, "call float @llvm.powi.f32.i32(float %fx, i32 %x)", 0},
917904
{false, "call float @llvm.sin.f32(float %fx)", 0},

0 commit comments

Comments
 (0)