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[AMDGPU][True16][MC] true16 for v_frexp_mant_f16 (#120653)
Support true16 format for v_frexp_mant_f16 in MC
1 parent f7420a9 commit 3b72c62

29 files changed

+1298
-465
lines changed

‎llvm/lib/Target/AMDGPU/VOP1Instructions.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1036,7 +1036,7 @@ defm V_LOG_F16_t16 : VOP1_Real_FULL_t16_gfx11_gfx12<0x057, "v_log_f16"
10361036
defm V_LOG_F16_fake16 : VOP1_Real_FULL_t16_gfx11_gfx12<0x057, "v_log_f16">;
10371037
defm V_EXP_F16_t16 : VOP1_Real_FULL_t16_gfx11_gfx12<0x058, "v_exp_f16">;
10381038
defm V_EXP_F16_fake16 : VOP1_Real_FULL_t16_gfx11_gfx12<0x058, "v_exp_f16">;
1039-
defm V_FREXP_MANT_F16_fake16 : VOP1_Real_FULL_t16_gfx11_gfx12<0x059, "v_frexp_mant_f16">;
1039+
defm V_FREXP_MANT_F16 : VOP1_Real_FULL_t16_and_fake16_gfx11_gfx12<0x059, "v_frexp_mant_f16">;
10401040
defm V_FREXP_EXP_I16_F16 : VOP1_Real_FULL_t16_and_fake16_gfx11_gfx12<0x05a, "v_frexp_exp_i16_f16">;
10411041
defm V_FLOOR_F16_t16 : VOP1_Real_FULL_t16_gfx11_gfx12<0x05b, "v_floor_f16">;
10421042
defm V_FLOOR_F16_fake16 : VOP1_Real_FULL_t16_gfx11_gfx12<0x05b, "v_floor_f16">;

‎llvm/test/CodeGen/AMDGPU/llvm.frexp.ll

Lines changed: 262 additions & 0 deletions
Large diffs are not rendered by default.

‎llvm/test/MC/AMDGPU/gfx11_asm_vop1.s

Lines changed: 45 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -2351,50 +2351,65 @@ v_frexp_exp_i32_f64 v5, src_scc
23512351
v_frexp_exp_i32_f64 v255, 0xaf123456
23522352
// GFX11: v_frexp_exp_i32_f64_e32 v255, 0xaf123456 ; encoding: [0xff,0x78,0xfe,0x7f,0x56,0x34,0x12,0xaf]
23532353

2354-
v_frexp_mant_f16 v5, v1
2355-
// GFX11: v_frexp_mant_f16_e32 v5, v1 ; encoding: [0x01,0xb3,0x0a,0x7e]
2354+
v_frexp_mant_f16 v5.l, v1.l
2355+
// GFX11: v_frexp_mant_f16_e32 v5.l, v1.l ; encoding: [0x01,0xb3,0x0a,0x7e]
23562356

2357-
v_frexp_mant_f16 v5, v127
2358-
// GFX11: v_frexp_mant_f16_e32 v5, v127 ; encoding: [0x7f,0xb3,0x0a,0x7e]
2357+
v_frexp_mant_f16 v5.l, v127.l
2358+
// GFX11: v_frexp_mant_f16_e32 v5.l, v127.l ; encoding: [0x7f,0xb3,0x0a,0x7e]
23592359

2360-
v_frexp_mant_f16 v5, s1
2361-
// GFX11: v_frexp_mant_f16_e32 v5, s1 ; encoding: [0x01,0xb2,0x0a,0x7e]
2360+
v_frexp_mant_f16 v5.l, s1
2361+
// GFX11: v_frexp_mant_f16_e32 v5.l, s1 ; encoding: [0x01,0xb2,0x0a,0x7e]
23622362

2363-
v_frexp_mant_f16 v5, s105
2364-
// GFX11: v_frexp_mant_f16_e32 v5, s105 ; encoding: [0x69,0xb2,0x0a,0x7e]
2363+
v_frexp_mant_f16 v5.l, s105
2364+
// GFX11: v_frexp_mant_f16_e32 v5.l, s105 ; encoding: [0x69,0xb2,0x0a,0x7e]
23652365

2366-
v_frexp_mant_f16 v5, vcc_lo
2367-
// GFX11: v_frexp_mant_f16_e32 v5, vcc_lo ; encoding: [0x6a,0xb2,0x0a,0x7e]
2366+
v_frexp_mant_f16 v5.l, vcc_lo
2367+
// GFX11: v_frexp_mant_f16_e32 v5.l, vcc_lo ; encoding: [0x6a,0xb2,0x0a,0x7e]
23682368

2369-
v_frexp_mant_f16 v5, vcc_hi
2370-
// GFX11: v_frexp_mant_f16_e32 v5, vcc_hi ; encoding: [0x6b,0xb2,0x0a,0x7e]
2369+
v_frexp_mant_f16 v5.l, vcc_hi
2370+
// GFX11: v_frexp_mant_f16_e32 v5.l, vcc_hi ; encoding: [0x6b,0xb2,0x0a,0x7e]
23712371

2372-
v_frexp_mant_f16 v5, ttmp15
2373-
// GFX11: v_frexp_mant_f16_e32 v5, ttmp15 ; encoding: [0x7b,0xb2,0x0a,0x7e]
2372+
v_frexp_mant_f16 v5.l, ttmp15
2373+
// GFX11: v_frexp_mant_f16_e32 v5.l, ttmp15 ; encoding: [0x7b,0xb2,0x0a,0x7e]
23742374

2375-
v_frexp_mant_f16 v5, m0
2376-
// GFX11: v_frexp_mant_f16_e32 v5, m0 ; encoding: [0x7d,0xb2,0x0a,0x7e]
2375+
v_frexp_mant_f16 v5.l, m0
2376+
// GFX11: v_frexp_mant_f16_e32 v5.l, m0 ; encoding: [0x7d,0xb2,0x0a,0x7e]
23772377

2378-
v_frexp_mant_f16 v5, exec_lo
2379-
// GFX11: v_frexp_mant_f16_e32 v5, exec_lo ; encoding: [0x7e,0xb2,0x0a,0x7e]
2378+
v_frexp_mant_f16 v5.l, exec_lo
2379+
// GFX11: v_frexp_mant_f16_e32 v5.l, exec_lo ; encoding: [0x7e,0xb2,0x0a,0x7e]
23802380

2381-
v_frexp_mant_f16 v5, exec_hi
2382-
// GFX11: v_frexp_mant_f16_e32 v5, exec_hi ; encoding: [0x7f,0xb2,0x0a,0x7e]
2381+
v_frexp_mant_f16 v5.l, exec_hi
2382+
// GFX11: v_frexp_mant_f16_e32 v5.l, exec_hi ; encoding: [0x7f,0xb2,0x0a,0x7e]
23832383

2384-
v_frexp_mant_f16 v5, null
2385-
// GFX11: v_frexp_mant_f16_e32 v5, null ; encoding: [0x7c,0xb2,0x0a,0x7e]
2384+
v_frexp_mant_f16 v5.l, null
2385+
// GFX11: v_frexp_mant_f16_e32 v5.l, null ; encoding: [0x7c,0xb2,0x0a,0x7e]
23862386

2387-
v_frexp_mant_f16 v5, -1
2388-
// GFX11: v_frexp_mant_f16_e32 v5, -1 ; encoding: [0xc1,0xb2,0x0a,0x7e]
2387+
v_frexp_mant_f16 v5.l, -1
2388+
// GFX11: v_frexp_mant_f16_e32 v5.l, -1 ; encoding: [0xc1,0xb2,0x0a,0x7e]
23892389

2390-
v_frexp_mant_f16 v5, 0.5
2391-
// GFX11: v_frexp_mant_f16_e32 v5, 0.5 ; encoding: [0xf0,0xb2,0x0a,0x7e]
2390+
v_frexp_mant_f16 v5.l, 0.5
2391+
// GFX11: v_frexp_mant_f16_e32 v5.l, 0.5 ; encoding: [0xf0,0xb2,0x0a,0x7e]
23922392

2393-
v_frexp_mant_f16 v5, src_scc
2394-
// GFX11: v_frexp_mant_f16_e32 v5, src_scc ; encoding: [0xfd,0xb2,0x0a,0x7e]
2393+
v_frexp_mant_f16 v5.l, src_scc
2394+
// GFX11: v_frexp_mant_f16_e32 v5.l, src_scc ; encoding: [0xfd,0xb2,0x0a,0x7e]
23952395

2396-
v_frexp_mant_f16 v127, 0xfe0b
2397-
// GFX11: v_frexp_mant_f16_e32 v127, 0xfe0b ; encoding: [0xff,0xb2,0xfe,0x7e,0x0b,0xfe,0x00,0x00]
2396+
v_frexp_mant_f16 v127.l, 0xfe0b
2397+
// GFX11: v_frexp_mant_f16_e32 v127.l, 0xfe0b ; encoding: [0xff,0xb2,0xfe,0x7e,0x0b,0xfe,0x00,0x00]
2398+
2399+
v_frexp_mant_f16 v5.l, v1.h
2400+
// GFX11: v_frexp_mant_f16_e32 v5.l, v1.h ; encoding: [0x81,0xb3,0x0a,0x7e]
2401+
2402+
v_frexp_mant_f16 v5.l, v127.h
2403+
// GFX11: v_frexp_mant_f16_e32 v5.l, v127.h ; encoding: [0xff,0xb3,0x0a,0x7e]
2404+
2405+
v_frexp_mant_f16 v127.l, 0.5
2406+
// GFX11: v_frexp_mant_f16_e32 v127.l, 0.5 ; encoding: [0xf0,0xb2,0xfe,0x7e]
2407+
2408+
v_frexp_mant_f16 v5.h, src_scc
2409+
// GFX11: v_frexp_mant_f16_e32 v5.h, src_scc ; encoding: [0xfd,0xb2,0x0a,0x7f]
2410+
2411+
v_frexp_mant_f16 v127.h, 0xfe0b
2412+
// GFX11: v_frexp_mant_f16_e32 v127.h, 0xfe0b ; encoding: [0xff,0xb2,0xfe,0x7f,0x0b,0xfe,0x00,0x00]
23982413

23992414
v_frexp_mant_f32 v5, v1
24002415
// GFX11: v_frexp_mant_f32_e32 v5, v1 ; encoding: [0x01,0x81,0x0a,0x7e]

‎llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s

Lines changed: 37 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -1766,47 +1766,56 @@ v_frexp_exp_i32_f32 v5, v1 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 f
17661766
v_frexp_exp_i32_f32 v255, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
17671767
// GFX11: v_frexp_exp_i32_f32_dpp v255, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x7e,0xfe,0x7f,0xff,0x6f,0x35,0x30]
17681768

1769-
v_frexp_mant_f16 v5, v1 quad_perm:[3,2,1,0]
1770-
// GFX11: v_frexp_mant_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1769+
v_frexp_mant_f16 v5.l, v1.l quad_perm:[3,2,1,0]
1770+
// GFX11: v_frexp_mant_f16_dpp v5.l, v1.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x1b,0x00,0xff]
17711771

1772-
v_frexp_mant_f16 v5, v1 quad_perm:[0,1,2,3]
1773-
// GFX11: v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1772+
v_frexp_mant_f16 v5.l, v1.l quad_perm:[0,1,2,3]
1773+
// GFX11: v_frexp_mant_f16_dpp v5.l, v1.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0xe4,0x00,0xff]
17741774

1775-
v_frexp_mant_f16 v5, v1 row_mirror
1776-
// GFX11: v_frexp_mant_f16_dpp v5, v1 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x40,0x01,0xff]
1775+
v_frexp_mant_f16 v5.l, v1.l row_mirror
1776+
// GFX11: v_frexp_mant_f16_dpp v5.l, v1.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x40,0x01,0xff]
17771777

1778-
v_frexp_mant_f16 v5, v1 row_half_mirror
1779-
// GFX11: v_frexp_mant_f16_dpp v5, v1 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x41,0x01,0xff]
1778+
v_frexp_mant_f16 v5.l, v1.l row_half_mirror
1779+
// GFX11: v_frexp_mant_f16_dpp v5.l, v1.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x41,0x01,0xff]
17801780

1781-
v_frexp_mant_f16 v5, v1 row_shl:1
1782-
// GFX11: v_frexp_mant_f16_dpp v5, v1 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x01,0x01,0xff]
1781+
v_frexp_mant_f16 v5.l, v1.l row_shl:1
1782+
// GFX11: v_frexp_mant_f16_dpp v5.l, v1.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x01,0x01,0xff]
17831783

1784-
v_frexp_mant_f16 v5, v1 row_shl:15
1785-
// GFX11: v_frexp_mant_f16_dpp v5, v1 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1784+
v_frexp_mant_f16 v5.l, v1.l row_shl:15
1785+
// GFX11: v_frexp_mant_f16_dpp v5.l, v1.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x0f,0x01,0xff]
17861786

1787-
v_frexp_mant_f16 v5, v1 row_shr:1
1788-
// GFX11: v_frexp_mant_f16_dpp v5, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x11,0x01,0xff]
1787+
v_frexp_mant_f16 v5.l, v1.l row_shr:1
1788+
// GFX11: v_frexp_mant_f16_dpp v5.l, v1.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x11,0x01,0xff]
17891789

1790-
v_frexp_mant_f16 v5, v1 row_shr:15
1791-
// GFX11: v_frexp_mant_f16_dpp v5, v1 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1790+
v_frexp_mant_f16 v5.l, v1.l row_shr:15
1791+
// GFX11: v_frexp_mant_f16_dpp v5.l, v1.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x1f,0x01,0xff]
17921792

1793-
v_frexp_mant_f16 v5, v1 row_ror:1
1794-
// GFX11: v_frexp_mant_f16_dpp v5, v1 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x21,0x01,0xff]
1793+
v_frexp_mant_f16 v5.l, v1.l row_ror:1
1794+
// GFX11: v_frexp_mant_f16_dpp v5.l, v1.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x21,0x01,0xff]
17951795

1796-
v_frexp_mant_f16 v5, v1 row_ror:15
1797-
// GFX11: v_frexp_mant_f16_dpp v5, v1 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1796+
v_frexp_mant_f16 v5.l, v1.l row_ror:15
1797+
// GFX11: v_frexp_mant_f16_dpp v5.l, v1.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x2f,0x01,0xff]
17981798

1799-
v_frexp_mant_f16 v5, v1 row_share:0 row_mask:0xf bank_mask:0xf
1800-
// GFX11: v_frexp_mant_f16_dpp v5, v1 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x50,0x01,0xff]
1799+
v_frexp_mant_f16 v5.l, v1.l row_share:0 row_mask:0xf bank_mask:0xf
1800+
// GFX11: v_frexp_mant_f16_dpp v5.l, v1.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x50,0x01,0xff]
18011801

1802-
v_frexp_mant_f16 v5, v1 row_share:15 row_mask:0x0 bank_mask:0x1
1803-
// GFX11: v_frexp_mant_f16_dpp v5, v1 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x5f,0x01,0x01]
1802+
v_frexp_mant_f16 v5.l, v1.l row_share:15 row_mask:0x0 bank_mask:0x1
1803+
// GFX11: v_frexp_mant_f16_dpp v5.l, v1.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x5f,0x01,0x01]
18041804

1805-
v_frexp_mant_f16 v5, v1 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
1806-
// GFX11: v_frexp_mant_f16_dpp v5, v1 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x60,0x09,0x13]
1805+
v_frexp_mant_f16 v5.l, v1.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
1806+
// GFX11: v_frexp_mant_f16_dpp v5.l, v1.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x60,0x09,0x13]
18071807

1808-
v_frexp_mant_f16 v127, -|v127| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
1809-
// GFX11: v_frexp_mant_f16_dpp v127, -|v127| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xb2,0xfe,0x7e,0x7f,0x6f,0x35,0x30]
1808+
v_frexp_mant_f16 v127.l, -|v127.l| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
1809+
// GFX11: v_frexp_mant_f16_dpp v127.l, -|v127.l| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xb2,0xfe,0x7e,0x7f,0x6f,0x35,0x30]
1810+
1811+
v_frexp_mant_f16 v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
1812+
// GFX11: v_frexp_mant_f16_dpp v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xb2,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
1813+
1814+
v_frexp_mant_f16 v5.h, v1.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
1815+
// GFX11: v_frexp_mant_f16_dpp v5.h, v1.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0xb2,0x0a,0x7f,0x81,0x60,0x09,0x13]
1816+
1817+
v_frexp_mant_f16 v127.h, -|v127.h| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
1818+
// GFX11: v_frexp_mant_f16_dpp v127.h, -|v127.h| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xb2,0xfe,0x7f,0xff,0x6f,0x35,0x30]
18101819

18111820
v_frexp_mant_f32 v5, v1 quad_perm:[3,2,1,0]
18121821
// GFX11: v_frexp_mant_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x80,0x0a,0x7e,0x01,0x1b,0x00,0xff]

‎llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s

Lines changed: 15 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -416,14 +416,23 @@ v_frexp_exp_i32_f32 v5, v1 dpp8:[7,6,5,4,3,2,1,0] fi:1
416416
v_frexp_exp_i32_f32 v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
417417
// GFX11: v_frexp_exp_i32_f32_dpp v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0x7e,0xfe,0x7f,0xff,0x00,0x00,0x00]
418418

419-
v_frexp_mant_f16 v5, v1 dpp8:[7,6,5,4,3,2,1,0]
420-
// GFX11: v_frexp_mant_f16_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xb2,0x0a,0x7e,0x01,0x77,0x39,0x05]
419+
v_frexp_mant_f16 v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0]
420+
// GFX11: v_frexp_mant_f16_dpp v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xb2,0x0a,0x7e,0x01,0x77,0x39,0x05]
421421

422-
v_frexp_mant_f16 v5, v1 dpp8:[7,6,5,4,3,2,1,0] fi:1
423-
// GFX11: v_frexp_mant_f16_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0xb2,0x0a,0x7e,0x01,0x77,0x39,0x05]
422+
v_frexp_mant_f16 v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0] fi:1
423+
// GFX11: v_frexp_mant_f16_dpp v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0xb2,0x0a,0x7e,0x01,0x77,0x39,0x05]
424424

425-
v_frexp_mant_f16 v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
426-
// GFX11: v_frexp_mant_f16_dpp v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xb2,0xfe,0x7e,0x7f,0x00,0x00,0x00]
425+
v_frexp_mant_f16 v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
426+
// GFX11: v_frexp_mant_f16_dpp v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xb2,0xfe,0x7e,0x7f,0x00,0x00,0x00]
427+
428+
v_frexp_mant_f16 v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
429+
// GFX11: v_frexp_mant_f16_dpp v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xb2,0xfe,0x7e,0x7f,0x77,0x39,0x05]
430+
431+
v_frexp_mant_f16 v5.h, v1.h dpp8:[7,6,5,4,3,2,1,0] fi:1
432+
// GFX11: v_frexp_mant_f16_dpp v5.h, v1.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0xb2,0x0a,0x7f,0x81,0x77,0x39,0x05]
433+
434+
v_frexp_mant_f16 v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
435+
// GFX11: v_frexp_mant_f16_dpp v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xb2,0xfe,0x7f,0xff,0x00,0x00,0x00]
427436

428437
v_frexp_mant_f32 v5, v1 dpp8:[7,6,5,4,3,2,1,0]
429438
// GFX11: v_frexp_mant_f32_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x80,0x0a,0x7e,0x01,0x77,0x39,0x05]

‎llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s

Lines changed: 42 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -521,6 +521,12 @@ v_frexp_exp_i16_f16_e32 v5.l, v199.l quad_perm:[3,2,1,0]
521521
v_frexp_mant_f16_e32 v128, 0xfe0b
522522
// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
523523

524+
v_frexp_mant_f16_e32 v128.h, 0xfe0b
525+
// GFX11: :[[@LINE-1]]:22: error: invalid operand for instruction
526+
527+
v_frexp_mant_f16_e32 v128.l, 0xfe0b
528+
// GFX11: :[[@LINE-1]]:22: error: invalid operand for instruction
529+
524530
v_frexp_mant_f16_e32 v255, v1
525531
// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
526532

@@ -530,6 +536,24 @@ v_frexp_mant_f16_e32 v255, v1 dpp8:[7,6,5,4,3,2,1,0]
530536
v_frexp_mant_f16_e32 v255, v1 quad_perm:[3,2,1,0]
531537
// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
532538

539+
v_frexp_mant_f16_e32 v255.h, v1.h
540+
// GFX11: :[[@LINE-1]]:22: error: invalid operand for instruction
541+
542+
v_frexp_mant_f16_e32 v255.h, v1.h dpp8:[7,6,5,4,3,2,1,0]
543+
// GFX11: :[[@LINE-1]]:22: error: invalid operand for instruction
544+
545+
v_frexp_mant_f16_e32 v255.h, v1.h quad_perm:[3,2,1,0]
546+
// GFX11: :[[@LINE-1]]:22: error: invalid operand for instruction
547+
548+
v_frexp_mant_f16_e32 v255.l, v1.l
549+
// GFX11: :[[@LINE-1]]:22: error: invalid operand for instruction
550+
551+
v_frexp_mant_f16_e32 v255.l, v1.l dpp8:[7,6,5,4,3,2,1,0]
552+
// GFX11: :[[@LINE-1]]:22: error: invalid operand for instruction
553+
554+
v_frexp_mant_f16_e32 v255.l, v1.l quad_perm:[3,2,1,0]
555+
// GFX11: :[[@LINE-1]]:22: error: invalid operand for instruction
556+
533557
v_frexp_mant_f16_e32 v5, v199
534558
// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
535559

@@ -539,6 +563,24 @@ v_frexp_mant_f16_e32 v5, v199 dpp8:[7,6,5,4,3,2,1,0]
539563
v_frexp_mant_f16_e32 v5, v199 quad_perm:[3,2,1,0]
540564
// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
541565

566+
v_frexp_mant_f16_e32 v5.h, v199.h
567+
// GFX11: :[[@LINE-1]]:28: error: invalid operand for instruction
568+
569+
v_frexp_mant_f16_e32 v5.h, v199.h dpp8:[7,6,5,4,3,2,1,0]
570+
// GFX11: :[[@LINE-1]]:28: error: invalid operand for instruction
571+
572+
v_frexp_mant_f16_e32 v5.h, v199.h quad_perm:[3,2,1,0]
573+
// GFX11: :[[@LINE-1]]:28: error: invalid operand for instruction
574+
575+
v_frexp_mant_f16_e32 v5.l, v199.l
576+
// GFX11: :[[@LINE-1]]:28: error: invalid operand for instruction
577+
578+
v_frexp_mant_f16_e32 v5.l, v199.l dpp8:[7,6,5,4,3,2,1,0]
579+
// GFX11: :[[@LINE-1]]:28: error: invalid operand for instruction
580+
581+
v_frexp_mant_f16_e32 v5.l, v199.l quad_perm:[3,2,1,0]
582+
// GFX11: :[[@LINE-1]]:28: error: invalid operand for instruction
583+
542584
v_log_f16_e32 v128.h, 0xfe0b
543585
// GFX11: :[[@LINE-1]]:15: error: invalid operand for instruction
544586

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