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koachankoachan
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[𝘀𝗽𝗿] initial version
Created using spr 1.3.4
2 parents 0bbfd96 + ba3864c commit 3beb725

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‎llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp

Lines changed: 70 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -130,6 +130,9 @@ class SparcAsmParser : public MCTargetAsmParser {
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bool expandSET(MCInst &Inst, SMLoc IDLoc,
131131
SmallVectorImpl<MCInst> &Instructions);
132132

133+
bool expandSETSW(MCInst &Inst, SMLoc IDLoc,
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SmallVectorImpl<MCInst> &Instructions);
135+
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bool expandSETX(MCInst &Inst, SMLoc IDLoc,
134137
SmallVectorImpl<MCInst> &Instructions);
135138

@@ -734,6 +737,69 @@ bool SparcAsmParser::expandSET(MCInst &Inst, SMLoc IDLoc,
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return false;
735738
}
736739

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bool SparcAsmParser::expandSETSW(MCInst &Inst, SMLoc IDLoc,
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SmallVectorImpl<MCInst> &Instructions) {
742+
MCOperand MCRegOp = Inst.getOperand(0);
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MCOperand MCValOp = Inst.getOperand(1);
744+
assert(MCRegOp.isReg());
745+
assert(MCValOp.isImm() || MCValOp.isExpr());
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747+
// the imm operand can be either an expression or an immediate.
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bool IsImm = Inst.getOperand(1).isImm();
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int64_t ImmValue = IsImm ? MCValOp.getImm() : 0;
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const MCExpr *ValExpr = IsImm ? MCConstantExpr::create(ImmValue, getContext())
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: MCValOp.getExpr();
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bool IsSmallImm = IsImm && isInt<13>(ImmValue);
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bool NoLowBitsImm = IsImm && ((ImmValue & 0x3FF) == 0);
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MCOperand PrevReg = MCOperand::createReg(Sparc::G0);
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758+
if (!isInt<32>(ImmValue)) {
759+
return Error(IDLoc,
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"set: argument must be between -2147483648 and 2147483647");
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}
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// Very small immediates can be expressed without emitting a sethi.
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if (!IsSmallImm) {
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// sethi %hi(val), rd
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Instructions.push_back(
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MCInstBuilder(SP::SETHIi)
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.addReg(MCRegOp.getReg())
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.addExpr(adjustPICRelocation(SparcMCExpr::VK_Sparc_HI, ValExpr)));
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PrevReg = MCRegOp;
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}
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// If the immediate has the lower bits set or is small, we need to emit an or.
775+
if (!NoLowBitsImm || IsSmallImm) {
776+
const MCExpr *Expr =
777+
IsSmallImm ? ValExpr
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: adjustPICRelocation(SparcMCExpr::VK_Sparc_LO, ValExpr);
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// or rd, %lo(val), rd
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Instructions.push_back(MCInstBuilder(SP::ORri)
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.addReg(MCRegOp.getReg())
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.addReg(PrevReg.getReg())
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.addExpr(Expr));
785+
786+
// If it's a small immediate there's nothing more to do.
787+
if (IsSmallImm)
788+
return false;
789+
}
790+
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// Large negative or non-immediate expressions would need an sra.
792+
if (!IsImm || ImmValue < 0) {
793+
// sra rd, %g0, rd
794+
Instructions.push_back(MCInstBuilder(SP::SRArr)
795+
.addReg(MCRegOp.getReg())
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.addReg(MCRegOp.getReg())
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.addReg(Sparc::G0));
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}
799+
800+
return false;
801+
}
802+
737803
bool SparcAsmParser::expandSETX(MCInst &Inst, SMLoc IDLoc,
738804
SmallVectorImpl<MCInst> &Instructions) {
739805
MCOperand MCRegOp = Inst.getOperand(0);
@@ -826,6 +892,10 @@ bool SparcAsmParser::matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
826892
if (expandSET(Inst, IDLoc, Instructions))
827893
return true;
828894
break;
895+
case SP::SETSW:
896+
if (expandSETSW(Inst, IDLoc, Instructions))
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return true;
898+
break;
829899
case SP::SETX:
830900
if (expandSETX(Inst, IDLoc, Instructions))
831901
return true;

‎llvm/lib/Target/Sparc/SparcInstrAliases.td

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -450,6 +450,10 @@ def : InstAlias<"save", (SAVErr G0, G0, G0)>;
450450
// def : InstAlias<"set $val, $rd", (ORri IntRegs:$rd, (SETHIi (HI22 imm:$val)), (LO10 imm:$val))>;
451451
def SET : AsmPseudoInst<(outs IntRegs:$rd), (ins i32imm:$val), "set $val, $rd">;
452452

453+
// setsw value, rd
454+
// (turns into a sequence of sethi+or+sra, depending on the value)
455+
def SETSW : AsmPseudoInst<(outs IntRegs:$rd), (ins i32imm:$val), "setsw $val, $rd">;
456+
453457
// setx value, tmp, rd
454458
// (turns into a sequence of sethi+or+shift, depending on the value)
455459
def SETX : AsmPseudoInst<(outs I64Regs:$rd),
@@ -605,6 +609,8 @@ def : InstAlias<"unimp", (UNIMP 0), 0>;
605609
// interchangeable with `unimp` all the time.
606610
def : MnemonicAlias<"illtrap", "unimp">;
607611

612+
def : MnemonicAlias<"setuw", "set">;
613+
608614
def : MnemonicAlias<"iflush", "flush">;
609615

610616
def : MnemonicAlias<"stub", "stb">;

‎llvm/test/MC/Sparc/sparc-synthetic-instructions.s

Lines changed: 36 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -54,6 +54,42 @@
5454
! CHECK: ! fixup A - offset: 0, value: %lo(2147483647), kind: fixup_sparc_lo10
5555
set 2147483647, %o1
5656

57+
!! setuw is a mnemonic alias for set.
58+
! CHECK: sethi %hi(32768), %g1 ! encoding: [0x03,0b00AAAAAA,A,A]
59+
! CHECK: ! fixup A - offset: 0, value: %hi(32768), kind: fixup_sparc_hi22
60+
setuw 32768, %g1
61+
! CHECK: mov 1, %g1 ! encoding: [0x82,0x10,0x20,0x01]
62+
setuw 1, %g1
63+
64+
! CHECK: sethi %hi(32768), %g1 ! encoding: [0x03,0b00AAAAAA,A,A]
65+
! CHECK: ! fixup A - offset: 0, value: %hi(32768), kind: fixup_sparc_hi22
66+
setsw 32768, %g1
67+
! CHECK: mov 1, %g1 ! encoding: [0x82,0x10,0x20,0x01]
68+
setsw 1, %g1
69+
! CHECK: mov -1, %g1 ! encoding: [0x82,0x10,0x3f,0xff]
70+
setsw -1, %g1
71+
! CHECK: sethi %hi(-32768), %g1 ! encoding: [0x03,0b00AAAAAA,A,A]
72+
! CHECK: ! fixup A - offset: 0, value: %hi(-32768), kind: fixup_sparc_hi22
73+
! CHECK: sra %g1, %g0, %g1 ! encoding: [0x83,0x38,0x40,0x00]
74+
setsw -32768, %g1
75+
! CHECK: sethi %hi(2147483647), %o1 ! encoding: [0x13,0b00AAAAAA,A,A]
76+
! CHECK: ! fixup A - offset: 0, value: %hi(2147483647), kind: fixup_sparc_hi22
77+
! CHECK: or %o1, %lo(2147483647), %o1 ! encoding: [0x92,0x12,0b011000AA,A]
78+
! CHECK: ! fixup A - offset: 0, value: %lo(2147483647), kind: fixup_sparc_lo10
79+
setsw 2147483647, %o1
80+
! CHECK: sethi %hi(-2147483647), %o1 ! encoding: [0x13,0b00AAAAAA,A,A]
81+
! CHECK: ! fixup A - offset: 0, value: %hi(-2147483647), kind: fixup_sparc_hi22
82+
! CHECK: or %o1, %lo(-2147483647), %o1 ! encoding: [0x92,0x12,0b011000AA,A]
83+
! CHECK: ! fixup A - offset: 0, value: %lo(-2147483647), kind: fixup_sparc_lo10
84+
! CHECK: sra %o1, %g0, %o1 ! encoding: [0x93,0x3a,0x40,0x00]
85+
setsw -2147483647, %o1
86+
! CHECK: sethi %hi(.Ltmp0), %o1 ! encoding: [0x13,0b00AAAAAA,A,A]
87+
! CHECK: ! fixup A - offset: 0, value: %hi(.Ltmp0), kind: fixup_sparc_hi22
88+
! CHECK: or %o1, %lo(.Ltmp0), %o1 ! encoding: [0x92,0x12,0b011000AA,A]
89+
! CHECK: ! fixup A - offset: 0, value: %lo(.Ltmp0), kind: fixup_sparc_lo10
90+
! CHECK: sra %o1, %g0, %o1 ! encoding: [0x93,0x3a,0x40,0x00]
91+
setsw ., %o1
92+
5793
! CHECK: xnor %g1, %g0, %g2 ! encoding: [0x84,0x38,0x40,0x00]
5894
not %g1, %g2
5995
! CHECK: xnor %g1, %g0, %g1 ! encoding: [0x82,0x38,0x40,0x00]

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