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Update tests
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llvm/test/CodeGen/AArch64/bswap.ll

Lines changed: 38 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -6,12 +6,12 @@
66

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; ====== Scalar bswap.i16 Tests =====
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define i16 @bswap_i16_to_i16_anyext(i16 %a){
9-
; CHECK-SD-LABEL: bswap_i16_to_i16:
9+
; CHECK-SD-LABEL: bswap_i16_to_i16_anyext:
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; CHECK-SD: // %bb.0:
1111
; CHECK-SD-NEXT: rev16 w0, w0
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; CHECK-SD-NEXT: ret
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;
14-
; CHECK-GI-LABEL: bswap_i16_to_i16:
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; CHECK-GI-LABEL: bswap_i16_to_i16_anyext:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: rev w8, w0
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; CHECK-GI-NEXT: lsr w0, w8, #16
@@ -23,22 +23,55 @@ declare i16 @llvm.bswap.i16(i16)
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; The zext here is optimised to an any_extend during isel.
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define i64 @bswap_i16_to_i64_anyext(i16 %a) {
26+
; CHECK-SD-LABEL: bswap_i16_to_i64_anyext:
27+
; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-SD-NEXT: rev16 x8, x0
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; CHECK-SD-NEXT: lsl x0, x8, #48
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: bswap_i16_to_i64_anyext:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: rev w8, w0
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; CHECK-GI-NEXT: lsr w8, w8, #16
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; CHECK-GI-NEXT: and x8, x8, #0xffff
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; CHECK-GI-NEXT: lsl x0, x8, #48
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; CHECK-GI-NEXT: ret
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%3 = call i16 @llvm.bswap.i16(i16 %a)
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%4 = zext i16 %3 to i64
28-
%5 = shl i64 %5, 48
42+
%5 = shl i64 %4, 48
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ret i64 %5
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}
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; The zext here is optimised to an any_extend during isel..
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define i128 @bswap_i16_to_i128_anyext(i16 %a) {
48+
; CHECK-SD-LABEL: bswap_i16_to_i128_anyext:
49+
; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: mov w8, w0
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; CHECK-SD-NEXT: mov x0, xzr
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; CHECK-SD-NEXT: rev w8, w8
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; CHECK-SD-NEXT: lsr w8, w8, #16
54+
; CHECK-SD-NEXT: lsl x1, x8, #48
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; CHECK-SD-NEXT: ret
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;
57+
; CHECK-GI-LABEL: bswap_i16_to_i128_anyext:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: mov w8, w0
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; CHECK-GI-NEXT: mov x0, xzr
61+
; CHECK-GI-NEXT: rev w8, w8
62+
; CHECK-GI-NEXT: lsr w8, w8, #16
63+
; CHECK-GI-NEXT: bfi x8, x8, #32, #32
64+
; CHECK-GI-NEXT: and x8, x8, #0xffff
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; CHECK-GI-NEXT: lsl x1, x8, #48
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; CHECK-GI-NEXT: ret
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%3 = call i16 @llvm.bswap.i16(i16 %a)
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%4 = zext i16 %3 to i128
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%5 = shl i128 %4, 112
37-
ret i128 %d
70+
ret i128 %5
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}
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define i32 @bswap_i16_to_i32_zext(i16 %a){
41-
; CHECK-LABEL: bswap_i16_to_i32:
74+
; CHECK-LABEL: bswap_i16_to_i32_zext:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rev w8, w0
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; CHECK-NEXT: lsr w0, w8, #16

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