[VPlan] Implement mayHaveSideEffects/mayWriteToMemory for VPInterleav… (#71360)

…eRecipe

This helps VPlanTransforms::removeDeadRecipes to work on
VPInterleaveRecipe

Author: arcbbb

llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp

@@ -44,6 +44,8 @@ extern cl::opt<bool> EnableVPlanNativePath;
 
 bool VPRecipeBase::mayWriteToMemory() const {
   switch (getVPDefID()) {
+  case VPInterleaveSC:
+    return cast<VPInterleaveRecipe>(this)->getNumStoreOperands() > 0;
   case VPWidenMemoryInstructionSC: {
     return cast<VPWidenMemoryInstructionRecipe>(this)->isStore();
   }
@@ -146,6 +148,8 @@ bool VPRecipeBase::mayHaveSideEffects() const {
            "underlying instruction has side-effects");
     return false;
   }
+  case VPInterleaveSC:
+    return mayWriteToMemory();
   case VPWidenMemoryInstructionSC:
     assert(cast<VPWidenMemoryInstructionRecipe>(this)
                    ->getIngredient()

llvm/test/Transforms/LoopVectorize/vplan-unused-interleave-group.ll

@@ -18,14 +18,9 @@ define void @test_unused_interleave(ptr %src, i32 %length) {
 ; CHECK-EMPTY:
 ; CHECK-NEXT: <x1> vector loop: {
 ; CHECK-NEXT:   vector.body:
-; CHECK-NEXT:     EMIT vp<%2> = CANONICAL-INDUCTION ir<0>, vp<%7>
-; CHECK-NEXT:     vp<%3> = SCALAR-STEPS vp<%2>, ir<1>
-; CHECK-NEXT:     CLONE ir<%next19.i.i> = getelementptr inbounds ir<%src>, vp<%3>, ir<0>
-; CHECK-NEXT:     INTERLEAVE-GROUP with factor 2 at %load_p1, ir<%next19.i.i>
-; CHECK-NEXT:       ir<%load_p1> = load from index 0
-; CHECK-NEXT:       ir<%load_p2> = load from index 1
-; CHECK-NEXT:     EMIT vp<%7> = add nuw vp<%2>, vp<%0>
-; CHECK-NEXT:     EMIT branch-on-count vp<%7>, vp<%1>
+; CHECK-NEXT:     EMIT vp<%2> = CANONICAL-INDUCTION ir<0>, vp<%3>
+; CHECK-NEXT:     EMIT vp<%3> = add nuw vp<%2>, vp<%0>
+; CHECK-NEXT:     EMIT branch-on-count vp<%3>, vp<%1>
 ; CHECK-NEXT:   No successors
 ; CHECK-NEXT: }
 entry: