@@ -91,3 +91,101 @@ define i32 @test_add_and_fptosi() nounwind {
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%4 = fptosi fp128 %3 to i32
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ret i32 %4
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}
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+
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+ define fp128 @fmaximum (fp128 %x , fp128 %y ) {
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+ ; RV32I-LABEL: fmaximum:
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+ ; RV32I: # %bb.0:
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+ ; RV32I-NEXT: addi sp, sp, -64
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+ ; RV32I-NEXT: .cfi_def_cfa_offset 64
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+ ; RV32I-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
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+ ; RV32I-NEXT: sw s0, 56(sp) # 4-byte Folded Spill
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+ ; RV32I-NEXT: .cfi_offset ra, -4
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+ ; RV32I-NEXT: .cfi_offset s0, -8
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+ ; RV32I-NEXT: lw a3, 0(a1)
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+ ; RV32I-NEXT: lw a4, 4(a1)
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+ ; RV32I-NEXT: lw a5, 8(a1)
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+ ; RV32I-NEXT: lw a6, 12(a1)
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+ ; RV32I-NEXT: lw a1, 0(a2)
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+ ; RV32I-NEXT: lw a7, 4(a2)
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+ ; RV32I-NEXT: lw t0, 8(a2)
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+ ; RV32I-NEXT: lw a2, 12(a2)
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+ ; RV32I-NEXT: mv s0, a0
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+ ; RV32I-NEXT: sw a1, 8(sp)
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+ ; RV32I-NEXT: sw a7, 12(sp)
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+ ; RV32I-NEXT: sw t0, 16(sp)
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+ ; RV32I-NEXT: sw a2, 20(sp)
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+ ; RV32I-NEXT: addi a0, sp, 40
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+ ; RV32I-NEXT: addi a1, sp, 24
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+ ; RV32I-NEXT: addi a2, sp, 8
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+ ; RV32I-NEXT: sw a3, 24(sp)
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+ ; RV32I-NEXT: sw a4, 28(sp)
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+ ; RV32I-NEXT: sw a5, 32(sp)
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+ ; RV32I-NEXT: sw a6, 36(sp)
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+ ; RV32I-NEXT: call fmaximuml
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+ ; RV32I-NEXT: lw a0, 40(sp)
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+ ; RV32I-NEXT: lw a1, 44(sp)
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+ ; RV32I-NEXT: lw a2, 48(sp)
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+ ; RV32I-NEXT: lw a3, 52(sp)
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+ ; RV32I-NEXT: sw a0, 0(s0)
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+ ; RV32I-NEXT: sw a1, 4(s0)
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+ ; RV32I-NEXT: sw a2, 8(s0)
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+ ; RV32I-NEXT: sw a3, 12(s0)
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+ ; RV32I-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
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+ ; RV32I-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
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+ ; RV32I-NEXT: .cfi_restore ra
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+ ; RV32I-NEXT: .cfi_restore s0
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+ ; RV32I-NEXT: addi sp, sp, 64
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+ ; RV32I-NEXT: .cfi_def_cfa_offset 0
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+ ; RV32I-NEXT: ret
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+ %a = call fp128 @llvm.maximum.fp128 (fp128 %x , fp128 %y )
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+ ret fp128 %a
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+ }
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+
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+ define fp128 @fminimum (fp128 %x , fp128 %y ) {
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+ ; RV32I-LABEL: fminimum:
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+ ; RV32I: # %bb.0:
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+ ; RV32I-NEXT: addi sp, sp, -64
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+ ; RV32I-NEXT: .cfi_def_cfa_offset 64
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+ ; RV32I-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
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+ ; RV32I-NEXT: sw s0, 56(sp) # 4-byte Folded Spill
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+ ; RV32I-NEXT: .cfi_offset ra, -4
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+ ; RV32I-NEXT: .cfi_offset s0, -8
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+ ; RV32I-NEXT: lw a3, 0(a1)
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+ ; RV32I-NEXT: lw a4, 4(a1)
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+ ; RV32I-NEXT: lw a5, 8(a1)
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+ ; RV32I-NEXT: lw a6, 12(a1)
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+ ; RV32I-NEXT: lw a1, 0(a2)
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+ ; RV32I-NEXT: lw a7, 4(a2)
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+ ; RV32I-NEXT: lw t0, 8(a2)
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+ ; RV32I-NEXT: lw a2, 12(a2)
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+ ; RV32I-NEXT: mv s0, a0
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+ ; RV32I-NEXT: sw a1, 8(sp)
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+ ; RV32I-NEXT: sw a7, 12(sp)
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+ ; RV32I-NEXT: sw t0, 16(sp)
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+ ; RV32I-NEXT: sw a2, 20(sp)
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+ ; RV32I-NEXT: addi a0, sp, 40
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+ ; RV32I-NEXT: addi a1, sp, 24
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+ ; RV32I-NEXT: addi a2, sp, 8
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+ ; RV32I-NEXT: sw a3, 24(sp)
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+ ; RV32I-NEXT: sw a4, 28(sp)
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+ ; RV32I-NEXT: sw a5, 32(sp)
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+ ; RV32I-NEXT: sw a6, 36(sp)
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+ ; RV32I-NEXT: call fminimuml
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+ ; RV32I-NEXT: lw a0, 40(sp)
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+ ; RV32I-NEXT: lw a1, 44(sp)
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+ ; RV32I-NEXT: lw a2, 48(sp)
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+ ; RV32I-NEXT: lw a3, 52(sp)
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+ ; RV32I-NEXT: sw a0, 0(s0)
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+ ; RV32I-NEXT: sw a1, 4(s0)
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+ ; RV32I-NEXT: sw a2, 8(s0)
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+ ; RV32I-NEXT: sw a3, 12(s0)
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+ ; RV32I-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
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+ ; RV32I-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
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+ ; RV32I-NEXT: .cfi_restore ra
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+ ; RV32I-NEXT: .cfi_restore s0
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+ ; RV32I-NEXT: addi sp, sp, 64
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+ ; RV32I-NEXT: .cfi_def_cfa_offset 0
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+ ; RV32I-NEXT: ret
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+ %a = call fp128 @llvm.minimum.fp128 (fp128 %x , fp128 %y )
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+ ret fp128 %a
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+ }
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