@@ -202,28 +202,33 @@ and described in
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interest
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[ starts here] ( https://www.google.com/url?q=https://youtu.be/Ntj8ab-5cvE?t%3D596&sa=D&ust=1529450150971000&usg=AFQjCNFQHEWL7m8q3eO-1DiKw9zqC2v24Q ) .
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- ### Index type disallowed in vector/tensor/ memref types
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-
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- Index types are not allowed as elements of ` vector ` , ` tensor ` or ` memref ` type.
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- Index types are intended to be used for platform-specific "size" values and may
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- appear in subscripts, sizes of aggregate types and affine expressions. They are
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- also tightly coupled with ` affine.apply ` and affine.load/store operations;
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- having ` index ` type is a necessary precondition of a value to be acceptable by
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- these operations. While it may be useful to have ` memref<?xindex> ` to express
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- indirect accesses, e.g. sparse matrix manipulations or lookup tables, it creates
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- problems MLIR is not ready to address yet. MLIR needs to internally store
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- constants of aggregate types and emit code operating on values of those types,
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- which are subject to target-specific size and alignment constraints. Since MLIR
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- does not have a target description mechanism at the moment, it cannot reliably
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- emit such code. Moreover, some platforms may not support vectors of type
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- equivalent to ` index ` .
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+ ### Index type disallowed in vector/memref types
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+
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+ Index types are not allowed as elements of ` vector ` and ` memref ` types. Index
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+ types are intended to be used for platform-specific "size" values and may appear
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+ in subscripts, sizes of aggregate types and affine expressions. They are also
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+ tightly coupled with ` affine.apply ` and affine.load/store operations; having
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+ ` index ` type is a necessary precondition of a value to be acceptable by these
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+ operations. While it may be useful to have ` memref<?xindex> ` to express indirect
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+ accesses, e.g. sparse matrix manipulations or lookup tables, it creates problems
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+ MLIR is not ready to address yet. MLIR needs to internally store constants of
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+ aggregate types and emit code operating on values of those types, which are
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+ subject to target-specific size and alignment constraints. Since MLIR does not
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+ have a target description mechanism at the moment, it cannot reliably emit such
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+ code. Moreover, some platforms may not support vectors of type equivalent to
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+ ` index ` .
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Indirect access use cases can be alternatively supported by providing and
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` index_cast ` instruction that allows for conversion between ` index ` and
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fixed-width integer types, at the SSA value level. It has an additional benefit
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of supporting smaller integer types, e.g. ` i8 ` or ` i16 ` , for small indices
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instead of (presumably larger) ` index ` type.
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+ Index types are allowed as element types of ` tensor ` types. The ` tensor ` type
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+ specifically abstracts the target-specific aspects that intersect with the
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+ code-generation-related/lowering-related concerns explained above. In fact, the
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+ ` tensor ` type even allows dialect-specific types as element types.
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+
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### Bit width of a non-primitive types and ` index ` is undefined
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The bit width of a compound type is not defined by MLIR, it may be defined by a
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