!fixup fix MPO and simplify builder calls

Author: michaelmaitland

llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp

@@ -13,6 +13,7 @@
 #include "RISCVLegalizerInfo.h"
 #include "RISCVMachineFunctionInfo.h"
 #include "RISCVSubtarget.h"
+#include "llvm/CodeGen/GlobalISel/GenericMachineInstrs.h"
 #include "llvm/CodeGen/GlobalISel/LegalizerHelper.h"
 #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
@@ -335,7 +336,6 @@ static Type *getTypeForLLT(LLT Ty, LLVMContext &C) {
   return IntegerType::get(C, Ty.getSizeInBits());
 }
 
-#include "llvm/CodeGen/GlobalISel/GenericMachineInstrs.h"
 bool RISCVLegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper,
                                            MachineInstr &MI) const {
   Intrinsic::ID IntrinsicID = cast<GIntrinsic>(MI).getIntrinsicID();
@@ -352,22 +352,18 @@ bool RISCVLegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper,
     const DataLayout &DL = MIRBuilder.getDataLayout();
     LLVMContext &Ctx = MF.getFunction().getContext();
 
-    Register DstLst = MI.getOperand(0).getReg();
+    Register DstLst = MI.getOperand(1).getReg();
     LLT PtrTy = MRI.getType(DstLst);
 
     // Load the source va_list
     Align Alignment = Align(DL.getABITypeAlign(getTypeForLLT(PtrTy, Ctx)));
-    MachineMemOperand *LoadMMO =
-        MF.getMachineMemOperand(MachinePointerInfo::getUnknownStack(MF),
-                                MachineMemOperand::MOLoad, PtrTy, Alignment);
-    Register Tmp = MRI.createGenericVirtualRegister(PtrTy);
-    Register SrcLst = MI.getOperand(1).getReg();
-    MIRBuilder.buildLoad(Tmp, SrcLst, *LoadMMO);
+    MachineMemOperand *LoadMMO = MF.getMachineMemOperand(
+        MachinePointerInfo(), MachineMemOperand::MOLoad, PtrTy, Alignment);
+    auto Tmp = MIRBuilder.buildLoad(PtrTy, MI.getOperand(2), *LoadMMO);
 
     // Store the result in the destination va_list
-    MachineMemOperand *StoreMMO =
-        MF.getMachineMemOperand(MachinePointerInfo::getUnknownStack(MF),
-                                MachineMemOperand::MOStore, PtrTy, Alignment);
+    MachineMemOperand *StoreMMO = MF.getMachineMemOperand(
+        MachinePointerInfo(), MachineMemOperand::MOStore, PtrTy, Alignment);
     MIRBuilder.buildStore(DstLst, Tmp, *StoreMMO);
 
     MI.eraseFromParent();

llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vacopy.ll

@@ -12,7 +12,7 @@ define void @test_va_copy(ptr %dest_list, ptr %src_list) {
   ; RV32I-NEXT: {{  $}}
   ; RV32I-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x10
   ; RV32I-NEXT:   [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
-  ; RV32I-NEXT:   G_VACOPY [[COPY]](p0), [[COPY1]]
+  ; RV32I-NEXT:   G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.va_copy), [[COPY]](p0), [[COPY1]](p0)
   ; RV32I-NEXT:   PseudoRET
   ;
   ; RV64I-LABEL: name: test_va_copy
@@ -21,7 +21,7 @@ define void @test_va_copy(ptr %dest_list, ptr %src_list) {
   ; RV64I-NEXT: {{  $}}
   ; RV64I-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x10
   ; RV64I-NEXT:   [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
-  ; RV64I-NEXT:   G_VACOPY [[COPY]](p0), [[COPY1]]
+  ; RV64I-NEXT:   G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.va_copy), [[COPY]](p0), [[COPY1]](p0)
   ; RV64I-NEXT:   PseudoRET
   call void @llvm.va_copy(ptr %dest_list, ptr %src_list)
   ret void

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vacopy.mir

@@ -0,0 +1,23 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - | FileCheck %s
+
+---
+name:            test_va_copy
+body:             |
+  bb.1:
+    liveins: $x10, $x11
+
+    ; CHECK-LABEL: name: test_va_copy
+    ; CHECK: liveins: $x10, $x11
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
+    ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[COPY1]](p0) :: (load (p0))
+    ; CHECK-NEXT: G_STORE [[COPY]](p0), [[LOAD]](p0) :: (store (p0))
+    ; CHECK-NEXT: PseudoRET
+    %0:_(p0) = COPY $x10
+    %1:_(p0) = COPY $x11
+    G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.va_copy), %0(p0), %1(p0)
+    PseudoRET
+...