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[gn] port 6a477f6 (aarch64 SDNodeInfo)
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  • llvm/utils/gn/secondary

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llvm/utils/gn/secondary/bolt/unittests/Core/BUILD.gn

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@@ -35,6 +35,7 @@ unittest("CoreTests") {
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deps += [
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"//llvm/lib/Target/AArch64/MCTargetDesc",
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"//llvm/lib/Target/AArch64/Utils",
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"//llvm/lib/Target/AArch64:AArch64GenSDNodeInfo",
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]
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}
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if (llvm_build_X86) {

llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn

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@@ -72,6 +72,15 @@ tablegen("AArch64GenRegisterBank") {
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td_file = "AArch64.td"
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}
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tablegen("AArch64GenSDNodeInfo") {
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visibility = [
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":LLVMAArch64CodeGen",
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"//bolt/unittests/Core:CoreTests",
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]
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args = [ "-gen-sd-node-info" ]
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td_file = "AArch64.td"
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}
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static_library("LLVMAArch64CodeGen") {
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deps = [
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":AArch64GenCallingConv",
@@ -84,6 +93,7 @@ static_library("LLVMAArch64CodeGen") {
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":AArch64GenPostLegalizeGILowering",
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":AArch64GenPreLegalizeGICombiner",
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":AArch64GenRegisterBank",
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":AArch64GenSDNodeInfo",
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# See https://reviews.llvm.org/D69130
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"AsmParser:AArch64GenAsmMatcher",

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