File tree Expand file tree Collapse file tree 1 file changed +3
-4
lines changed
llvm/include/llvm/CodeGen Expand file tree Collapse file tree 1 file changed +3
-4
lines changed Original file line number Diff line number Diff line change @@ -81,9 +81,8 @@ class TargetRegisterClass {
81
81
// / Return the number of registers in this class.
82
82
unsigned getNumRegs () const { return MC->getNumRegs (); }
83
83
84
- iterator_range<SmallVectorImpl<MCPhysReg>::const_iterator>
85
- getRegisters () const {
86
- return make_range (MC->begin (), MC->end ());
84
+ ArrayRef<MCPhysReg> getRegisters () const {
85
+ return ArrayRef (begin (), getNumRegs ());
87
86
}
88
87
89
88
// / Return the specified register in the class.
@@ -203,7 +202,7 @@ class TargetRegisterClass {
203
202
// /
204
203
// / By default, this method returns all registers in the class.
205
204
ArrayRef<MCPhysReg> getRawAllocationOrder (const MachineFunction &MF) const {
206
- return OrderFunc ? OrderFunc (MF) : ArrayRef ( begin (), getNumRegs () );
205
+ return OrderFunc ? OrderFunc (MF) : getRegisters ( );
207
206
}
208
207
209
208
// / Returns the combination of all lane masks of register in this class.
You can’t perform that action at this time.
0 commit comments