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// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.pext.nxv16i1(target("aarch64.svcount") [[C:%.*]], i32 0)
@@ -18,7 +24,7 @@
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// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.pext.nxv16i1(target("aarch64.svcount") [[C:%.*]], i32 0)
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// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]
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//
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svbool_ttest_svpext_lane_c8_0(svcount_tc) {
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svbool_ttest_svpext_lane_c8_0(svcount_tc) ATTR{
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returnsvpext_lane_c8(c, 0);
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}
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@@ -32,7 +38,7 @@ svbool_t test_svpext_lane_c8_0(svcount_t c) {
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// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.pext.nxv16i1(target("aarch64.svcount") [[C:%.*]], i32 3)
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// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]
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//
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svbool_ttest_svpext_lane_c8_3(svcount_tc) {
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svbool_ttest_svpext_lane_c8_3(svcount_tc) ATTR{
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returnsvpext_lane_c8(c, 3);
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}
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@@ -48,7 +54,7 @@ svbool_t test_svpext_lane_c8_3(svcount_t c) {
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// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]])
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// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
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//
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svbool_ttest_svpext_lane_c16_0(svcount_tc) {
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svbool_ttest_svpext_lane_c16_0(svcount_tc) ATTR{
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returnsvpext_lane_c16(c, 0);
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}
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@@ -64,7 +70,7 @@ svbool_t test_svpext_lane_c16_0(svcount_t c) {
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// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]])
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// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
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//
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svbool_ttest_svpext_lane_c16_3(svcount_tc) {
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svbool_ttest_svpext_lane_c16_3(svcount_tc) ATTR{
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returnsvpext_lane_c16(c, 3);
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}
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@@ -80,7 +86,7 @@ svbool_t test_svpext_lane_c16_3(svcount_t c) {
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// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]])
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// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
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//
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svbool_ttest_svpext_lane_c32_0(svcount_tc) {
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svbool_ttest_svpext_lane_c32_0(svcount_tc) ATTR{
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returnsvpext_lane_c32(c, 0);
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}
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@@ -96,7 +102,7 @@ svbool_t test_svpext_lane_c32_0(svcount_t c) {
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// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]])
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// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
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//
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svbool_ttest_svpext_lane_c32_3(svcount_tc) {
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svbool_ttest_svpext_lane_c32_3(svcount_tc) ATTR{
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returnsvpext_lane_c32(c, 3);
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}
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@@ -112,7 +118,7 @@ svbool_t test_svpext_lane_c32_3(svcount_t c) {
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// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]])
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// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
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//
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svbool_ttest_svpext_lane_c64_0(svcount_tc) {
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svbool_ttest_svpext_lane_c64_0(svcount_tc) ATTR{
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returnsvpext_lane_c64(c, 0);
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}
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@@ -128,7 +134,7 @@ svbool_t test_svpext_lane_c64_0(svcount_t c) {
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// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]])
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// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
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//
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svbool_ttest_svpext_lane_c64_3(svcount_tc) {
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svbool_ttest_svpext_lane_c64_3(svcount_tc) ATTR{
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returnsvpext_lane_c64(c, 3);
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}
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@@ -150,7 +156,7 @@ svbool_t test_svpext_lane_c64_3(svcount_t c) {
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// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> [[TMP2]], <vscale x 16 x i1> [[TMP3]], i64 16)
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// CPP-CHECK-NEXT: ret <vscale x 32 x i1> [[TMP4]]
@@ -172,7 +178,7 @@ svboolx2_t test_svpext_lane_c8_x2_0(svcount_t c) {
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// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> [[TMP2]], <vscale x 16 x i1> [[TMP3]], i64 16)
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// CPP-CHECK-NEXT: ret <vscale x 32 x i1> [[TMP4]]
@@ -198,7 +204,7 @@ svboolx2_t test_svpext_lane_c8_x2_1(svcount_t c) {
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// CPP-CHECK-NEXT: [[TMP6:%.*]] = tail call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> [[TMP3]], <vscale x 16 x i1> [[TMP5]], i64 16)
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// CPP-CHECK-NEXT: ret <vscale x 32 x i1> [[TMP6]]
@@ -224,7 +230,7 @@ svboolx2_t test_svpext_lane_c16_x2_0(svcount_t c) {
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// CPP-CHECK-NEXT: [[TMP6:%.*]] = tail call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> [[TMP3]], <vscale x 16 x i1> [[TMP5]], i64 16)
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// CPP-CHECK-NEXT: ret <vscale x 32 x i1> [[TMP6]]
@@ -250,7 +256,7 @@ svboolx2_t test_svpext_lane_c16_x2_1(svcount_t c) {
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// CPP-CHECK-NEXT: [[TMP6:%.*]] = tail call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> [[TMP3]], <vscale x 16 x i1> [[TMP5]], i64 16)
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// CPP-CHECK-NEXT: ret <vscale x 32 x i1> [[TMP6]]
@@ -276,7 +282,7 @@ svboolx2_t test_svpext_lane_c32_x2_0(svcount_t c) {
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// CPP-CHECK-NEXT: [[TMP6:%.*]] = tail call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> [[TMP3]], <vscale x 16 x i1> [[TMP5]], i64 16)
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// CPP-CHECK-NEXT: ret <vscale x 32 x i1> [[TMP6]]
@@ -302,7 +308,7 @@ svboolx2_t test_svpext_lane_c32_x2_1(svcount_t c) {
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// CPP-CHECK-NEXT: [[TMP6:%.*]] = tail call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> [[TMP3]], <vscale x 16 x i1> [[TMP5]], i64 16)
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// CPP-CHECK-NEXT: ret <vscale x 32 x i1> [[TMP6]]
@@ -328,6 +334,6 @@ svboolx2_t test_svpext_lane_c64_x2_0(svcount_t c) {
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// CPP-CHECK-NEXT: [[TMP6:%.*]] = tail call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> [[TMP3]], <vscale x 16 x i1> [[TMP5]], i64 16)
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// CPP-CHECK-NEXT: ret <vscale x 32 x i1> [[TMP6]]
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