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jhuber6jhuber6
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[LLVM] Factor disabled Libcalls into the initializer (#98421)
Summary: These Libcalls represent which functions are available to the backend. If a runtime call is not available, the target sets the the name to `nullptr`. Currently, this logic is spread around the various targets. This patch pulls all of the locations that disable libcalls into the intializer. This patch is effectively NFC. The motivation behind this patch is that currently the LTO handling uses the list of all runtime calls to determine which functions cannot be internalized and must be extracted from static libraries. We do not want this to happen for libcalls that are not emitted by the backend. A follow-up patch will move out this logic so the LTO pass can know which rtlib calls are actually used by the backend.
1 parent 6c903f0 commit 3f1a767

13 files changed

+138
-113
lines changed

‎llvm/lib/CodeGen/TargetLoweringBase.cpp

Lines changed: 138 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -290,6 +290,144 @@ void TargetLoweringBase::InitLibcalls(const Triple &TT) {
290290
setLibcallName(RTLIB::FREXP_F128, nullptr);
291291
setLibcallName(RTLIB::FREXP_PPCF128, nullptr);
292292
}
293+
294+
if (TT.isAArch64()) {
295+
if (TT.isOSMSVCRT()) {
296+
// MSVCRT doesn't have powi; fall back to pow
297+
setLibcallName(RTLIB::POWI_F32, nullptr);
298+
setLibcallName(RTLIB::POWI_F64, nullptr);
299+
}
300+
}
301+
302+
// Disable most libcalls on AMDGPU.
303+
if (TT.isAMDGPU()) {
304+
for (int I = 0; I < RTLIB::UNKNOWN_LIBCALL; ++I) {
305+
if (I < RTLIB::ATOMIC_LOAD || I > RTLIB::ATOMIC_FETCH_NAND_16)
306+
setLibcallName(static_cast<RTLIB::Libcall>(I), nullptr);
307+
}
308+
}
309+
310+
if (TT.isARM() || TT.isThumb()) {
311+
// These libcalls are not available in 32-bit.
312+
setLibcallName(RTLIB::SHL_I128, nullptr);
313+
setLibcallName(RTLIB::SRL_I128, nullptr);
314+
setLibcallName(RTLIB::SRA_I128, nullptr);
315+
setLibcallName(RTLIB::MUL_I128, nullptr);
316+
setLibcallName(RTLIB::MULO_I64, nullptr);
317+
setLibcallName(RTLIB::MULO_I128, nullptr);
318+
319+
if (TT.isOSMSVCRT()) {
320+
// MSVCRT doesn't have powi; fall back to pow
321+
setLibcallName(RTLIB::POWI_F32, nullptr);
322+
setLibcallName(RTLIB::POWI_F64, nullptr);
323+
}
324+
}
325+
326+
if (TT.getArch() == Triple::ArchType::avr) {
327+
// Division rtlib functions (not supported), use divmod functions instead
328+
setLibcallName(RTLIB::SDIV_I8, nullptr);
329+
setLibcallName(RTLIB::SDIV_I16, nullptr);
330+
setLibcallName(RTLIB::SDIV_I32, nullptr);
331+
setLibcallName(RTLIB::UDIV_I8, nullptr);
332+
setLibcallName(RTLIB::UDIV_I16, nullptr);
333+
setLibcallName(RTLIB::UDIV_I32, nullptr);
334+
335+
// Modulus rtlib functions (not supported), use divmod functions instead
336+
setLibcallName(RTLIB::SREM_I8, nullptr);
337+
setLibcallName(RTLIB::SREM_I16, nullptr);
338+
setLibcallName(RTLIB::SREM_I32, nullptr);
339+
setLibcallName(RTLIB::UREM_I8, nullptr);
340+
setLibcallName(RTLIB::UREM_I16, nullptr);
341+
setLibcallName(RTLIB::UREM_I32, nullptr);
342+
}
343+
344+
if (TT.getArch() == Triple::ArchType::hexagon) {
345+
// These cause problems when the shift amount is non-constant.
346+
setLibcallName(RTLIB::SHL_I128, nullptr);
347+
setLibcallName(RTLIB::SRL_I128, nullptr);
348+
setLibcallName(RTLIB::SRA_I128, nullptr);
349+
}
350+
351+
if (TT.isLoongArch()) {
352+
if (!TT.isLoongArch64()) {
353+
// Set libcalls.
354+
setLibcallName(RTLIB::MUL_I128, nullptr);
355+
// The MULO libcall is not part of libgcc, only compiler-rt.
356+
setLibcallName(RTLIB::MULO_I64, nullptr);
357+
}
358+
// The MULO libcall is not part of libgcc, only compiler-rt.
359+
setLibcallName(RTLIB::MULO_I128, nullptr);
360+
}
361+
362+
if (TT.isMIPS32()) {
363+
// These libcalls are not available in 32-bit.
364+
setLibcallName(RTLIB::SHL_I128, nullptr);
365+
setLibcallName(RTLIB::SRL_I128, nullptr);
366+
setLibcallName(RTLIB::SRA_I128, nullptr);
367+
setLibcallName(RTLIB::MUL_I128, nullptr);
368+
setLibcallName(RTLIB::MULO_I64, nullptr);
369+
setLibcallName(RTLIB::MULO_I128, nullptr);
370+
}
371+
372+
if (TT.isPPC()) {
373+
if (!TT.isPPC64()) {
374+
// These libcalls are not available in 32-bit.
375+
setLibcallName(RTLIB::SHL_I128, nullptr);
376+
setLibcallName(RTLIB::SRL_I128, nullptr);
377+
setLibcallName(RTLIB::SRA_I128, nullptr);
378+
setLibcallName(RTLIB::MUL_I128, nullptr);
379+
setLibcallName(RTLIB::MULO_I64, nullptr);
380+
}
381+
setLibcallName(RTLIB::MULO_I128, nullptr);
382+
}
383+
384+
if (TT.isRISCV32()) {
385+
// These libcalls are not available in 32-bit.
386+
setLibcallName(RTLIB::SHL_I128, nullptr);
387+
setLibcallName(RTLIB::SRL_I128, nullptr);
388+
setLibcallName(RTLIB::SRA_I128, nullptr);
389+
setLibcallName(RTLIB::MUL_I128, nullptr);
390+
setLibcallName(RTLIB::MULO_I64, nullptr);
391+
}
392+
393+
if (TT.isSPARC()) {
394+
if (!TT.isSPARC64()) {
395+
// These libcalls are not available in 32-bit.
396+
setLibcallName(RTLIB::MULO_I64, nullptr);
397+
setLibcallName(RTLIB::MUL_I128, nullptr);
398+
setLibcallName(RTLIB::SHL_I128, nullptr);
399+
setLibcallName(RTLIB::SRL_I128, nullptr);
400+
setLibcallName(RTLIB::SRA_I128, nullptr);
401+
}
402+
setLibcallName(RTLIB::MULO_I128, nullptr);
403+
}
404+
405+
if (TT.isSystemZ()) {
406+
setLibcallName(RTLIB::SRL_I128, nullptr);
407+
setLibcallName(RTLIB::SHL_I128, nullptr);
408+
setLibcallName(RTLIB::SRA_I128, nullptr);
409+
}
410+
411+
if (TT.isX86()) {
412+
if (TT.getArch() == Triple::ArchType::x86) {
413+
// These libcalls are not available in 32-bit.
414+
setLibcallName(RTLIB::SHL_I128, nullptr);
415+
setLibcallName(RTLIB::SRL_I128, nullptr);
416+
setLibcallName(RTLIB::SRA_I128, nullptr);
417+
setLibcallName(RTLIB::MUL_I128, nullptr);
418+
// The MULO libcall is not part of libgcc, only compiler-rt.
419+
setLibcallName(RTLIB::MULO_I64, nullptr);
420+
}
421+
422+
// The MULO libcall is not part of libgcc, only compiler-rt.
423+
setLibcallName(RTLIB::MULO_I128, nullptr);
424+
425+
if (TT.isOSMSVCRT()) {
426+
// MSVCRT doesn't have powi; fall back to pow
427+
setLibcallName(RTLIB::POWI_F32, nullptr);
428+
setLibcallName(RTLIB::POWI_F64, nullptr);
429+
}
430+
}
293431
}
294432

295433
/// GetFPLibCall - Helper to return the right libcall for the given floating

‎llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1010,12 +1010,6 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
10101010
setOperationAction(ISD::FSINCOS, MVT::f32, Expand);
10111011
}
10121012

1013-
if (Subtarget->getTargetTriple().isOSMSVCRT()) {
1014-
// MSVCRT doesn't have powi; fall back to pow
1015-
setLibcallName(RTLIB::POWI_F32, nullptr);
1016-
setLibcallName(RTLIB::POWI_F64, nullptr);
1017-
}
1018-
10191013
// Make floating-point constants legal for the large code model, so they don't
10201014
// become loads from the constant pool.
10211015
if (Subtarget->isTargetMachO() && TM.getCodeModel() == CodeModel::Large) {

‎llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -574,12 +574,6 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(const TargetMachine &TM,
574574
setOperationAction(ISD::SELECT, MVT::v12f32, Promote);
575575
AddPromotedToType(ISD::SELECT, MVT::v12f32, MVT::v12i32);
576576

577-
// Disable most libcalls.
578-
for (int I = 0; I < RTLIB::UNKNOWN_LIBCALL; ++I) {
579-
if (I < RTLIB::ATOMIC_LOAD || I > RTLIB::ATOMIC_FETCH_NAND_16)
580-
setLibcallName(static_cast<RTLIB::Libcall>(I), nullptr);
581-
}
582-
583577
setSchedulingPreference(Sched::RegPressure);
584578
setJumpIsExpensive(true);
585579

‎llvm/lib/Target/ARM/ARMISelLowering.cpp

Lines changed: 0 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -581,14 +581,6 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM,
581581
}
582582
}
583583

584-
// These libcalls are not available in 32-bit.
585-
setLibcallName(RTLIB::SHL_I128, nullptr);
586-
setLibcallName(RTLIB::SRL_I128, nullptr);
587-
setLibcallName(RTLIB::SRA_I128, nullptr);
588-
setLibcallName(RTLIB::MUL_I128, nullptr);
589-
setLibcallName(RTLIB::MULO_I64, nullptr);
590-
setLibcallName(RTLIB::MULO_I128, nullptr);
591-
592584
// RTLIB
593585
if (Subtarget->isAAPCS_ABI() &&
594586
(Subtarget->isTargetAEABI() || Subtarget->isTargetGNUAEABI() ||
@@ -1309,12 +1301,6 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM,
13091301
setOperationAction(ISD::UDIVREM, MVT::i32, Expand);
13101302
}
13111303

1312-
if (Subtarget->getTargetTriple().isOSMSVCRT()) {
1313-
// MSVCRT doesn't have powi; fall back to pow
1314-
setLibcallName(RTLIB::POWI_F32, nullptr);
1315-
setLibcallName(RTLIB::POWI_F64, nullptr);
1316-
}
1317-
13181304
setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
13191305
setOperationAction(ISD::ConstantPool, MVT::i32, Custom);
13201306
setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom);

‎llvm/lib/Target/AVR/AVRISelLowering.cpp

Lines changed: 0 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -199,22 +199,6 @@ AVRTargetLowering::AVRTargetLowering(const AVRTargetMachine &TM,
199199
// improvements in how we treat 16-bit "registers" to be feasible.
200200
}
201201

202-
// Division rtlib functions (not supported), use divmod functions instead
203-
setLibcallName(RTLIB::SDIV_I8, nullptr);
204-
setLibcallName(RTLIB::SDIV_I16, nullptr);
205-
setLibcallName(RTLIB::SDIV_I32, nullptr);
206-
setLibcallName(RTLIB::UDIV_I8, nullptr);
207-
setLibcallName(RTLIB::UDIV_I16, nullptr);
208-
setLibcallName(RTLIB::UDIV_I32, nullptr);
209-
210-
// Modulus rtlib functions (not supported), use divmod functions instead
211-
setLibcallName(RTLIB::SREM_I8, nullptr);
212-
setLibcallName(RTLIB::SREM_I16, nullptr);
213-
setLibcallName(RTLIB::SREM_I32, nullptr);
214-
setLibcallName(RTLIB::UREM_I8, nullptr);
215-
setLibcallName(RTLIB::UREM_I16, nullptr);
216-
setLibcallName(RTLIB::UREM_I32, nullptr);
217-
218202
// Division and modulus rtlib functions
219203
setLibcallName(RTLIB::SDIVREM_I8, "__divmodqi4");
220204
setLibcallName(RTLIB::SDIVREM_I16, "__divmodhi4");

‎llvm/lib/Target/Hexagon/HexagonISelLowering.cpp

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1901,11 +1901,6 @@ HexagonTargetLowering::HexagonTargetLowering(const TargetMachine &TM,
19011901
setLibcallName(RTLIB::FPROUND_F32_F16, "__truncsfhf2");
19021902
setLibcallName(RTLIB::FPROUND_F64_F16, "__truncdfhf2");
19031903
setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfsf2");
1904-
1905-
// These cause problems when the shift amount is non-constant.
1906-
setLibcallName(RTLIB::SHL_I128, nullptr);
1907-
setLibcallName(RTLIB::SRL_I128, nullptr);
1908-
setLibcallName(RTLIB::SRA_I128, nullptr);
19091904
}
19101905

19111906
const char* HexagonTargetLowering::getTargetNodeName(unsigned Opcode) const {

‎llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -152,16 +152,8 @@ LoongArchTargetLowering::LoongArchTargetLowering(const TargetMachine &TM,
152152
setOperationAction(ISD::INTRINSIC_VOID, MVT::i64, Custom);
153153
setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i64, Custom);
154154
setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i64, Custom);
155-
156-
// Set libcalls.
157-
setLibcallName(RTLIB::MUL_I128, nullptr);
158-
// The MULO libcall is not part of libgcc, only compiler-rt.
159-
setLibcallName(RTLIB::MULO_I64, nullptr);
160155
}
161156

162-
// The MULO libcall is not part of libgcc, only compiler-rt.
163-
setLibcallName(RTLIB::MULO_I128, nullptr);
164-
165157
setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Custom);
166158

167159
static const ISD::CondCode FPCCToExpand[] = {

‎llvm/lib/Target/Mips/MipsISelLowering.cpp

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -517,16 +517,6 @@ MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,
517517
setTargetDAGCombine({ISD::SDIVREM, ISD::UDIVREM, ISD::SELECT, ISD::AND,
518518
ISD::OR, ISD::ADD, ISD::SUB, ISD::AssertZext, ISD::SHL});
519519

520-
if (ABI.IsO32()) {
521-
// These libcalls are not available in 32-bit.
522-
setLibcallName(RTLIB::SHL_I128, nullptr);
523-
setLibcallName(RTLIB::SRL_I128, nullptr);
524-
setLibcallName(RTLIB::SRA_I128, nullptr);
525-
setLibcallName(RTLIB::MUL_I128, nullptr);
526-
setLibcallName(RTLIB::MULO_I64, nullptr);
527-
setLibcallName(RTLIB::MULO_I128, nullptr);
528-
}
529-
530520
if (Subtarget.isGP64bit())
531521
setMaxAtomicSizeInBitsSupported(64);
532522
else

‎llvm/lib/Target/PowerPC/PPCISelLowering.cpp

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1377,16 +1377,6 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM,
13771377
setBooleanVectorContents(ZeroOrNegativeOneBooleanContent);
13781378
}
13791379

1380-
setLibcallName(RTLIB::MULO_I128, nullptr);
1381-
if (!isPPC64) {
1382-
// These libcalls are not available in 32-bit.
1383-
setLibcallName(RTLIB::SHL_I128, nullptr);
1384-
setLibcallName(RTLIB::SRL_I128, nullptr);
1385-
setLibcallName(RTLIB::SRA_I128, nullptr);
1386-
setLibcallName(RTLIB::MUL_I128, nullptr);
1387-
setLibcallName(RTLIB::MULO_I64, nullptr);
1388-
}
1389-
13901380
if (shouldInlineQuadwordAtomics())
13911381
setMaxAtomicSizeInBitsSupported(128);
13921382
else if (isPPC64)

‎llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -295,13 +295,7 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
295295
}
296296
}
297297
setOperationAction(ISD::SADDO, MVT::i32, Custom);
298-
} else {
299-
setLibcallName(
300-
{RTLIB::SHL_I128, RTLIB::SRL_I128, RTLIB::SRA_I128, RTLIB::MUL_I128},
301-
nullptr);
302-
setLibcallName(RTLIB::MULO_I64, nullptr);
303298
}
304-
305299
if (!Subtarget.hasStdExtZmmul()) {
306300
setOperationAction({ISD::MUL, ISD::MULHS, ISD::MULHU}, XLenVT, Expand);
307301
if (RV64LegalI32 && Subtarget.is64Bit())

‎llvm/lib/Target/Sparc/SparcISelLowering.cpp

Lines changed: 0 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1793,17 +1793,6 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
17931793
setOperationAction(ISD::ATOMIC_STORE, MVT::i64, Custom);
17941794
}
17951795

1796-
if (!Subtarget->is64Bit()) {
1797-
// These libcalls are not available in 32-bit.
1798-
setLibcallName(RTLIB::MULO_I64, nullptr);
1799-
setLibcallName(RTLIB::MUL_I128, nullptr);
1800-
setLibcallName(RTLIB::SHL_I128, nullptr);
1801-
setLibcallName(RTLIB::SRL_I128, nullptr);
1802-
setLibcallName(RTLIB::SRA_I128, nullptr);
1803-
}
1804-
1805-
setLibcallName(RTLIB::MULO_I128, nullptr);
1806-
18071796
if (!Subtarget->isV9()) {
18081797
// SparcV8 does not have FNEGD and FABSD.
18091798
setOperationAction(ISD::FNEG, MVT::f64, Custom);

‎llvm/lib/Target/SystemZ/SystemZISelLowering.cpp

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -345,9 +345,6 @@ SystemZTargetLowering::SystemZTargetLowering(const TargetMachine &TM,
345345
setOperationAction(ISD::SRL_PARTS, MVT::i64, Expand);
346346
setOperationAction(ISD::SHL_PARTS, MVT::i64, Expand);
347347
setOperationAction(ISD::SRA_PARTS, MVT::i64, Expand);
348-
setLibcallName(RTLIB::SRL_I128, nullptr);
349-
setLibcallName(RTLIB::SHL_I128, nullptr);
350-
setLibcallName(RTLIB::SRA_I128, nullptr);
351348

352349
// Also expand 256 bit shifts if i128 is a legal type.
353350
if (isTypeLegal(MVT::i128)) {

‎llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 0 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -180,12 +180,6 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
180180
}
181181
}
182182

183-
if (Subtarget.getTargetTriple().isOSMSVCRT()) {
184-
// MSVCRT doesn't have powi; fall back to pow
185-
setLibcallName(RTLIB::POWI_F32, nullptr);
186-
setLibcallName(RTLIB::POWI_F64, nullptr);
187-
}
188-
189183
if (Subtarget.canUseCMPXCHG16B())
190184
setMaxAtomicSizeInBitsSupported(128);
191185
else if (Subtarget.canUseCMPXCHG8B())
@@ -2444,18 +2438,6 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
24442438
setOperationAction(ISD::SSUBO_CARRY, VT, Custom);
24452439
}
24462440

2447-
if (!Subtarget.is64Bit()) {
2448-
// These libcalls are not available in 32-bit.
2449-
setLibcallName(RTLIB::SHL_I128, nullptr);
2450-
setLibcallName(RTLIB::SRL_I128, nullptr);
2451-
setLibcallName(RTLIB::SRA_I128, nullptr);
2452-
setLibcallName(RTLIB::MUL_I128, nullptr);
2453-
// The MULO libcall is not part of libgcc, only compiler-rt.
2454-
setLibcallName(RTLIB::MULO_I64, nullptr);
2455-
}
2456-
// The MULO libcall is not part of libgcc, only compiler-rt.
2457-
setLibcallName(RTLIB::MULO_I128, nullptr);
2458-
24592441
// Combine sin / cos into _sincos_stret if it is available.
24602442
if (getLibcallName(RTLIB::SINCOS_STRET_F32) != nullptr &&
24612443
getLibcallName(RTLIB::SINCOS_STRET_F64) != nullptr) {

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