@@ -305,19 +305,19 @@ class HWAddressSanitizer {
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int64_t getAccessInfo (bool IsWrite, unsigned AccessSizeIndex);
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ShadowTagCheckInfo insertShadowTagCheck (Value *Ptr, Instruction *InsertBefore,
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- DomTreeUpdater &DTU, LoopInfo & LI);
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+ DomTreeUpdater &DTU, LoopInfo * LI);
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void instrumentMemAccessOutline (Value *Ptr, bool IsWrite,
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unsigned AccessSizeIndex,
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Instruction *InsertBefore,
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- DomTreeUpdater &DTU, LoopInfo & LI);
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+ DomTreeUpdater &DTU, LoopInfo * LI);
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void instrumentMemAccessInline (Value *Ptr, bool IsWrite,
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unsigned AccessSizeIndex,
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Instruction *InsertBefore, DomTreeUpdater &DTU,
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- LoopInfo & LI);
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+ LoopInfo * LI);
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bool ignoreMemIntrinsic (MemIntrinsic *MI);
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void instrumentMemIntrinsic (MemIntrinsic *MI);
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bool instrumentMemAccess (InterestingMemoryOperand &O, DomTreeUpdater &DTU,
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- LoopInfo & LI);
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+ LoopInfo * LI);
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bool ignoreAccess (Instruction *Inst, Value *Ptr);
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void getInterestingMemoryOperands (
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Instruction *I, SmallVectorImpl<InterestingMemoryOperand> &Interesting);
@@ -872,7 +872,7 @@ int64_t HWAddressSanitizer::getAccessInfo(bool IsWrite,
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HWAddressSanitizer::ShadowTagCheckInfo
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HWAddressSanitizer::insertShadowTagCheck (Value *Ptr, Instruction *InsertBefore,
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- DomTreeUpdater &DTU, LoopInfo & LI) {
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+ DomTreeUpdater &DTU, LoopInfo * LI) {
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ShadowTagCheckInfo R;
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IRBuilder<> IRB (InsertBefore);
@@ -893,7 +893,7 @@ HWAddressSanitizer::insertShadowTagCheck(Value *Ptr, Instruction *InsertBefore,
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R.TagMismatchTerm = SplitBlockAndInsertIfThen (
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TagMismatch, InsertBefore, false ,
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- MDBuilder (*C).createBranchWeights (1 , 100000 ), &DTU, & LI);
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+ MDBuilder (*C).createBranchWeights (1 , 100000 ), &DTU, LI);
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return R;
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}
@@ -902,7 +902,7 @@ void HWAddressSanitizer::instrumentMemAccessOutline(Value *Ptr, bool IsWrite,
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unsigned AccessSizeIndex,
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Instruction *InsertBefore,
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DomTreeUpdater &DTU,
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- LoopInfo & LI) {
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+ LoopInfo * LI) {
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assert (!UsePageAliases);
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const int64_t AccessInfo = getAccessInfo (IsWrite, AccessSizeIndex);
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@@ -924,7 +924,7 @@ void HWAddressSanitizer::instrumentMemAccessInline(Value *Ptr, bool IsWrite,
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unsigned AccessSizeIndex,
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Instruction *InsertBefore,
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DomTreeUpdater &DTU,
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- LoopInfo & LI) {
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+ LoopInfo * LI) {
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assert (!UsePageAliases);
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const int64_t AccessInfo = getAccessInfo (IsWrite, AccessSizeIndex);
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@@ -935,7 +935,7 @@ void HWAddressSanitizer::instrumentMemAccessInline(Value *Ptr, bool IsWrite,
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IRB.CreateICmpUGT (TCI.MemTag , ConstantInt::get (Int8Ty, 15 ));
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Instruction *CheckFailTerm = SplitBlockAndInsertIfThen (
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OutOfShortGranuleTagRange, TCI.TagMismatchTerm , !Recover,
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- MDBuilder (*C).createBranchWeights (1 , 100000 ), &DTU, & LI);
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+ MDBuilder (*C).createBranchWeights (1 , 100000 ), &DTU, LI);
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IRB.SetInsertPoint (TCI.TagMismatchTerm );
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Value *PtrLowBits = IRB.CreateTrunc (IRB.CreateAnd (TCI.PtrLong , 15 ), Int8Ty);
@@ -944,7 +944,7 @@ void HWAddressSanitizer::instrumentMemAccessInline(Value *Ptr, bool IsWrite,
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Value *PtrLowBitsOOB = IRB.CreateICmpUGE (PtrLowBits, TCI.MemTag );
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SplitBlockAndInsertIfThen (PtrLowBitsOOB, TCI.TagMismatchTerm , false ,
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MDBuilder (*C).createBranchWeights (1 , 100000 ), &DTU,
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- & LI, CheckFailTerm->getParent ());
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+ LI, CheckFailTerm->getParent ());
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IRB.SetInsertPoint (TCI.TagMismatchTerm );
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Value *InlineTagAddr = IRB.CreateOr (TCI.AddrLong , 15 );
@@ -953,7 +953,7 @@ void HWAddressSanitizer::instrumentMemAccessInline(Value *Ptr, bool IsWrite,
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Value *InlineTagMismatch = IRB.CreateICmpNE (TCI.PtrTag , InlineTag);
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SplitBlockAndInsertIfThen (InlineTagMismatch, TCI.TagMismatchTerm , false ,
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MDBuilder (*C).createBranchWeights (1 , 100000 ), &DTU,
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- & LI, CheckFailTerm->getParent ());
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+ LI, CheckFailTerm->getParent ());
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IRB.SetInsertPoint (CheckFailTerm);
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InlineAsm *Asm;
@@ -1030,7 +1030,7 @@ void HWAddressSanitizer::instrumentMemIntrinsic(MemIntrinsic *MI) {
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bool HWAddressSanitizer::instrumentMemAccess (InterestingMemoryOperand &O,
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DomTreeUpdater &DTU,
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- LoopInfo & LI) {
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+ LoopInfo * LI) {
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Value *Addr = O.getPtr ();
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LLVM_DEBUG (dbgs () << " Instrumenting: " << O.getInsn () << " \n " );
@@ -1564,7 +1564,7 @@ void HWAddressSanitizer::sanitizeFunction(Function &F,
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LoopInfo *LI = FAM.getCachedResult <LoopAnalysis>(F);
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DomTreeUpdater DTU (DT, PDT, DomTreeUpdater::UpdateStrategy::Lazy);
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for (auto &Operand : OperandsToInstrument)
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- instrumentMemAccess (Operand, DTU, * LI);
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+ instrumentMemAccess (Operand, DTU, LI);
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DTU.flush ();
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if (ClInstrumentMemIntrinsics && !IntrinToInstrument.empty ()) {
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