Skip to content

Commit 4021541

Browse files
arsenmarsenm
committed
AMDGPU: Add baseline tests for #139317 
1 parent 04c0bfd commit 4021541

File tree

5 files changed

+1001
-5
lines changed

5 files changed

+1001
-5
lines changed

‎llvm/test/CodeGen/AMDGPU/fold-imm-copy-agpr.mir

Lines changed: 320 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,320 @@
1+
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
2+
# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -run-pass=si-fold-operands %s -o - | FileCheck -check-prefix=GCN %s
3+
4+
---
5+
name: v_mov_b64_pseudo_imm_0_copy_to_areg_64
6+
tracksRegLiveness: true
7+
body: |
8+
bb.0:
9+
; GCN-LABEL: name: v_mov_b64_pseudo_imm_0_copy_to_areg_64
10+
; GCN: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 0, implicit $exec
11+
; GCN-NEXT: [[COPY:%[0-9]+]]:areg_64_align2 = COPY [[V_MOV_B]]
12+
; GCN-NEXT: $agpr0_agpr1 = COPY [[COPY]]
13+
; GCN-NEXT: S_ENDPGM 0
14+
%0:vreg_64_align2 = V_MOV_B64_PSEUDO 0, implicit $exec
15+
%1:areg_64_align2 = COPY %0
16+
$agpr0_agpr1 = COPY %1
17+
S_ENDPGM 0
18+
19+
...
20+
21+
---
22+
name: v_mov_b64_pseudo_imm_neg1_copy_to_areg_64
23+
tracksRegLiveness: true
24+
body: |
25+
bb.0:
26+
; GCN-LABEL: name: v_mov_b64_pseudo_imm_neg1_copy_to_areg_64
27+
; GCN: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO -1, implicit $exec
28+
; GCN-NEXT: [[COPY:%[0-9]+]]:areg_64_align2 = COPY [[V_MOV_B]]
29+
; GCN-NEXT: $agpr0_agpr1 = COPY [[COPY]]
30+
; GCN-NEXT: S_ENDPGM 0
31+
%0:vreg_64_align2 = V_MOV_B64_PSEUDO -1, implicit $exec
32+
%1:areg_64_align2 = COPY %0
33+
$agpr0_agpr1 = COPY %1
34+
S_ENDPGM 0
35+
36+
...
37+
38+
---
39+
name: v_mov_b64_pseudo_literal_copy_to_areg_64
40+
tracksRegLiveness: true
41+
body: |
42+
bb.0:
43+
; GCN-LABEL: name: v_mov_b64_pseudo_literal_copy_to_areg_64
44+
; GCN: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 999, implicit $exec
45+
; GCN-NEXT: [[COPY:%[0-9]+]]:areg_64_align2 = COPY [[V_MOV_B]]
46+
; GCN-NEXT: $agpr0_agpr1 = COPY [[COPY]]
47+
; GCN-NEXT: S_ENDPGM 0
48+
%0:vreg_64_align2 = V_MOV_B64_PSEUDO 999, implicit $exec
49+
%1:areg_64_align2 = COPY %0
50+
$agpr0_agpr1 = COPY %1
51+
S_ENDPGM 0
52+
53+
...
54+
55+
---
56+
name: v_mov_b64_pseudo_imm_0_copy_sub0_to_agpr_32
57+
tracksRegLiveness: true
58+
body: |
59+
bb.0:
60+
; GCN-LABEL: name: v_mov_b64_pseudo_imm_0_copy_sub0_to_agpr_32
61+
; GCN: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec
62+
; GCN-NEXT: $agpr0 = COPY [[V_ACCVGPR_WRITE_B32_e64_]]
63+
; GCN-NEXT: S_ENDPGM 0
64+
%0:vreg_64_align2 = V_MOV_B64_PSEUDO 0, implicit $exec
65+
%1:agpr_32 = COPY %0.sub0
66+
$agpr0 = COPY %1
67+
S_ENDPGM 0
68+
69+
...
70+
71+
---
72+
name: v_mov_b64_pseudo_imm_0_copy_sub1_to_agpr_32
73+
tracksRegLiveness: true
74+
body: |
75+
bb.0:
76+
; GCN-LABEL: name: v_mov_b64_pseudo_imm_0_copy_sub1_to_agpr_32
77+
; GCN: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec
78+
; GCN-NEXT: $agpr0 = COPY [[V_ACCVGPR_WRITE_B32_e64_]]
79+
; GCN-NEXT: S_ENDPGM 0
80+
%0:vreg_64_align2 = V_MOV_B64_PSEUDO 0, implicit $exec
81+
%1:agpr_32 = COPY %0.sub1
82+
$agpr0 = COPY %1
83+
S_ENDPGM 0
84+
85+
...
86+
87+
---
88+
name: v_mov_b64_pseudo_lit_copy_sub0_to_agpr_32
89+
tracksRegLiveness: true
90+
body: |
91+
bb.0:
92+
; GCN-LABEL: name: v_mov_b64_pseudo_lit_copy_sub0_to_agpr_32
93+
; GCN: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4290672329592, implicit $exec
94+
; GCN-NEXT: [[COPY:%[0-9]+]]:agpr_32 = COPY [[V_MOV_B]].sub0
95+
; GCN-NEXT: $agpr0 = COPY [[COPY]]
96+
; GCN-NEXT: S_ENDPGM 0
97+
%0:vreg_64_align2 = V_MOV_B64_PSEUDO 4290672329592, implicit $exec
98+
%1:agpr_32 = COPY %0.sub0
99+
$agpr0 = COPY %1
100+
S_ENDPGM 0
101+
102+
...
103+
104+
---
105+
name: v_mov_b64_pseudo_lit_copy_sub1_to_agpr_32
106+
tracksRegLiveness: true
107+
body: |
108+
bb.0:
109+
; GCN-LABEL: name: v_mov_b64_pseudo_lit_copy_sub1_to_agpr_32
110+
; GCN: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4290672329592, implicit $exec
111+
; GCN-NEXT: [[COPY:%[0-9]+]]:agpr_32 = COPY [[V_MOV_B]].sub1
112+
; GCN-NEXT: $agpr0 = COPY [[COPY]]
113+
; GCN-NEXT: S_ENDPGM 0
114+
%0:vreg_64_align2 = V_MOV_B64_PSEUDO 4290672329592, implicit $exec
115+
%1:agpr_32 = COPY %0.sub1
116+
$agpr0 = COPY %1
117+
S_ENDPGM 0
118+
119+
...
120+
121+
122+
---
123+
name: v_mov_b64_pseudo_imm_0_copy_to_av_64
124+
tracksRegLiveness: true
125+
body: |
126+
bb.0:
127+
; GCN-LABEL: name: v_mov_b64_pseudo_imm_0_copy_to_av_64
128+
; GCN: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 0, implicit $exec
129+
; GCN-NEXT: [[COPY:%[0-9]+]]:av_64_align2 = COPY [[V_MOV_B]]
130+
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
131+
%0:vreg_64_align2 = V_MOV_B64_PSEUDO 0, implicit $exec
132+
%1:av_64_align2 = COPY %0
133+
S_ENDPGM 0, implicit %1
134+
135+
...
136+
137+
138+
# XXX need f64 use
139+
140+
141+
142+
143+
---
144+
name: v_mov_b64_pseudo_imm_0_full_copy_to_f64_use
145+
tracksRegLiveness: true
146+
body: |
147+
bb.0:
148+
liveins: $vgpr0_vgpr1
149+
; GCN-LABEL: name: v_mov_b64_pseudo_imm_0_full_copy_to_f64_use
150+
; GCN: liveins: $vgpr0_vgpr1
151+
; GCN-NEXT: {{ $}}
152+
; GCN-NEXT: [[COPY:%[0-9]+]]:vreg_64_align2 = COPY $vgpr0_vgpr1
153+
; GCN-NEXT: [[V_ADD_F64_e64_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, [[COPY]], 1, 0, 0, 0, implicit $mode, implicit $exec
154+
; GCN-NEXT: $vgpr0_vgpr1 = COPY [[V_ADD_F64_e64_]]
155+
; GCN-NEXT: S_ENDPGM 0
156+
%0:vreg_64_align2 = COPY $vgpr0_vgpr1
157+
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 0, implicit $exec
158+
%2:vreg_64_align2 = COPY %1
159+
%3:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, %0, 1, %2, 0, 0, implicit $mode, implicit $exec
160+
$vgpr0_vgpr1 = COPY %3
161+
S_ENDPGM 0
162+
163+
...
164+
165+
---
166+
name: v_mov_b64_pseudo_imm_fp64_1_full_copy_to_f64_use
167+
tracksRegLiveness: true
168+
body: |
169+
bb.0:
170+
liveins: $vgpr0_vgpr1
171+
; GCN-LABEL: name: v_mov_b64_pseudo_imm_fp64_1_full_copy_to_f64_use
172+
; GCN: liveins: $vgpr0_vgpr1
173+
; GCN-NEXT: {{ $}}
174+
; GCN-NEXT: [[COPY:%[0-9]+]]:vreg_64_align2 = COPY $vgpr0_vgpr1
175+
; GCN-NEXT: [[V_ADD_F64_e64_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, [[COPY]], 1, 4607182418800017408, 0, 0, implicit $mode, implicit $exec
176+
; GCN-NEXT: $vgpr0_vgpr1 = COPY [[V_ADD_F64_e64_]]
177+
; GCN-NEXT: S_ENDPGM 0
178+
%0:vreg_64_align2 = COPY $vgpr0_vgpr1
179+
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 4607182418800017408, implicit $exec
180+
%2:vreg_64_align2 = COPY %1
181+
%3:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, %0, 1, %2, 0, 0, implicit $mode, implicit $exec
182+
$vgpr0_vgpr1 = COPY %3
183+
S_ENDPGM 0
184+
185+
...
186+
187+
---
188+
name: v_mov_b64_pseudo_lit_full_copy_to_f64_use
189+
tracksRegLiveness: true
190+
body: |
191+
bb.0:
192+
liveins: $vgpr0_vgpr1
193+
; GCN-LABEL: name: v_mov_b64_pseudo_lit_full_copy_to_f64_use
194+
; GCN: liveins: $vgpr0_vgpr1
195+
; GCN-NEXT: {{ $}}
196+
; GCN-NEXT: [[COPY:%[0-9]+]]:vreg_64_align2 = COPY $vgpr0_vgpr1
197+
; GCN-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4290672329592, implicit $exec
198+
; GCN-NEXT: [[V_ADD_F64_e64_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, [[COPY]], 1, [[V_MOV_B]], 0, 0, implicit $mode, implicit $exec
199+
; GCN-NEXT: $vgpr0_vgpr1 = COPY [[V_ADD_F64_e64_]]
200+
; GCN-NEXT: S_ENDPGM 0
201+
%0:vreg_64_align2 = COPY $vgpr0_vgpr1
202+
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 4290672329592, implicit $exec
203+
%2:vreg_64_align2 = COPY %1
204+
%3:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, %0, 1, %2, 0, 0, implicit $mode, implicit $exec
205+
$vgpr0_vgpr1 = COPY %3
206+
S_ENDPGM 0
207+
208+
...
209+
210+
---
211+
name: v_mov_b64_pseudo_imm_fp32_1_splat_full_copy_to_f64_use
212+
tracksRegLiveness: true
213+
body: |
214+
bb.0:
215+
liveins: $vgpr0_vgpr1
216+
; GCN-LABEL: name: v_mov_b64_pseudo_imm_fp32_1_splat_full_copy_to_f64_use
217+
; GCN: liveins: $vgpr0_vgpr1
218+
; GCN-NEXT: {{ $}}
219+
; GCN-NEXT: [[COPY:%[0-9]+]]:vreg_64_align2 = COPY $vgpr0_vgpr1
220+
; GCN-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4575657222473777152, implicit $exec
221+
; GCN-NEXT: [[V_ADD_F64_e64_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, [[COPY]], 1, [[V_MOV_B]], 0, 0, implicit $mode, implicit $exec
222+
; GCN-NEXT: $vgpr0_vgpr1 = COPY [[V_ADD_F64_e64_]]
223+
; GCN-NEXT: S_ENDPGM 0
224+
%0:vreg_64_align2 = COPY $vgpr0_vgpr1
225+
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 4575657222473777152, implicit $exec
226+
%2:vreg_64_align2 = COPY %1
227+
%3:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, %0, 1, %2, 0, 0, implicit $mode, implicit $exec
228+
$vgpr0_vgpr1 = COPY %3
229+
S_ENDPGM 0
230+
231+
...
232+
233+
---
234+
name: v_mov_b64_pseudo_imm_fp32_1_splat_copy_extract_sub0_to_f32_use
235+
tracksRegLiveness: true
236+
body: |
237+
bb.0:
238+
liveins: $vgpr0
239+
; GCN-LABEL: name: v_mov_b64_pseudo_imm_fp32_1_splat_copy_extract_sub0_to_f32_use
240+
; GCN: liveins: $vgpr0
241+
; GCN-NEXT: {{ $}}
242+
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
243+
; GCN-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 1, 1065353216, 0, 0, implicit $mode, implicit $exec
244+
; GCN-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]]
245+
; GCN-NEXT: S_ENDPGM 0
246+
%0:vgpr_32 = COPY $vgpr0
247+
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 4575657222473777152, implicit $exec
248+
%2:vgpr_32 = COPY %1.sub0
249+
%3:vgpr_32 = nofpexcept V_ADD_F32_e64 0, %0, 1, %2, 0, 0, implicit $mode, implicit $exec
250+
$vgpr0 = COPY %3
251+
S_ENDPGM 0
252+
253+
...
254+
255+
---
256+
name: v_mov_b64_pseudo_imm_fp32_1_splat_copy_extract_sub1_to_f32_use
257+
tracksRegLiveness: true
258+
body: |
259+
bb.0:
260+
liveins: $vgpr0
261+
; GCN-LABEL: name: v_mov_b64_pseudo_imm_fp32_1_splat_copy_extract_sub1_to_f32_use
262+
; GCN: liveins: $vgpr0
263+
; GCN-NEXT: {{ $}}
264+
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
265+
; GCN-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 1, 1065353216, 0, 0, implicit $mode, implicit $exec
266+
; GCN-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]]
267+
; GCN-NEXT: S_ENDPGM 0
268+
%0:vgpr_32 = COPY $vgpr0
269+
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 4575657222473777152, implicit $exec
270+
%2:vgpr_32 = COPY %1.sub1
271+
%3:vgpr_32 = nofpexcept V_ADD_F32_e64 0, %0, 1, %2, 0, 0, implicit $mode, implicit $exec
272+
$vgpr0 = COPY %3
273+
S_ENDPGM 0
274+
275+
...
276+
277+
---
278+
name: v_mov_b64_pseudo_imm_fp64_1_copy_extract_sub0_to_f32_use
279+
tracksRegLiveness: true
280+
body: |
281+
bb.0:
282+
liveins: $vgpr0
283+
; GCN-LABEL: name: v_mov_b64_pseudo_imm_fp64_1_copy_extract_sub0_to_f32_use
284+
; GCN: liveins: $vgpr0
285+
; GCN-NEXT: {{ $}}
286+
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
287+
; GCN-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 1, 0, 0, 0, implicit $mode, implicit $exec
288+
; GCN-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]]
289+
; GCN-NEXT: S_ENDPGM 0
290+
%0:vgpr_32 = COPY $vgpr0
291+
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 4607182418800017408, implicit $exec
292+
%2:vgpr_32 = COPY %1.sub0
293+
%3:vgpr_32 = nofpexcept V_ADD_F32_e64 0, %0, 1, %2, 0, 0, implicit $mode, implicit $exec
294+
$vgpr0 = COPY %3
295+
S_ENDPGM 0
296+
297+
...
298+
299+
---
300+
name: v_mov_b64_pseudo_imm_fp64_1_copy_extract_sub1_to_f32_use
301+
tracksRegLiveness: true
302+
body: |
303+
bb.0:
304+
liveins: $vgpr0
305+
; GCN-LABEL: name: v_mov_b64_pseudo_imm_fp64_1_copy_extract_sub1_to_f32_use
306+
; GCN: liveins: $vgpr0
307+
; GCN-NEXT: {{ $}}
308+
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
309+
; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1072693248, implicit $exec
310+
; GCN-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 1, [[V_MOV_B32_e32_]], 0, 0, implicit $mode, implicit $exec
311+
; GCN-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]]
312+
; GCN-NEXT: S_ENDPGM 0
313+
%0:vgpr_32 = COPY $vgpr0
314+
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 4607182418800017408, implicit $exec
315+
%2:vgpr_32 = COPY %1.sub1
316+
%3:vgpr_32 = nofpexcept V_ADD_F32_e64 0, %0, 1, %2, 0, 0, implicit $mode, implicit $exec
317+
$vgpr0 = COPY %3
318+
S_ENDPGM 0
319+
320+
...

0 commit comments

Comments
 (0)