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[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
Similar to 806761a -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple (e.g. Windows, macOS). Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as these MIR tests do not utilize object file format specific detail, but it's good to change these tests to neighbor files that use -mtriple=x86_64
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llvm/test/CodeGen/MIR/X86/basic-block-liveins.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses basic block liveins correctly.
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llvm/test/CodeGen/MIR/X86/basic-block-not-at-start-of-line-error.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/block-address-operands.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses the block address operands
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# correctly.
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llvm/test/CodeGen/MIR/X86/callee-saved-info.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses callee saved information in the
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# stack objects correctly.
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llvm/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses the cfi offset operands
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# correctly.
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llvm/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses the cfi def_cfa_register
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# operands correctly.
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llvm/test/CodeGen/MIR/X86/cfi-offset.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses the cfi offset operands
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# correctly.
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llvm/test/CodeGen/MIR/X86/constant-pool-item-redefinition-error.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/constant-pool.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses constant pool constants and
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# constant pool operands correctly.
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llvm/test/CodeGen/MIR/X86/constant-value-error.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# This test ensures that the MIR parser reports an error when parsing an invalid
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# constant value.
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llvm/test/CodeGen/MIR/X86/copyIRflags.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses the fast math instruction flags.
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...

llvm/test/CodeGen/MIR/X86/dead-register-flag.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses the 'dead' register flags
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# correctly.
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llvm/test/CodeGen/MIR/X86/def-register-already-tied-error.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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--- |
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define i64 @test(i64 %x) #0 {
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entry:

llvm/test/CodeGen/MIR/X86/duplicate-memory-operand-flag.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/duplicate-register-flag-error.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses the 'early-clobber' register
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# flags correctly.
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llvm/test/CodeGen/MIR/X86/exception-function-state.mir

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# RUN: llc -simplify-mir=0 -march=x86-64 -run-pass=none -o - %s | FileCheck -check-prefixes=FULL,ALL %s
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# RUN: llc -simplify-mir=1 -march=x86-64 -run-pass=none -o - %s | FileCheck -check-prefixes=SIMPLE,ALL %s
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# RUN: llc -simplify-mir=0 -mtriple=x86_64 -run-pass=none -o - %s | FileCheck -check-prefixes=FULL,ALL %s
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# RUN: llc -simplify-mir=1 -mtriple=x86_64 -run-pass=none -o - %s | FileCheck -check-prefixes=SIMPLE,ALL %s
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# This test ensures that the MIR parser parses callee saved information in the
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# stack objects correctly.

llvm/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-basic-block-at-start-of-body.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-block-reference-in-blockaddress.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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#
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llvm/test/CodeGen/MIR/X86/expected-comma-after-cfi-register.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-comma-after-memory-operand.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-function-reference-after-blockaddress.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-global-value-after-blockaddress.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-integer-after-offset-sign.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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--- |
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define i64 @test(i64 %x) #0 {
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entry:

llvm/test/CodeGen/MIR/X86/expected-integer-in-successor-weight.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-load-or-store-in-memory-operand.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-machine-operand.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-metadata-node-after-debug-location.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-metadata-node-after-exclaim.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-metadata-node-in-stack-object.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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--- |
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define i32 @test(i32 %x) {
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entry:

llvm/test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-named-register-in-callee-saved-register.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-named-register-in-functions-livein.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-named-register-livein.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-newline-at-end-of-list.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-number-after-bb.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-offset-after-cfi-operand.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-pointer-value-in-memory-operand.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-positive-alignment-after-align.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-power-of-2-after-align.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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---
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name: align_0

llvm/test/CodeGen/MIR/X86/expected-register-after-cfi-operand.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-register-after-flags.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# This test ensures that an error is reported when a register operand doesn't
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# follow register flags.
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llvm/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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llvm/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation2.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
22

33
--- |
44

llvm/test/CodeGen/MIR/X86/expected-stack-object-function-context.mir

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# RUN: not llc -march=x86-64 -run-pass=none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass=none -o /dev/null %s 2>&1 | FileCheck %s
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---
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name: test

llvm/test/CodeGen/MIR/X86/expected-stack-object.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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33

44
--- |

llvm/test/CodeGen/MIR/X86/expected-subregister-after-colon.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
22

33
--- |
44

llvm/test/CodeGen/MIR/X86/expected-target-flag-name.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
22

33
--- |
44

llvm/test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
22
--- |
33
define i64 @test(i64 %x) #0 {
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entry:

llvm/test/CodeGen/MIR/X86/expected-value-in-memory-operand.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
22

33
--- |
44

llvm/test/CodeGen/MIR/X86/expected-virtual-register-in-functions-livein.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
22

33
--- |
44

llvm/test/CodeGen/MIR/X86/external-symbol-operands.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses the external symbol machine
33
# operands correctly.
44

llvm/test/CodeGen/MIR/X86/fastmath.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
22
# This test ensures that the MIR parser parses the fast math instruction flags.
33

44
...

llvm/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
22
# This test ensures that the MIR parser parses the save and restore points in
33
# the machine frame info correctly.
44

llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
22
# This test ensures that the MIR parser parses the stack protector stack
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# object reference in the machine frame info correctly.
44

llvm/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
22
# This test ensures that the MIR parser parses the frame setup instruction flag.
33

44
--- |

llvm/test/CodeGen/MIR/X86/function-liveins.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
1+
# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
22
# This test ensures that the MIR parser parses machine function's liveins
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# correctly.
44

llvm/test/CodeGen/MIR/X86/generic-instr-type.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
1+
# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
22
# Test that the MIR parser parses types on generic instructions correctly.
33

44
--- |

llvm/test/CodeGen/MIR/X86/global-value-operands.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
1+
# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
22
# This test ensures that the MIR parser parses global value operands correctly.
33

44
--- |

llvm/test/CodeGen/MIR/X86/immediate-operands.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
1+
# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses immediate machine operands.
33

44
--- |

llvm/test/CodeGen/MIR/X86/implicit-register-flag.mir

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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
1+
# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses the 'implicit' and 'implicit-def'
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# register flags correctly.
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