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[SimplifyCFG] Pre-commit test for extending HoistThenElseCodeToIf.
Pre-commit test for D155711. Differential Revision: https://reviews.llvm.org/D156617
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4 files changed

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-12
lines changed

4 files changed

+528
-12
lines changed

‎llvm/test/Transforms/SimplifyCFG/HoistCode.ll

Lines changed: 68 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,39 @@ F: ; preds = %0
1717
ret void
1818
}
1919

20+
define void @foo_switch(i64 %C, ptr %P) {
21+
; CHECK-LABEL: @foo_switch(
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; CHECK-NEXT: switch i64 [[C:%.*]], label [[BB0:%.*]] [
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; CHECK-NEXT: i64 1, label [[BB1:%.*]]
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; CHECK-NEXT: i64 2, label [[BB2:%.*]]
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; CHECK-NEXT: ]
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; CHECK: common.ret:
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; CHECK-NEXT: ret void
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; CHECK: bb0:
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; CHECK-NEXT: store i32 7, ptr [[P:%.*]], align 4
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; CHECK-NEXT: br label [[COMMON_RET:%.*]]
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; CHECK: bb1:
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; CHECK-NEXT: store i32 7, ptr [[P]], align 4
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; CHECK-NEXT: br label [[COMMON_RET]]
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; CHECK: bb2:
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; CHECK-NEXT: store i32 7, ptr [[P]], align 4
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; CHECK-NEXT: br label [[COMMON_RET]]
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;
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switch i64 %C, label %bb0 [
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i64 1, label %bb1
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i64 2, label %bb2
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]
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bb0: ; preds = %0
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store i32 7, ptr %P
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ret void
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bb1: ; preds = %0
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store i32 7, ptr %P
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ret void
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bb2: ; preds = %0
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store i32 7, ptr %P
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ret void
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}
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2053
define float @PR39535min(float %x) {
2154
; CHECK-LABEL: @PR39535min(
2255
; CHECK-NEXT: entry:
@@ -38,3 +71,38 @@ cond.end:
3871
%cond = phi fast float [ 0.0, %cond.true ], [ %x, %cond.false ]
3972
ret float %cond
4073
}
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define float @PR39535min_switch(i64 %i, float %x) {
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; CHECK-LABEL: @PR39535min_switch(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: switch i64 [[I:%.*]], label [[END:%.*]] [
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; CHECK-NEXT: i64 1, label [[BB1:%.*]]
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; CHECK-NEXT: i64 2, label [[BB2:%.*]]
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; CHECK-NEXT: ]
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; CHECK: bb1:
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; CHECK-NEXT: br label [[END]]
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; CHECK: bb2:
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[COND:%.*]] = phi fast float [ [[X:%.*]], [[BB1]] ], [ [[X]], [[BB2]] ], [ 0.000000e+00, [[ENTRY:%.*]] ]
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; CHECK-NEXT: ret float [[COND]]
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;
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entry:
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switch i64 %i, label %bb0 [
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i64 1, label %bb1
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i64 2, label %bb2
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]
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bb0:
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br label %end
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bb1:
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br label %end
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bb2:
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br label %end
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end:
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%cond = phi fast float [ 0.0, %bb0 ], [ %x, %bb1 ], [ %x, %bb2 ]
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ret float %cond
108+
}

‎llvm/test/Transforms/SimplifyCFG/hoist-common-code-with-unreachable.ll

Lines changed: 99 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,99 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes='simplifycfg<hoist-common-insts;no-sink-common-insts>' -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
3+
4+
define i1 @common_instr_with_unreachable(i64 %a, i64 %b, i64 %c) {
5+
; CHECK-LABEL: @common_instr_with_unreachable(
6+
; CHECK-NEXT: start:
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; CHECK-NEXT: switch i64 [[A:%.*]], label [[UNREACHABLE:%.*]] [
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; CHECK-NEXT: i64 0, label [[BB0:%.*]]
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; CHECK-NEXT: i64 1, label [[BB1:%.*]]
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; CHECK-NEXT: i64 2, label [[BB2:%.*]]
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; CHECK-NEXT: ]
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; CHECK: unreachable:
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; CHECK-NEXT: unreachable
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; CHECK: bb0:
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; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[B:%.*]], [[C:%.*]]
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: bb1:
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[B]], [[C]]
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: bb2:
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[B]], [[C]]
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
24+
; CHECK-NEXT: [[RESULT:%.*]] = phi i1 [ [[TMP0]], [[BB0]] ], [ [[TMP1]], [[BB1]] ], [ [[TMP2]], [[BB2]] ]
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; CHECK-NEXT: ret i1 [[RESULT]]
26+
;
27+
start:
28+
switch i64 %a, label %unreachable [
29+
i64 0, label %bb0
30+
i64 1, label %bb1
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i64 2, label %bb2
32+
]
33+
34+
unreachable:
35+
unreachable
36+
37+
bb0: ; preds = %start
38+
%0 = icmp eq i64 %b, %c
39+
br label %exit
40+
41+
bb1: ; preds = %start
42+
%1 = icmp eq i64 %b, %c
43+
br label %exit
44+
45+
bb2: ; preds = %start
46+
%2 = icmp eq i64 %b, %c
47+
br label %exit
48+
49+
exit: ; preds = %bb2, %bb1, %bb0
50+
%result = phi i1 [ %0, %bb0 ], [ %1, %bb1 ], [ %2, %bb2 ]
51+
ret i1 %result
52+
}
53+
54+
define i1 @common_instr_with_unreachable_2(i64 %a, i64 %b, i64 %c) {
55+
; CHECK-LABEL: @common_instr_with_unreachable_2(
56+
; CHECK-NEXT: start:
57+
; CHECK-NEXT: switch i64 [[A:%.*]], label [[BB1:%.*]] [
58+
; CHECK-NEXT: i64 0, label [[BB0:%.*]]
59+
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
60+
; CHECK-NEXT: ]
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; CHECK: bb0:
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; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[B:%.*]], [[C:%.*]]
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: bb1:
65+
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[B]], [[C]]
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: bb2:
68+
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[B]], [[C]]
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
71+
; CHECK-NEXT: [[RESULT:%.*]] = phi i1 [ [[TMP0]], [[BB0]] ], [ [[TMP1]], [[BB1]] ], [ [[TMP2]], [[BB2]] ]
72+
; CHECK-NEXT: ret i1 [[RESULT]]
73+
;
74+
start:
75+
switch i64 %a, label %bb1 [
76+
i64 0, label %bb0
77+
i64 1, label %unreachable
78+
i64 2, label %bb2
79+
]
80+
81+
unreachable:
82+
unreachable
83+
84+
bb0: ; preds = %start
85+
%0 = icmp eq i64 %b, %c
86+
br label %exit
87+
88+
bb1: ; preds = %start
89+
%1 = icmp eq i64 %b, %c
90+
br label %exit
91+
92+
bb2: ; preds = %start
93+
%2 = icmp eq i64 %b, %c
94+
br label %exit
95+
96+
exit: ; preds = %bb2, %bb1, %bb0
97+
%result = phi i1 [ %0, %bb0 ], [ %1, %bb1 ], [ %2, %bb2 ]
98+
ret i1 %result
99+
}

‎llvm/test/Transforms/SimplifyCFG/hoist-common-code.ll

Lines changed: 130 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,3 +24,133 @@ F: ; preds = %0
2424
ret void
2525
}
2626

27+
define void @test_switch(i64 %i, ptr %Q) {
28+
; CHECK-LABEL: @test_switch(
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; CHECK-NEXT: switch i64 [[I:%.*]], label [[BB0:%.*]] [
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; CHECK-NEXT: i64 1, label [[BB1:%.*]]
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; CHECK-NEXT: i64 2, label [[BB2:%.*]]
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; CHECK-NEXT: ]
33+
; CHECK: common.ret:
34+
; CHECK-NEXT: ret void
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; CHECK: bb0:
36+
; CHECK-NEXT: store i32 1, ptr [[Q:%.*]], align 4
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; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[Q]], align 4
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; CHECK-NEXT: call void @bar(i32 [[A]])
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; CHECK-NEXT: br label [[COMMON_RET:%.*]]
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; CHECK: bb1:
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; CHECK-NEXT: store i32 1, ptr [[Q]], align 4
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; CHECK-NEXT: [[B:%.*]] = load i32, ptr [[Q]], align 4
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; CHECK-NEXT: call void @bar(i32 [[B]])
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; CHECK-NEXT: br label [[COMMON_RET]]
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; CHECK: bb2:
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; CHECK-NEXT: store i32 1, ptr [[Q]], align 4
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; CHECK-NEXT: [[C:%.*]] = load i32, ptr [[Q]], align 4
48+
; CHECK-NEXT: call void @bar(i32 [[C]])
49+
; CHECK-NEXT: br label [[COMMON_RET]]
50+
;
51+
switch i64 %i, label %bb0 [
52+
i64 1, label %bb1
53+
i64 2, label %bb2
54+
]
55+
bb0: ; preds = %0
56+
store i32 1, ptr %Q
57+
%A = load i32, ptr %Q ; <i32> [#uses=1]
58+
call void @bar( i32 %A )
59+
ret void
60+
bb1: ; preds = %0
61+
store i32 1, ptr %Q
62+
%B = load i32, ptr %Q ; <i32> [#uses=1]
63+
call void @bar( i32 %B )
64+
ret void
65+
bb2: ; preds = %0
66+
store i32 1, ptr %Q
67+
%C = load i32, ptr %Q ; <i32> [#uses=1]
68+
call void @bar( i32 %C )
69+
ret void
70+
}
71+
72+
define i1 @common_instr_on_switch(i64 %a, i64 %b, i64 %c) unnamed_addr {
73+
; CHECK-LABEL: @common_instr_on_switch(
74+
; CHECK-NEXT: start:
75+
; CHECK-NEXT: switch i64 [[A:%.*]], label [[BB0:%.*]] [
76+
; CHECK-NEXT: i64 1, label [[BB1:%.*]]
77+
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
78+
; CHECK-NEXT: ]
79+
; CHECK: bb0:
80+
; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[B:%.*]], [[C:%.*]]
81+
; CHECK-NEXT: br label [[EXIT:%.*]]
82+
; CHECK: bb1:
83+
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[B]], [[C]]
84+
; CHECK-NEXT: br label [[EXIT]]
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; CHECK: bb2:
86+
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[B]], [[C]]
87+
; CHECK-NEXT: br label [[EXIT]]
88+
; CHECK: exit:
89+
; CHECK-NEXT: [[RESULT:%.*]] = phi i1 [ [[TMP0]], [[BB0]] ], [ [[TMP1]], [[BB1]] ], [ [[TMP2]], [[BB2]] ]
90+
; CHECK-NEXT: ret i1 [[RESULT]]
91+
;
92+
start:
93+
switch i64 %a, label %bb0 [
94+
i64 1, label %bb1
95+
i64 2, label %bb2
96+
]
97+
98+
bb0: ; preds = %start
99+
%0 = icmp eq i64 %b, %c
100+
br label %exit
101+
102+
bb1: ; preds = %start
103+
%1 = icmp eq i64 %b, %c
104+
br label %exit
105+
106+
bb2: ; preds = %start
107+
%2 = icmp eq i64 %b, %c
108+
br label %exit
109+
110+
exit: ; preds = %bb2, %bb1, %bb0
111+
%result = phi i1 [ %0, %bb0 ], [ %1, %bb1 ], [ %2, %bb2 ]
112+
ret i1 %result
113+
}
114+
115+
define i1 @partial_common_instr_on_switch(i64 %a, i64 %b, i64 %c) unnamed_addr {
116+
; CHECK-LABEL: @partial_common_instr_on_switch(
117+
; CHECK-NEXT: start:
118+
; CHECK-NEXT: switch i64 [[A:%.*]], label [[BB0:%.*]] [
119+
; CHECK-NEXT: i64 1, label [[BB1:%.*]]
120+
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
121+
; CHECK-NEXT: ]
122+
; CHECK: bb0:
123+
; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[B:%.*]], [[C:%.*]]
124+
; CHECK-NEXT: br label [[EXIT:%.*]]
125+
; CHECK: bb1:
126+
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[B]], [[C]]
127+
; CHECK-NEXT: br label [[EXIT]]
128+
; CHECK: bb2:
129+
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[B]], [[C]]
130+
; CHECK-NEXT: br label [[EXIT]]
131+
; CHECK: exit:
132+
; CHECK-NEXT: [[RESULT:%.*]] = phi i1 [ [[TMP0]], [[BB0]] ], [ [[TMP1]], [[BB1]] ], [ [[TMP2]], [[BB2]] ]
133+
; CHECK-NEXT: ret i1 [[RESULT]]
134+
;
135+
start:
136+
switch i64 %a, label %bb0 [
137+
i64 1, label %bb1
138+
i64 2, label %bb2
139+
]
140+
141+
bb0: ; preds = %start
142+
%0 = icmp eq i64 %b, %c
143+
br label %exit
144+
145+
bb1: ; preds = %start
146+
%1 = icmp ne i64 %b, %c
147+
br label %exit
148+
149+
bb2: ; preds = %start
150+
%2 = icmp eq i64 %b, %c
151+
br label %exit
152+
153+
exit: ; preds = %bb2, %bb1, %bb0
154+
%result = phi i1 [ %0, %bb0 ], [ %1, %bb1 ], [ %2, %bb2 ]
155+
ret i1 %result
156+
}

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