[x86] add tests for select with -1 operand; NFC

Author: rotateright

llvm/test/CodeGen/X86/select.ll

@@ -868,6 +868,170 @@ define i64 @test11a(i64 %x, i64 %y) nounwind readnone ssp noredzone {
   ret i64 %cond
 }
 
+define i32 @eqzero_const_or_all_ones(i32 %x) {
+; CHECK-LABEL: eqzero_const_or_all_ones:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpl $1, %edi
+; CHECK-NEXT:    sbbl %eax, %eax
+; CHECK-NEXT:    notl %eax
+; CHECK-NEXT:    orl $42, %eax
+; CHECK-NEXT:    retq
+;
+; ATHLON-LABEL: eqzero_const_or_all_ones:
+; ATHLON:       ## %bb.0:
+; ATHLON-NEXT:    xorl %eax, %eax
+; ATHLON-NEXT:    cmpl $1, {{[0-9]+}}(%esp)
+; ATHLON-NEXT:    sbbl %eax, %eax
+; ATHLON-NEXT:    notl %eax
+; ATHLON-NEXT:    orl $42, %eax
+; ATHLON-NEXT:    retl
+;
+; MCU-LABEL: eqzero_const_or_all_ones:
+; MCU:       # %bb.0:
+; MCU-NEXT:    xorl %ecx, %ecx
+; MCU-NEXT:    cmpl $1, %eax
+; MCU-NEXT:    sbbl %ecx, %ecx
+; MCU-NEXT:    notl %ecx
+; MCU-NEXT:    orl $42, %ecx
+; MCU-NEXT:    movl %ecx, %eax
+; MCU-NEXT:    retl
+  %z = icmp eq i32 %x, 0
+  %r = select i1 %z, i32 42, i32 -1
+  ret i32 %r
+}
+
+define i32 @nezero_const_or_all_ones(i32 %x) {
+; CHECK-LABEL: nezero_const_or_all_ones:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpl $1, %edi
+; CHECK-NEXT:    sbbl %eax, %eax
+; CHECK-NEXT:    orl $42, %eax
+; CHECK-NEXT:    retq
+;
+; ATHLON-LABEL: nezero_const_or_all_ones:
+; ATHLON:       ## %bb.0:
+; ATHLON-NEXT:    xorl %eax, %eax
+; ATHLON-NEXT:    cmpl $1, {{[0-9]+}}(%esp)
+; ATHLON-NEXT:    sbbl %eax, %eax
+; ATHLON-NEXT:    orl $42, %eax
+; ATHLON-NEXT:    retl
+;
+; MCU-LABEL: nezero_const_or_all_ones:
+; MCU:       # %bb.0:
+; MCU-NEXT:    xorl %ecx, %ecx
+; MCU-NEXT:    cmpl $1, %eax
+; MCU-NEXT:    sbbl %ecx, %ecx
+; MCU-NEXT:    orl $42, %ecx
+; MCU-NEXT:    movl %ecx, %eax
+; MCU-NEXT:    retl
+  %z = icmp ne i32 %x, 0
+  %r = select i1 %z, i32 42, i32 -1
+  ret i32 %r
+}
+
+define i64 @eqzero_all_ones_or_const(i64 %x) {
+; CHECK-LABEL: eqzero_all_ones_or_const:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq $1, %rdi
+; CHECK-NEXT:    sbbq %rax, %rax
+; CHECK-NEXT:    orq $42, %rax
+; CHECK-NEXT:    retq
+;
+; ATHLON-LABEL: eqzero_all_ones_or_const:
+; ATHLON:       ## %bb.0:
+; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; ATHLON-NEXT:    xorl %edx, %edx
+; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
+; ATHLON-NEXT:    movl $-1, %ecx
+; ATHLON-NEXT:    movl $42, %eax
+; ATHLON-NEXT:    cmovel %ecx, %eax
+; ATHLON-NEXT:    cmovel %ecx, %edx
+; ATHLON-NEXT:    retl
+;
+; MCU-LABEL: eqzero_all_ones_or_const:
+; MCU:       # %bb.0:
+; MCU-NEXT:    orl %edx, %eax
+; MCU-NEXT:    movl $-1, %eax
+; MCU-NEXT:    movl $-1, %edx
+; MCU-NEXT:    je .LBB16_2
+; MCU-NEXT:  # %bb.1:
+; MCU-NEXT:    xorl %edx, %edx
+; MCU-NEXT:    movl $42, %eax
+; MCU-NEXT:  .LBB16_2:
+; MCU-NEXT:    retl
+  %z = icmp eq i64 %x, 0
+  %r = select i1 %z, i64 -1, i64 42
+  ret i64 %r
+}
+
+define i8 @nezero_all_ones_or_const(i8 %x) {
+; CHECK-LABEL: nezero_all_ones_or_const:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpb $1, %dil
+; CHECK-NEXT:    sbbl %eax, %eax
+; CHECK-NEXT:    notb %al
+; CHECK-NEXT:    orb $42, %al
+; CHECK-NEXT:    ## kill: def $al killed $al killed $eax
+; CHECK-NEXT:    retq
+;
+; ATHLON-LABEL: nezero_all_ones_or_const:
+; ATHLON:       ## %bb.0:
+; ATHLON-NEXT:    xorl %eax, %eax
+; ATHLON-NEXT:    cmpb $1, {{[0-9]+}}(%esp)
+; ATHLON-NEXT:    sbbl %eax, %eax
+; ATHLON-NEXT:    notb %al
+; ATHLON-NEXT:    orb $42, %al
+; ATHLON-NEXT:    ## kill: def $al killed $al killed $eax
+; ATHLON-NEXT:    retl
+;
+; MCU-LABEL: nezero_all_ones_or_const:
+; MCU:       # %bb.0:
+; MCU-NEXT:    movl %eax, %ecx
+; MCU-NEXT:    xorl %eax, %eax
+; MCU-NEXT:    cmpb $1, %cl
+; MCU-NEXT:    sbbl %eax, %eax
+; MCU-NEXT:    notb %al
+; MCU-NEXT:    orb $42, %al
+; MCU-NEXT:    # kill: def $al killed $al killed $eax
+; MCU-NEXT:    retl
+  %z = icmp ne i8 %x, 0
+  %r = select i1 %z, i8 -1, i8 42
+  ret i8 %r
+}
+
+define i32 @PR53006(i32 %x) {
+; CHECK-LABEL: PR53006:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    testl %edi, %edi
+; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    leal -1(%rax,%rax), %eax
+; CHECK-NEXT:    retq
+;
+; ATHLON-LABEL: PR53006:
+; ATHLON:       ## %bb.0:
+; ATHLON-NEXT:    xorl %eax, %eax
+; ATHLON-NEXT:    cmpl $0, {{[0-9]+}}(%esp)
+; ATHLON-NEXT:    sete %al
+; ATHLON-NEXT:    leal -1(%eax,%eax), %eax
+; ATHLON-NEXT:    retl
+;
+; MCU-LABEL: PR53006:
+; MCU:       # %bb.0:
+; MCU-NEXT:    xorl %ecx, %ecx
+; MCU-NEXT:    testl %eax, %eax
+; MCU-NEXT:    sete %cl
+; MCU-NEXT:    leal -1(%ecx,%ecx), %eax
+; MCU-NEXT:    retl
+  %z = icmp eq i32 %x, 0
+  %r = select i1 %z, i32 1, i32 -1
+  ret i32 %r
+}
+
 define i32 @test13(i32 %a, i32 %b) nounwind {
 ; GENERIC-LABEL: test13:
 ; GENERIC:       ## %bb.0:
@@ -1087,10 +1251,10 @@ define i8 @test18(i32 %x, i8 zeroext %a, i8 zeroext %b) nounwind {
 ; MCU-LABEL: test18:
 ; MCU:       # %bb.0:
 ; MCU-NEXT:    cmpl $15, %eax
-; MCU-NEXT:    jl .LBB19_2
+; MCU-NEXT:    jl .LBB24_2
 ; MCU-NEXT:  # %bb.1:
 ; MCU-NEXT:    movl %ecx, %edx
-; MCU-NEXT:  .LBB19_2:
+; MCU-NEXT:  .LBB24_2:
 ; MCU-NEXT:    movl %edx, %eax
 ; MCU-NEXT:    retl
   %cmp = icmp slt i32 %x, 15
@@ -1180,16 +1344,16 @@ define void @clamp_i8(i32 %src, i8* %dst) {
 ; MCU:       # %bb.0:
 ; MCU-NEXT:    cmpl $127, %eax
 ; MCU-NEXT:    movl $127, %ecx
-; MCU-NEXT:    jg .LBB21_2
+; MCU-NEXT:    jg .LBB26_2
 ; MCU-NEXT:  # %bb.1:
 ; MCU-NEXT:    movl %eax, %ecx
-; MCU-NEXT:  .LBB21_2:
+; MCU-NEXT:  .LBB26_2:
 ; MCU-NEXT:    cmpl $-128, %ecx
 ; MCU-NEXT:    movb $-128, %al
-; MCU-NEXT:    jl .LBB21_4
+; MCU-NEXT:    jl .LBB26_4
 ; MCU-NEXT:  # %bb.3:
 ; MCU-NEXT:    movl %ecx, %eax
-; MCU-NEXT:  .LBB21_4:
+; MCU-NEXT:  .LBB26_4:
 ; MCU-NEXT:    movb %al, (%edx)
 ; MCU-NEXT:    retl
   %cmp = icmp sgt i32 %src, 127
@@ -1242,16 +1406,16 @@ define void @clamp(i32 %src, i16* %dst) {
 ; MCU:       # %bb.0:
 ; MCU-NEXT:    cmpl $32768, %eax # imm = 0x8000
 ; MCU-NEXT:    movl $32767, %ecx # imm = 0x7FFF
-; MCU-NEXT:    jge .LBB22_2
+; MCU-NEXT:    jge .LBB27_2
 ; MCU-NEXT:  # %bb.1:
 ; MCU-NEXT:    movl %eax, %ecx
-; MCU-NEXT:  .LBB22_2:
+; MCU-NEXT:  .LBB27_2:
 ; MCU-NEXT:    cmpl $-32768, %ecx # imm = 0x8000
 ; MCU-NEXT:    movl $32768, %eax # imm = 0x8000
-; MCU-NEXT:    jl .LBB22_4
+; MCU-NEXT:    jl .LBB27_4
 ; MCU-NEXT:  # %bb.3:
 ; MCU-NEXT:    movl %ecx, %eax
-; MCU-NEXT:  .LBB22_4:
+; MCU-NEXT:  .LBB27_4:
 ; MCU-NEXT:    movw %ax, (%edx)
 ; MCU-NEXT:    retl
   %cmp = icmp sgt i32 %src, 32767
@@ -1324,10 +1488,10 @@ define i16 @select_xor_1b(i16 %A, i8 %cond) {
 ; MCU-LABEL: select_xor_1b:
 ; MCU:       # %bb.0: # %entry
 ; MCU-NEXT:    testb $1, %dl
-; MCU-NEXT:    je .LBB24_2
+; MCU-NEXT:    je .LBB29_2
 ; MCU-NEXT:  # %bb.1:
 ; MCU-NEXT:    xorl $43, %eax
-; MCU-NEXT:  .LBB24_2: # %entry
+; MCU-NEXT:  .LBB29_2: # %entry
 ; MCU-NEXT:    # kill: def $ax killed $ax killed $eax
 ; MCU-NEXT:    retl
 entry:
@@ -1394,10 +1558,10 @@ define i32 @select_xor_2b(i32 %A, i32 %B, i8 %cond) {
 ; MCU-LABEL: select_xor_2b:
 ; MCU:       # %bb.0: # %entry
 ; MCU-NEXT:    testb $1, %cl
-; MCU-NEXT:    je .LBB26_2
+; MCU-NEXT:    je .LBB31_2
 ; MCU-NEXT:  # %bb.1:
 ; MCU-NEXT:    xorl %edx, %eax
-; MCU-NEXT:  .LBB26_2: # %entry
+; MCU-NEXT:  .LBB31_2: # %entry
 ; MCU-NEXT:    retl
 entry:
  %and = and i8 %cond, 1
@@ -1463,10 +1627,10 @@ define i32 @select_or_b(i32 %A, i32 %B, i8 %cond) {
 ; MCU-LABEL: select_or_b:
 ; MCU:       # %bb.0: # %entry
 ; MCU-NEXT:    testb $1, %cl
-; MCU-NEXT:    je .LBB28_2
+; MCU-NEXT:    je .LBB33_2
 ; MCU-NEXT:  # %bb.1:
 ; MCU-NEXT:    orl %edx, %eax
-; MCU-NEXT:  .LBB28_2: # %entry
+; MCU-NEXT:  .LBB33_2: # %entry
 ; MCU-NEXT:    retl
 entry:
  %and = and i8 %cond, 1
@@ -1532,10 +1696,10 @@ define i32 @select_or_1b(i32 %A, i32 %B, i32 %cond) {
 ; MCU-LABEL: select_or_1b:
 ; MCU:       # %bb.0: # %entry
 ; MCU-NEXT:    testb $1, %cl
-; MCU-NEXT:    je .LBB30_2
+; MCU-NEXT:    je .LBB35_2
 ; MCU-NEXT:  # %bb.1:
 ; MCU-NEXT:    orl %edx, %eax
-; MCU-NEXT:  .LBB30_2: # %entry
+; MCU-NEXT:  .LBB35_2: # %entry
 ; MCU-NEXT:    retl
 entry:
  %and = and i32 %cond, 1
@@ -1571,11 +1735,11 @@ define i64 @PR51612(i64 %x, i64 %y) {
 ; MCU:       # %bb.0:
 ; MCU-NEXT:    addl $1, %eax
 ; MCU-NEXT:    adcl $0, %edx
-; MCU-NEXT:    jae .LBB31_2
+; MCU-NEXT:    jae .LBB36_2
 ; MCU-NEXT:  # %bb.1:
 ; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; MCU-NEXT:    incl %eax
-; MCU-NEXT:  .LBB31_2:
+; MCU-NEXT:  .LBB36_2:
 ; MCU-NEXT:    andl 10, %eax
 ; MCU-NEXT:    xorl %edx, %edx
 ; MCU-NEXT:    retl
@@ -1630,10 +1794,10 @@ define i8 @select_uaddo_common_op0(i8 %a, i8 %b, i8 %c, i1 %cond) {
 ; MCU-LABEL: select_uaddo_common_op0:
 ; MCU:       # %bb.0:
 ; MCU-NEXT:    testb $1, {{[0-9]+}}(%esp)
-; MCU-NEXT:    jne .LBB32_2
+; MCU-NEXT:    jne .LBB37_2
 ; MCU-NEXT:  # %bb.1:
 ; MCU-NEXT:    movl %ecx, %edx
-; MCU-NEXT:  .LBB32_2:
+; MCU-NEXT:  .LBB37_2:
 ; MCU-NEXT:    addb %dl, %al
 ; MCU-NEXT:    # kill: def $al killed $al killed $eax
 ; MCU-NEXT:    retl
@@ -1679,10 +1843,10 @@ define i32 @select_uaddo_common_op1(i32 %a, i32 %b, i32 %c, i1 %cond) {
 ; MCU-LABEL: select_uaddo_common_op1:
 ; MCU:       # %bb.0:
 ; MCU-NEXT:    testb $1, {{[0-9]+}}(%esp)
-; MCU-NEXT:    jne .LBB33_2
+; MCU-NEXT:    jne .LBB38_2
 ; MCU-NEXT:  # %bb.1:
 ; MCU-NEXT:    movl %ecx, %eax
-; MCU-NEXT:  .LBB33_2:
+; MCU-NEXT:  .LBB38_2:
 ; MCU-NEXT:    addl %edx, %eax
 ; MCU-NEXT:    retl
   %ab = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)