Skip to content

Commit 4238324

Browse files
[asan][windows] Weak function interception support in instruction size decoder. (#86570)
This makes it so we'll be able to decode the instructions used in the weak function stubs from #81677. This code doesn't technically require those changes. Co-authored-by: Amy Wishnousky <[email protected]>
1 parent 706c130 commit 4238324

File tree

1 file changed

+10
-1
lines changed

1 file changed

+10
-1
lines changed

compiler-rt/lib/interception/interception_win.cpp

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -479,6 +479,8 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
479479

480480
switch (*(u8*)address) {
481481
case 0x90: // 90 : nop
482+
case 0xC3: // C3 : ret (for small/empty function interception
483+
case 0xCC: // CC : int 3 i.e. registering weak functions)
482484
return 1;
483485

484486
case 0x50: // push eax / rax
@@ -502,7 +504,6 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
502504
// Cannot overwrite control-instruction. Return 0 to indicate failure.
503505
case 0xE9: // E9 XX XX XX XX : jmp <label>
504506
case 0xE8: // E8 XX XX XX XX : call <func>
505-
case 0xC3: // C3 : ret
506507
case 0xEB: // EB XX : jmp XX (short jump)
507508
case 0x70: // 7Y YY : jy XX (short conditional jump)
508509
case 0x71:
@@ -545,6 +546,11 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
545546
return 7;
546547
}
547548

549+
switch (0x000000FF & *(u32 *)address) {
550+
case 0xc2: // C2 XX XX : ret XX (needed for registering weak functions)
551+
return 3;
552+
}
553+
548554
# if SANITIZER_WINDOWS_x64
549555
switch (*(u8*)address) {
550556
case 0xA1: // A1 XX XX XX XX XX XX XX XX :
@@ -605,6 +611,7 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
605611
case 0xc18b4c: // 4C 8B C1 : mov r8, rcx
606612
case 0xd2b60f: // 0f b6 d2 : movzx edx, dl
607613
case 0xca2b48: // 48 2b ca : sub rcx, rdx
614+
case 0xca3b48: // 48 3b ca : cmp rcx, rdx
608615
case 0x10b70f: // 0f b7 10 : movzx edx, WORD PTR [rax]
609616
case 0xc00b4d: // 3d 0b c0 : or r8, r8
610617
case 0xc08b41: // 41 8b c0 : mov eax, r8d
@@ -624,6 +631,8 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
624631

625632
case 0x058b48: // 48 8b 05 XX XX XX XX :
626633
// mov rax, QWORD PTR [rip + XXXXXXXX]
634+
case 0x058d48: // 48 8d 05 XX XX XX XX :
635+
// lea rax, QWORD PTR [rip + XXXXXXXX]
627636
case 0x25ff48: // 48 ff 25 XX XX XX XX :
628637
// rex.W jmp QWORD PTR [rip + XXXXXXXX]
629638
case 0x158D4C: // 4c 8d 15 XX XX XX XX : lea r10, [rip + XX]

0 commit comments

Comments
 (0)