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el-evel-ev
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Fix broken *cmp tests
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+69
-32
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2 files changed

+69
-32
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‎llvm/test/CodeGen/RISCV/xqccmp-additional-stack.ll

Lines changed: 34 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -1,26 +1,44 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
22
; RUN: llc -mtriple=riscv32 -mattr=+experimental-xqccmp,+e -target-abi ilp32e -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV32
33

4+
declare i32 @__mulsi3(i32, i32)
5+
46
define ptr @func(ptr %s, i32 %_c, ptr %incdec.ptr, i1 %0, i8 %conv14) #0 {
57
; RV32-LABEL: func:
68
; RV32: # %bb.0: # %entry
7-
; RV32-NEXT: li a5, 1
8-
; RV32-NEXT: andi t0, a3, 1
9+
; RV32-NEXT: qc.cm.push {ra, s0-s1}, -16
10+
; RV32-NEXT: .cfi_def_cfa_offset 16
11+
; RV32-NEXT: .cfi_offset ra, -4
12+
; RV32-NEXT: .cfi_offset s0, -8
13+
; RV32-NEXT: .cfi_offset s1, -12
14+
; RV32-NEXT: addi sp, sp, -8
15+
; RV32-NEXT: .cfi_def_cfa_offset 24
16+
; RV32-NEXT: sw a4, 4(sp) # 4-byte Folded Spill
17+
; RV32-NEXT: sw a2, 0(sp) # 4-byte Folded Spill
18+
; RV32-NEXT: mv a2, a1
19+
; RV32-NEXT: mv s1, a0
20+
; RV32-NEXT: li a0, 1
21+
; RV32-NEXT: andi a3, a3, 1
922
; RV32-NEXT: .LBB0_1: # %while.body
1023
; RV32-NEXT: # =>This Inner Loop Header: Depth=1
11-
; RV32-NEXT: mv a3, a5
12-
; RV32-NEXT: li a5, 0
13-
; RV32-NEXT: bnez t0, .LBB0_1
24+
; RV32-NEXT: mv s0, a0
25+
; RV32-NEXT: li a0, 0
26+
; RV32-NEXT: bnez a3, .LBB0_1
1427
; RV32-NEXT: # %bb.2: # %while.end
15-
; RV32-NEXT: slli a5, a1, 16
16-
; RV32-NEXT: andi a3, a3, 1
17-
; RV32-NEXT: add a1, a1, a5
18-
; RV32-NEXT: add a2, a2, a3
19-
; RV32-NEXT: slli a3, a1, 8
20-
; RV32-NEXT: add a1, a1, a3
21-
; RV32-NEXT: sw a1, 0(zero)
22-
; RV32-NEXT: sb a4, 0(a2)
23-
; RV32-NEXT: ret
28+
; RV32-NEXT: lui a0, 4112
29+
; RV32-NEXT: addi a1, a0, 257
30+
; RV32-NEXT: mv a0, a2
31+
; RV32-NEXT: call __mulsi3
32+
; RV32-NEXT: sw a0, 0(zero)
33+
; RV32-NEXT: andi s0, s0, 1
34+
; RV32-NEXT: lw a0, 0(sp) # 4-byte Folded Reload
35+
; RV32-NEXT: add s0, s0, a0
36+
; RV32-NEXT: lw a0, 4(sp) # 4-byte Folded Reload
37+
; RV32-NEXT: sb a0, 0(s0)
38+
; RV32-NEXT: mv a0, s1
39+
; RV32-NEXT: addi sp, sp, 8
40+
; RV32-NEXT: .cfi_def_cfa_offset 16
41+
; RV32-NEXT: qc.cm.popret {ra, s0-s1}, 16
2442
entry:
2543
br label %while.body
2644

@@ -29,8 +47,8 @@ while.body: ; preds = %while.body, %entry
2947
br i1 %0, label %while.body, label %while.end
3048

3149
while.end: ; preds = %while.body
32-
%or5 = mul i32 %_c, 16843009
33-
store i32 %or5, ptr null, align 4
50+
%mul_result = call i32 @__mulsi3(i32 %_c, i32 16843009)
51+
store i32 %mul_result, ptr null, align 4
3452
%1 = and i32 %n.addr.042, 1
3553
%scevgep = getelementptr i8, ptr %incdec.ptr, i32 %1
3654
store i8 %conv14, ptr %scevgep, align 1

‎llvm/test/CodeGen/RISCV/zcmp-additional-stack.ll

Lines changed: 35 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -1,25 +1,44 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
22
; RUN: llc -mtriple=riscv32 -mattr=+zcmp,+e -target-abi ilp32e -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV32
3+
4+
declare i32 @__mulsi3(i32, i32)
5+
36
define ptr @func(ptr %s, i32 %_c, ptr %incdec.ptr, i1 %0, i8 %conv14) #0 {
47
; RV32-LABEL: func:
58
; RV32: # %bb.0: # %entry
6-
; RV32-NEXT: li a5, 1
7-
; RV32-NEXT: andi t0, a3, 1
9+
; RV32-NEXT: cm.push {ra, s0-s1}, -16
10+
; RV32-NEXT: .cfi_def_cfa_offset 16
11+
; RV32-NEXT: .cfi_offset ra, -12
12+
; RV32-NEXT: .cfi_offset s0, -8
13+
; RV32-NEXT: .cfi_offset s1, -4
14+
; RV32-NEXT: addi sp, sp, -8
15+
; RV32-NEXT: .cfi_def_cfa_offset 24
16+
; RV32-NEXT: sw a4, 4(sp) # 4-byte Folded Spill
17+
; RV32-NEXT: sw a2, 0(sp) # 4-byte Folded Spill
18+
; RV32-NEXT: mv a2, a1
19+
; RV32-NEXT: mv s1, a0
20+
; RV32-NEXT: li a0, 1
21+
; RV32-NEXT: andi a3, a3, 1
822
; RV32-NEXT: .LBB0_1: # %while.body
923
; RV32-NEXT: # =>This Inner Loop Header: Depth=1
10-
; RV32-NEXT: mv a3, a5
11-
; RV32-NEXT: li a5, 0
12-
; RV32-NEXT: bnez t0, .LBB0_1
24+
; RV32-NEXT: mv s0, a0
25+
; RV32-NEXT: li a0, 0
26+
; RV32-NEXT: bnez a3, .LBB0_1
1327
; RV32-NEXT: # %bb.2: # %while.end
14-
; RV32-NEXT: slli a5, a1, 16
15-
; RV32-NEXT: andi a3, a3, 1
16-
; RV32-NEXT: add a1, a1, a5
17-
; RV32-NEXT: add a2, a2, a3
18-
; RV32-NEXT: slli a3, a1, 8
19-
; RV32-NEXT: add a1, a1, a3
20-
; RV32-NEXT: sw a1, 0(zero)
21-
; RV32-NEXT: sb a4, 0(a2)
22-
; RV32-NEXT: ret
28+
; RV32-NEXT: lui a0, 4112
29+
; RV32-NEXT: addi a1, a0, 257
30+
; RV32-NEXT: mv a0, a2
31+
; RV32-NEXT: call __mulsi3
32+
; RV32-NEXT: sw a0, 0(zero)
33+
; RV32-NEXT: andi s0, s0, 1
34+
; RV32-NEXT: lw a0, 0(sp) # 4-byte Folded Reload
35+
; RV32-NEXT: add s0, s0, a0
36+
; RV32-NEXT: lw a0, 4(sp) # 4-byte Folded Reload
37+
; RV32-NEXT: sb a0, 0(s0)
38+
; RV32-NEXT: mv a0, s1
39+
; RV32-NEXT: addi sp, sp, 8
40+
; RV32-NEXT: .cfi_def_cfa_offset 16
41+
; RV32-NEXT: cm.popret {ra, s0-s1}, 16
2342
entry:
2443
br label %while.body
2544

@@ -28,8 +47,8 @@ while.body: ; preds = %while.body, %entry
2847
br i1 %0, label %while.body, label %while.end
2948

3049
while.end: ; preds = %while.body
31-
%or5 = mul i32 %_c, 16843009
32-
store i32 %or5, ptr null, align 4
50+
%mul_result = call i32 @__mulsi3(i32 %_c, i32 16843009)
51+
store i32 %mul_result, ptr null, align 4
3352
%1 = and i32 %n.addr.042, 1
3453
%scevgep = getelementptr i8, ptr %incdec.ptr, i32 %1
3554
store i8 %conv14, ptr %scevgep, align 1

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