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VyacheslavLevytskyyVyacheslavLevytskyy
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[SPIR-V] Account for zext in a llvm intrinsic call (#88903)
This PR addresses an issue that may arise when an integer argument size differs from a machine word size for the target in a call to llvm intrinsic. The following example demonstrates the issue: ``` @__const.test.arr = private unnamed_addr addrspace(2) constant [3 x i32] [i32 1, i32 2, i32 3] define spir_func void @test() { entry: %arr = alloca [3 x i32], align 4 %dest = bitcast ptr %arr to ptr call void @llvm.memcpy.p0.p2.i32(ptr align 4 %dest, ptr addrspace(2) align 4 @__const.test.arr, i32 1024, i1 false) ret void } declare void @llvm.memcpy.p0.p2.i32(ptr nocapture writeonly, ptr addrspace(2) nocapture readonly, i32, i1) ``` Depending on the target this code may work or may fail without this PR due to the fact that IR Translation step introduces additional `zext` when type of the 3rd argument of `@llvm.memcpy.p0.p2.i32` differs from machine word. This PR addresses the issue by adding type deduction for a newly inserted G_ZEXT generic opcode.
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‎llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp

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Original file line numberDiff line numberDiff line change
@@ -171,6 +171,12 @@ static void insertBitcasts(MachineFunction &MF, SPIRVGlobalRegistry *GR,
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// %1 = G_GLOBAL_VALUE
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// %2 = COPY %1
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// %3 = G_ADDRSPACE_CAST %2
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//
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// or
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//
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// %1 = G_ZEXT %2
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// G_MEMCPY ... %2 ...
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//
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// New registers have no SPIRVType and no register class info.
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//
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// Set SPIRVType for GV, propagate it from GV to other instructions,
@@ -200,6 +206,24 @@ static SPIRVType *propagateSPIRVType(MachineInstr *MI, SPIRVGlobalRegistry *GR,
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SpirvTy = GR->getOrCreateSPIRVType(Ty, MIB);
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break;
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}
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case TargetOpcode::G_ZEXT: {
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if (MI->getOperand(1).isReg()) {
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if (MachineInstr *DefInstr =
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MRI.getVRegDef(MI->getOperand(1).getReg())) {
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if (SPIRVType *Def = propagateSPIRVType(DefInstr, GR, MRI, MIB)) {
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unsigned CurrentBW = GR->getScalarOrVectorBitWidth(Def);
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unsigned ExpectedBW =
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std::max(MRI.getType(Reg).getScalarSizeInBits(), CurrentBW);
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unsigned NumElements = GR->getScalarOrVectorComponentCount(Def);
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SpirvTy = GR->getOrCreateSPIRVIntegerType(ExpectedBW, MIB);
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if (NumElements > 1)
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SpirvTy =
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GR->getOrCreateSPIRVVectorType(SpirvTy, NumElements, MIB);
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}
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}
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}
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break;
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}
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case TargetOpcode::G_TRUNC:
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case TargetOpcode::G_ADDRSPACE_CAST:
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case TargetOpcode::G_PTR_ADD:
@@ -415,6 +439,7 @@ static void generateAssignInstrs(MachineFunction &MF, SPIRVGlobalRegistry *GR,
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}
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insertAssignInstr(Reg, Ty, nullptr, GR, MIB, MRI);
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} else if (MI.getOpcode() == TargetOpcode::G_TRUNC ||
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MI.getOpcode() == TargetOpcode::G_ZEXT ||
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MI.getOpcode() == TargetOpcode::G_GLOBAL_VALUE ||
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MI.getOpcode() == TargetOpcode::COPY ||
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MI.getOpcode() == TargetOpcode::G_ADDRSPACE_CAST) {

‎llvm/test/CodeGen/SPIRV/transcoding/memcpy-zext.ll

Lines changed: 43 additions & 0 deletions
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@@ -0,0 +1,43 @@
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; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-32
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-64
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; CHECK-64-DAG: %[[#i64:]] = OpTypeInt 64 0
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; CHECK-DAG: %[[#i8:]] = OpTypeInt 8 0
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; CHECK-DAG: %[[#i32:]] = OpTypeInt 32 0
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; CHECK-DAG: %[[#one:]] = OpConstant %[[#i32]] 1
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; CHECK-DAG: %[[#two:]] = OpConstant %[[#i32]] 2
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; CHECK-DAG: %[[#three:]] = OpConstant %[[#i32]] 3
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; CHECK-DAG: %[[#i32x3:]] = OpTypeArray %[[#i32]] %[[#three]]
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; CHECK-DAG: %[[#test_arr_init:]] = OpConstantComposite %[[#i32x3]] %[[#one]] %[[#two]] %[[#three]]
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; CHECK-DAG: %[[#szconst1024:]] = OpConstant %[[#i32]] 1024
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; CHECK-DAG: %[[#szconst42:]] = OpConstant %[[#i8]] 42
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; CHECK-DAG: %[[#const_i32x3_ptr:]] = OpTypePointer UniformConstant %[[#i32x3]]
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; CHECK-DAG: %[[#test_arr:]] = OpVariable %[[#const_i32x3_ptr]] UniformConstant %[[#test_arr_init]]
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; CHECK-DAG: %[[#i32x3_ptr:]] = OpTypePointer Function %[[#i32x3]]
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; CHECK: %[[#arr:]] = OpVariable %[[#i32x3_ptr]] Function
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; CHECK-32: OpCopyMemorySized %[[#arr]] %[[#test_arr]] %[[#szconst1024]]
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; CHECK-64: %[[#szconstext1024:]] = OpUConvert %[[#i64:]] %[[#szconst1024:]]
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; CHECK-64: OpCopyMemorySized %[[#arr]] %[[#test_arr]] %[[#szconstext1024]]
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; CHECK-32: %[[#szconstext42:]] = OpUConvert %[[#i32:]] %[[#szconst42:]]
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; CHECK-32: OpCopyMemorySized %[[#arr]] %[[#test_arr]] %[[#szconstext42]]
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; CHECK-64: %[[#szconstext42:]] = OpUConvert %[[#i64:]] %[[#szconst42:]]
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; CHECK-64: OpCopyMemorySized %[[#arr]] %[[#test_arr]] %[[#szconstext42]]
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@__const.test.arr = private unnamed_addr addrspace(2) constant [3 x i32] [i32 1, i32 2, i32 3]
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define spir_func void @test() {
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entry:
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%arr = alloca [3 x i32], align 4
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%dest = bitcast ptr %arr to ptr
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call void @llvm.memcpy.p0.p2.i32(ptr align 4 %dest, ptr addrspace(2) align 4 @__const.test.arr, i32 1024, i1 false)
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call void @llvm.memcpy.p0.p2.i8(ptr align 4 %dest, ptr addrspace(2) align 4 @__const.test.arr, i8 42, i1 false)
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ret void
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}
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declare void @llvm.memcpy.p0.p2.i32(ptr nocapture writeonly, ptr addrspace(2) nocapture readonly, i32, i1)
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declare void @llvm.memcpy.p0.p2.i8(ptr nocapture writeonly, ptr addrspace(2) nocapture readonly, i8, i1)

‎llvm/test/CodeGen/SPIRV/transcoding/spirv-private-array-initialization.ll

Lines changed: 31 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1,23 +1,34 @@
1-
; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
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;
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; CHECK-SPIRV-DAG: %[[#i32:]] = OpTypeInt 32 0
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; CHECK-SPIRV-DAG: %[[#one:]] = OpConstant %[[#i32]] 1
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; CHECK-SPIRV-DAG: %[[#two:]] = OpConstant %[[#i32]] 2
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; CHECK-SPIRV-DAG: %[[#three:]] = OpConstant %[[#i32]] 3
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; CHECK-SPIRV-DAG: %[[#i32x3:]] = OpTypeArray %[[#i32]] %[[#three]]
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; CHECK-SPIRV-DAG: %[[#test_arr_init:]] = OpConstantComposite %[[#i32x3]] %[[#one]] %[[#two]] %[[#three]]
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; CHECK-SPIRV-DAG: %[[#twelve:]] = OpConstant %[[#i32]] 12
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; CHECK-SPIRV-DAG: %[[#const_i32x3_ptr:]] = OpTypePointer UniformConstant %[[#i32x3]]
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; CHECK-SPIRV: %[[#test_arr2:]] = OpVariable %[[#const_i32x3_ptr]] UniformConstant %[[#test_arr_init]]
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; CHECK-SPIRV: %[[#test_arr:]] = OpVariable %[[#const_i32x3_ptr]] UniformConstant %[[#test_arr_init]]
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; CHECK-SPIRV-DAG: %[[#i32x3_ptr:]] = OpTypePointer Function %[[#i32x3]]
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; CHECK-SPIRV: %[[#arr:]] = OpVariable %[[#i32x3_ptr]] Function
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; CHECK-SPIRV: %[[#arr2:]] = OpVariable %[[#i32x3_ptr]] Function
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; CHECK-SPIRV: OpCopyMemorySized %[[#arr]] %[[#test_arr]] %[[#twelve]] Aligned 4
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; CHECK-SPIRV: OpCopyMemorySized %[[#arr2]] %[[#test_arr2]] %[[#twelve]] Aligned 4
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; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s --check-prefixes=CHECK-SPIRV,CHECK-SPIRV-32
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefixes=CHECK-SPIRV,CHECK-SPIRV-64
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; CHECK-SPIRV-64-DAG: %[[#i64:]] = OpTypeInt 64 0
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; CHECK-SPIRV-DAG: %[[#i32:]] = OpTypeInt 32 0
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; CHECK-SPIRV-DAG: %[[#one:]] = OpConstant %[[#i32]] 1
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; CHECK-SPIRV-DAG: %[[#two:]] = OpConstant %[[#i32]] 2
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; CHECK-SPIRV-DAG: %[[#three:]] = OpConstant %[[#i32]] 3
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; CHECK-SPIRV-DAG: %[[#i32x3:]] = OpTypeArray %[[#i32]] %[[#three]]
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; CHECK-SPIRV-DAG: %[[#test_arr_init:]] = OpConstantComposite %[[#i32x3]] %[[#one]] %[[#two]] %[[#three]]
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; CHECK-SPIRV-DAG: %[[#twelve:]] = OpConstant %[[#i32]] 12
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; CHECK-SPIRV-DAG: %[[#const_i32x3_ptr:]] = OpTypePointer UniformConstant %[[#i32x3]]
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; CHECK-SPIRV: %[[#test_arr2:]] = OpVariable %[[#const_i32x3_ptr]] UniformConstant %[[#test_arr_init]]
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; CHECK-SPIRV: %[[#test_arr:]] = OpVariable %[[#const_i32x3_ptr]] UniformConstant %[[#test_arr_init]]
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; CHECK-SPIRV-DAG: %[[#i32x3_ptr:]] = OpTypePointer Function %[[#i32x3]]
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; CHECK-SPIRV: %[[#arr:]] = OpVariable %[[#i32x3_ptr]] Function
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; CHECK-SPIRV: %[[#arr2:]] = OpVariable %[[#i32x3_ptr]] Function
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; CHECK-SPIRV-32: OpCopyMemorySized %[[#arr]] %[[#test_arr]] %[[#twelve]] Aligned 4
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; CHECK-SPIRV-32: OpCopyMemorySized %[[#arr2]] %[[#test_arr2]] %[[#twelve]] Aligned 4
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; CHECK-SPIRV-64: %[[#twelvezext1:]] = OpUConvert %[[#i64:]] %[[#twelve:]]
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; CHECK-SPIRV-64: OpCopyMemorySized %[[#arr]] %[[#test_arr]] %[[#twelvezext1]] Aligned 4
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; CHECK-SPIRV-64: %[[#twelvezext2:]] = OpUConvert %[[#i64:]] %[[#twelve:]]
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; CHECK-SPIRV-64: OpCopyMemorySized %[[#arr2]] %[[#test_arr2]] %[[#twelvezext2]] Aligned 4
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@__const.test.arr = private unnamed_addr addrspace(2) constant [3 x i32] [i32 1, i32 2, i32 3], align 4

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