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lines changed Original file line number Diff line number Diff line change @@ -58,6 +58,7 @@ enum class LangAS : unsigned {
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// HLSL specific address spaces.
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hlsl_groupshared,
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+ hlsl_private,
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// Wasm specific address spaces.
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wasm_funcref,
Original file line number Diff line number Diff line change @@ -2553,6 +2553,8 @@ std::string Qualifiers::getAddrSpaceAsString(LangAS AS) {
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return " __funcref" ;
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case LangAS::hlsl_groupshared:
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return " groupshared" ;
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+ case LangAS::hlsl_private:
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+ return " hlsl_private" ;
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default :
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return std::to_string (toTargetAddressSpace (AS));
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}
Original file line number Diff line number Diff line change @@ -47,6 +47,7 @@ static const LangASMap FakeAddrSpaceMap = {
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11 , // ptr32_uptr
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12 , // ptr64
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13 , // hlsl_groupshared
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+ 14 , // hlsl_private
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20 , // wasm_funcref
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};
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Original file line number Diff line number Diff line change @@ -44,6 +44,7 @@ static const unsigned ARM64AddrSpaceMap[] = {
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static_cast <unsigned >(AArch64AddrSpace::ptr32_uptr),
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static_cast <unsigned >(AArch64AddrSpace::ptr64),
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0 , // hlsl_groupshared
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+ 0 , // hlsl_private
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// Wasm address space values for this target are dummy values,
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// as it is only enabled for Wasm targets.
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20 , // wasm_funcref
Original file line number Diff line number Diff line change @@ -59,6 +59,7 @@ const LangASMap AMDGPUTargetInfo::AMDGPUDefIsGenMap = {
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llvm::AMDGPUAS::FLAT_ADDRESS, // ptr32_uptr
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llvm::AMDGPUAS::FLAT_ADDRESS, // ptr64
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llvm::AMDGPUAS::FLAT_ADDRESS, // hlsl_groupshared
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+ llvm::AMDGPUAS::FLAT_ADDRESS, // hlsl_private
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};
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const LangASMap AMDGPUTargetInfo::AMDGPUDefIsPrivMap = {
@@ -83,6 +84,7 @@ const LangASMap AMDGPUTargetInfo::AMDGPUDefIsPrivMap = {
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llvm::AMDGPUAS::FLAT_ADDRESS, // ptr32_uptr
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llvm::AMDGPUAS::FLAT_ADDRESS, // ptr64
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llvm::AMDGPUAS::FLAT_ADDRESS, // hlsl_groupshared
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+ llvm::AMDGPUAS::FLAT_ADDRESS, // hlsl_private
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};
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} // namespace targets
Original file line number Diff line number Diff line change @@ -33,15 +33,16 @@ static const unsigned DirectXAddrSpaceMap[] = {
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0 , // cuda_constant
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0 , // cuda_shared
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// SYCL address space values for this map are dummy
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- 0 , // sycl_global
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- 0 , // sycl_global_device
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- 0 , // sycl_global_host
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- 0 , // sycl_local
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- 0 , // sycl_private
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- 0 , // ptr32_sptr
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- 0 , // ptr32_uptr
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- 0 , // ptr64
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- 3 , // hlsl_groupshared
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+ 0 , // sycl_global
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+ 0 , // sycl_global_device
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+ 0 , // sycl_global_host
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+ 0 , // sycl_local
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+ 0 , // sycl_private
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+ 0 , // ptr32_sptr
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+ 0 , // ptr32_uptr
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+ 0 , // ptr64
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+ 3 , // hlsl_groupshared
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+ 10 , // hlsl_private
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// Wasm address space values for this target are dummy values,
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// as it is only enabled for Wasm targets.
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20 , // wasm_funcref
Original file line number Diff line number Diff line change @@ -46,6 +46,7 @@ static const unsigned NVPTXAddrSpaceMap[] = {
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0 , // ptr32_uptr
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0 , // ptr64
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0 , // hlsl_groupshared
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+ 0 , // hlsl_private
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// Wasm address space values for this target are dummy values,
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// as it is only enabled for Wasm targets.
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20 , // wasm_funcref
Original file line number Diff line number Diff line change @@ -38,15 +38,16 @@ static const unsigned SPIRDefIsPrivMap[] = {
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0 , // cuda_constant
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0 , // cuda_shared
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// SYCL address space values for this map are dummy
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- 0 , // sycl_global
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- 0 , // sycl_global_device
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- 0 , // sycl_global_host
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- 0 , // sycl_local
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- 0 , // sycl_private
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- 0 , // ptr32_sptr
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- 0 , // ptr32_uptr
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- 0 , // ptr64
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- 0 , // hlsl_groupshared
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+ 0 , // sycl_global
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+ 0 , // sycl_global_device
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+ 0 , // sycl_global_host
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+ 0 , // sycl_local
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+ 0 , // sycl_private
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+ 0 , // ptr32_sptr
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+ 0 , // ptr32_uptr
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+ 0 , // ptr64
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+ 0 , // hlsl_groupshared
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+ 10 , // hlsl_private
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// Wasm address space values for this target are dummy values,
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// as it is only enabled for Wasm targets.
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20 , // wasm_funcref
@@ -69,17 +70,18 @@ static const unsigned SPIRDefIsGenMap[] = {
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// cuda_constant pointer can be casted to default/"flat" pointer, but in
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// SPIR-V casts between constant and generic pointers are not allowed. For
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// this reason cuda_constant is mapped to SPIR-V CrossWorkgroup.
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- 1 , // cuda_constant
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- 3 , // cuda_shared
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- 1 , // sycl_global
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- 5 , // sycl_global_device
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- 6 , // sycl_global_host
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- 3 , // sycl_local
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- 0 , // sycl_private
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- 0 , // ptr32_sptr
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- 0 , // ptr32_uptr
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- 0 , // ptr64
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- 0 , // hlsl_groupshared
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+ 1 , // cuda_constant
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+ 3 , // cuda_shared
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+ 1 , // sycl_global
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+ 5 , // sycl_global_device
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+ 6 , // sycl_global_host
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+ 3 , // sycl_local
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+ 0 , // sycl_private
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+ 0 , // ptr32_sptr
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+ 0 , // ptr32_uptr
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+ 0 , // ptr64
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+ 0 , // hlsl_groupshared
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+ 10 , // hlsl_private
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// Wasm address space values for this target are dummy values,
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// as it is only enabled for Wasm targets.
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20 , // wasm_funcref
Original file line number Diff line number Diff line change @@ -42,6 +42,7 @@ static const unsigned ZOSAddressMap[] = {
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1 , // ptr32_uptr
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0 , // ptr64
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0 , // hlsl_groupshared
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+ 0 , // hlsl_private
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0 // wasm_funcref
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};
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Original file line number Diff line number Diff line change @@ -51,6 +51,7 @@ static const unsigned TCEOpenCLAddrSpaceMap[] = {
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0 , // ptr32_uptr
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0 , // ptr64
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0 , // hlsl_groupshared
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+ 0 , // hlsl_private
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// Wasm address space values for this target are dummy values,
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// as it is only enabled for Wasm targets.
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20 , // wasm_funcref
Original file line number Diff line number Diff line change @@ -42,6 +42,7 @@ static const unsigned WebAssemblyAddrSpaceMap[] = {
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0 , // ptr32_uptr
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0 , // ptr64
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0 , // hlsl_groupshared
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+ 0 , // hlsl_private
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20 , // wasm_funcref
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};
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Original file line number Diff line number Diff line change @@ -46,6 +46,7 @@ static const unsigned X86AddrSpaceMap[] = {
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271 , // ptr32_uptr
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272 , // ptr64
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0 , // hlsl_groupshared
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+ 0 , // hlsl_private
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// Wasm address space values for this target are dummy values,
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// as it is only enabled for Wasm targets.
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20 , // wasm_funcref
Original file line number Diff line number Diff line change @@ -5362,6 +5362,23 @@ LangAS CodeGenModule::GetGlobalVarAddressSpace(const VarDecl *D) {
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if (OpenMPRuntime->hasAllocateAttributeForGlobalVar (D, AS))
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return AS;
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}
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+
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+ if (LangOpts.HLSL ) {
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+ if (D == nullptr )
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+ return LangAS::hlsl_private;
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+
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+ // Except resources (Uniform, UniformConstant) & instanglble (handles)
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+ if (D->getType ()->isHLSLResourceType () ||
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+ D->getType ()->isHLSLIntangibleType ())
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+ return D->getType ().getAddressSpace ();
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+
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+ if (D->getStorageClass () != SC_Static)
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+ return D->getType ().getAddressSpace ();
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+
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+ LangAS AS = D->getType ().getAddressSpace ();
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+ return AS == LangAS::Default ? LangAS::hlsl_private : AS;
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+ }
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+
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return getTargetCodeGenInfo ().getGlobalVarAddressSpace (*this , D);
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}
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Original file line number Diff line number Diff line change @@ -71,7 +71,7 @@ void main(unsigned GI : SV_GroupIndex) {
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// NOINLINE: define internal void @_GLOBAL__D_a() [[IntAttr:\#[0-9]+]]
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// NOINLINE-NEXT: entry:
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- // NOINLINE-NEXT: call void @_ZN4TailD1Ev(ptr @_ZZ3WagvE1T)
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+ // NOINLINE-NEXT: call void @_ZN4TailD1Ev(ptr addrspacecast (ptr addrspace(10) @_ZZ3WagvE1T to ptr) )
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// NOINLINE-NEXT: call void @_ZN6PupperD1Ev(ptr @GlobalPup)
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// NOINLINE-NEXT: ret void
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Original file line number Diff line number Diff line change
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+ // RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -std=hlsl202x -emit-llvm -o - -disable-llvm-passes %s | FileCheck %s --check-prefixes=CHECK
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+ // RUN: %clang_cc1 -triple spirv-pc-vulkan1.3-compute -std=hlsl202x -emit-llvm -o - -disable-llvm-passes %s | FileCheck %s --check-prefixes=CHECK
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+
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+ struct S {
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+ static int Value;
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+ };
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+
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+ int S::Value = 1 ;
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+ // CHECK: @_ZN1S5ValueE = global i32 1, align 4
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+
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+ [shader ("compute" )]
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+ [numthreads (1 ,1 ,1 )]
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+ void main () {
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+ S s;
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+ int value1, value2;
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+ // CHECK: %s = alloca %struct.S, align 1
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+ // CHECK: %value1 = alloca i32, align 4
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+ // CHECK: %value2 = alloca i32, align 4
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+
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+ // CHECK: [[tmp:%.*]] = load i32, ptr @_ZN1S5ValueE, align 4
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+ // CHECK: store i32 [[tmp]], ptr %value1, align 4
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+ value1 = S::Value;
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+
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+ // CHECK: [[tmp:%.*]] = load i32, ptr @_ZN1S5ValueE, align 4
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+ // CHECK: store i32 [[tmp]], ptr %value2, align 4
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+ value2 = s.Value;
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+ }
Original file line number Diff line number Diff line change 3
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// CHECK-DAG: @[[CB:.+]] = external constant { float }
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+ // CHECK-DAG:@_ZL1b = internal addrspace(10) global float 3.000000e+00, align 4
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+ static float b = 3 ;
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+
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cbuffer A {
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- float a;
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- // CHECK-DAG:@_ZL1b = internal global float 3.000000e+00, align 4
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- static float b = 3 ;
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+ float a;
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// CHECK:load float, ptr @[[CB]], align 4
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- // CHECK:load float, ptr @_ZL1b, align 4
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+ // CHECK:load float, ptr addrspacecast (ptr addrspace(10) @_ZL1b to ptr) , align 4
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float foo () { return a + b; }
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}
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Original file line number Diff line number Diff line change @@ -43,7 +43,7 @@ void neg() {
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template <long int I>
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void tooBig () {
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- __attribute__ ((address_space (I))) int *bounds; // expected-error {{address space is larger than the maximum supported (8388586 )}}
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+ __attribute__ ((address_space (I))) int *bounds; // expected-error {{address space is larger than the maximum supported (8388585 )}}
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}
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template <long int I>
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