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[TTI] NFC: Change getScalingFactorCost to return InstructionCost
This patch migrates the TTI cost interfaces to return an InstructionCost. See this patch for the introduction of the type: https://reviews.llvm.org/D91174 See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html Differential Revision: https://reviews.llvm.org/D100564
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12 files changed

+56
-47
lines changed

12 files changed

+56
-47
lines changed

llvm/include/llvm/Analysis/TargetTransformInfo.h

Lines changed: 12 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -682,9 +682,10 @@ class TargetTransformInfo {
682682
/// If the AM is supported, the return value must be >= 0.
683683
/// If the AM is not supported, it returns a negative value.
684684
/// TODO: Handle pre/postinc as well.
685-
int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
686-
bool HasBaseReg, int64_t Scale,
687-
unsigned AddrSpace = 0) const;
685+
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
686+
int64_t BaseOffset, bool HasBaseReg,
687+
int64_t Scale,
688+
unsigned AddrSpace = 0) const;
688689

689690
/// Return true if the loop strength reduce pass should make
690691
/// Instruction* based TTI queries to isLegalAddressingMode(). This is
@@ -1481,9 +1482,10 @@ class TargetTransformInfo::Concept {
14811482
virtual bool hasDivRemOp(Type *DataType, bool IsSigned) = 0;
14821483
virtual bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) = 0;
14831484
virtual bool prefersVectorizedAddressing() = 0;
1484-
virtual int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
1485-
int64_t BaseOffset, bool HasBaseReg,
1486-
int64_t Scale, unsigned AddrSpace) = 0;
1485+
virtual InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
1486+
int64_t BaseOffset,
1487+
bool HasBaseReg, int64_t Scale,
1488+
unsigned AddrSpace) = 0;
14871489
virtual bool LSRWithInstrQueries() = 0;
14881490
virtual bool isTruncateFree(Type *Ty1, Type *Ty2) = 0;
14891491
virtual bool isProfitableToHoist(Instruction *I) = 0;
@@ -1862,9 +1864,10 @@ class TargetTransformInfo::Model final : public TargetTransformInfo::Concept {
18621864
bool prefersVectorizedAddressing() override {
18631865
return Impl.prefersVectorizedAddressing();
18641866
}
1865-
int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
1866-
bool HasBaseReg, int64_t Scale,
1867-
unsigned AddrSpace) override {
1867+
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
1868+
int64_t BaseOffset, bool HasBaseReg,
1869+
int64_t Scale,
1870+
unsigned AddrSpace) override {
18681871
return Impl.getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg, Scale,
18691872
AddrSpace);
18701873
}

llvm/include/llvm/Analysis/TargetTransformInfoImpl.h

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -270,9 +270,10 @@ class TargetTransformInfoImplBase {
270270

271271
bool prefersVectorizedAddressing() const { return true; }
272272

273-
int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
274-
bool HasBaseReg, int64_t Scale,
275-
unsigned AddrSpace) const {
273+
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
274+
int64_t BaseOffset, bool HasBaseReg,
275+
int64_t Scale,
276+
unsigned AddrSpace) const {
276277
// Guess that all legal addressing mode are free.
277278
if (isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, Scale,
278279
AddrSpace))

llvm/include/llvm/CodeGen/BasicTTIImpl.h

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -281,8 +281,9 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
281281
return TargetTransformInfoImplBase::isProfitableLSRChainElement(I);
282282
}
283283

284-
int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
285-
bool HasBaseReg, int64_t Scale, unsigned AddrSpace) {
284+
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
285+
int64_t BaseOffset, bool HasBaseReg,
286+
int64_t Scale, unsigned AddrSpace) {
286287
TargetLoweringBase::AddrMode AM;
287288
AM.BaseGV = BaseGV;
288289
AM.BaseOffs = BaseOffset;

llvm/include/llvm/CodeGen/TargetLowering.h

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,7 @@
4949
#include "llvm/Support/AtomicOrdering.h"
5050
#include "llvm/Support/Casting.h"
5151
#include "llvm/Support/ErrorHandling.h"
52+
#include "llvm/Support/InstructionCost.h"
5253
#include "llvm/Support/MachineValueType.h"
5354
#include <algorithm>
5455
#include <cassert>
@@ -2347,8 +2348,9 @@ class TargetLoweringBase {
23472348
/// If the AM is not supported, it returns a negative value.
23482349
/// TODO: Handle pre/postinc as well.
23492350
/// TODO: Remove default argument
2350-
virtual int getScalingFactorCost(const DataLayout &DL, const AddrMode &AM,
2351-
Type *Ty, unsigned AS = 0) const {
2351+
virtual InstructionCost getScalingFactorCost(const DataLayout &DL,
2352+
const AddrMode &AM, Type *Ty,
2353+
unsigned AS = 0) const {
23522354
// Default: assume that any scaling factor used in a legal AM is free.
23532355
if (isLegalAddressingMode(DL, AM, Ty, AS))
23542356
return 0;

llvm/lib/Analysis/TargetTransformInfo.cpp

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -422,12 +422,11 @@ bool TargetTransformInfo::prefersVectorizedAddressing() const {
422422
return TTIImpl->prefersVectorizedAddressing();
423423
}
424424

425-
int TargetTransformInfo::getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
426-
int64_t BaseOffset,
427-
bool HasBaseReg, int64_t Scale,
428-
unsigned AddrSpace) const {
429-
int Cost = TTIImpl->getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg,
430-
Scale, AddrSpace);
425+
InstructionCost TargetTransformInfo::getScalingFactorCost(
426+
Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg,
427+
int64_t Scale, unsigned AddrSpace) const {
428+
InstructionCost Cost = TTIImpl->getScalingFactorCost(
429+
Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
431430
assert(Cost >= 0 && "TTI should not produce negative costs!");
432431
return Cost;
433432
}

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -11754,9 +11754,8 @@ bool AArch64TargetLowering::shouldConsiderGEPOffsetSplit() const {
1175411754
return true;
1175511755
}
1175611756

11757-
int AArch64TargetLowering::getScalingFactorCost(const DataLayout &DL,
11758-
const AddrMode &AM, Type *Ty,
11759-
unsigned AS) const {
11757+
InstructionCost AArch64TargetLowering::getScalingFactorCost(
11758+
const DataLayout &DL, const AddrMode &AM, Type *Ty, unsigned AS) const {
1176011759
// Scaling factors are not free at all.
1176111760
// Operands | Rt Latency
1176211761
// -------------------------------------------

llvm/lib/Target/AArch64/AArch64ISelLowering.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -611,8 +611,8 @@ class AArch64TargetLowering : public TargetLowering {
611611
/// of the specified type.
612612
/// If the AM is supported, the return value must be >= 0.
613613
/// If the AM is not supported, it returns a negative value.
614-
int getScalingFactorCost(const DataLayout &DL, const AddrMode &AM, Type *Ty,
615-
unsigned AS) const override;
614+
InstructionCost getScalingFactorCost(const DataLayout &DL, const AddrMode &AM,
615+
Type *Ty, unsigned AS) const override;
616616

617617
/// Return true if an FMA operation is faster than a pair of fmul and fadd
618618
/// instructions. fmuladd intrinsics will be expanded to FMAs when this method

llvm/lib/Target/ARM/ARMISelLowering.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -17177,9 +17177,10 @@ bool ARMTargetLowering::allowTruncateForTailCall(Type *Ty1, Type *Ty2) const {
1717717177
return true;
1717817178
}
1717917179

17180-
int ARMTargetLowering::getScalingFactorCost(const DataLayout &DL,
17181-
const AddrMode &AM, Type *Ty,
17182-
unsigned AS) const {
17180+
InstructionCost ARMTargetLowering::getScalingFactorCost(const DataLayout &DL,
17181+
const AddrMode &AM,
17182+
Type *Ty,
17183+
unsigned AS) const {
1718317184
if (isLegalAddressingMode(DL, AM, Ty, AS)) {
1718417185
if (Subtarget->hasFPAO())
1718517186
return AM.Scale < 0 ? 1 : 0; // positive offsets execute faster

llvm/lib/Target/ARM/ARMISelLowering.h

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -443,8 +443,9 @@ class VectorType;
443443
/// addressing mode represented by AM.
444444
/// If the AM is supported, the return value must be >= 0.
445445
/// If the AM is not supported, the return value must be negative.
446-
int getScalingFactorCost(const DataLayout &DL, const AddrMode &AM, Type *Ty,
447-
unsigned AS) const override;
446+
InstructionCost getScalingFactorCost(const DataLayout &DL,
447+
const AddrMode &AM, Type *Ty,
448+
unsigned AS) const override;
448449

449450
bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const;
450451

llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -51922,9 +51922,10 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
5192251922
return Res;
5192351923
}
5192451924

51925-
int X86TargetLowering::getScalingFactorCost(const DataLayout &DL,
51926-
const AddrMode &AM, Type *Ty,
51927-
unsigned AS) const {
51925+
InstructionCost X86TargetLowering::getScalingFactorCost(const DataLayout &DL,
51926+
const AddrMode &AM,
51927+
Type *Ty,
51928+
unsigned AS) const {
5192851929
// Scaling factors are not free at all.
5192951930
// An indexed folded instruction, i.e., inst (reg1, reg2, scale),
5193051931
// will take 2 allocations in the out of order engine instead of 1

llvm/lib/Target/X86/X86ISelLowering.h

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1162,8 +1162,9 @@ namespace llvm {
11621162
/// of the specified type.
11631163
/// If the AM is supported, the return value must be >= 0.
11641164
/// If the AM is not supported, it returns a negative value.
1165-
int getScalingFactorCost(const DataLayout &DL, const AddrMode &AM, Type *Ty,
1166-
unsigned AS) const override;
1165+
InstructionCost getScalingFactorCost(const DataLayout &DL,
1166+
const AddrMode &AM, Type *Ty,
1167+
unsigned AS) const override;
11671168

11681169
/// This is used to enable splatted operand transforms for vector shifts
11691170
/// and vector funnel shifts.

llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1009,9 +1009,9 @@ static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
10091009
const LSRUse &LU, const Formula &F);
10101010

10111011
// Get the cost of the scaling factor used in F for LU.
1012-
static unsigned getScalingFactorCost(const TargetTransformInfo &TTI,
1013-
const LSRUse &LU, const Formula &F,
1014-
const Loop &L);
1012+
static InstructionCost getScalingFactorCost(const TargetTransformInfo &TTI,
1013+
const LSRUse &LU, const Formula &F,
1014+
const Loop &L);
10151015

10161016
namespace {
10171017

@@ -1360,7 +1360,7 @@ void Cost::RateFormula(const Formula &F,
13601360
C.NumBaseAdds += (F.UnfoldedOffset != 0);
13611361

13621362
// Accumulate non-free scaling amounts.
1363-
C.ScaleCost += getScalingFactorCost(*TTI, LU, F, *L);
1363+
C.ScaleCost += *getScalingFactorCost(*TTI, LU, F, *L).getValue();
13641364

13651365
// Tally up the non-zero immediates.
13661366
for (const LSRFixup &Fixup : LU.Fixups) {
@@ -1757,9 +1757,9 @@ static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
17571757
F.Scale);
17581758
}
17591759

1760-
static unsigned getScalingFactorCost(const TargetTransformInfo &TTI,
1761-
const LSRUse &LU, const Formula &F,
1762-
const Loop &L) {
1760+
static InstructionCost getScalingFactorCost(const TargetTransformInfo &TTI,
1761+
const LSRUse &LU, const Formula &F,
1762+
const Loop &L) {
17631763
if (!F.Scale)
17641764
return 0;
17651765

@@ -1772,14 +1772,14 @@ static unsigned getScalingFactorCost(const TargetTransformInfo &TTI,
17721772
switch (LU.Kind) {
17731773
case LSRUse::Address: {
17741774
// Check the scaling factor cost with both the min and max offsets.
1775-
int ScaleCostMinOffset = TTI.getScalingFactorCost(
1775+
InstructionCost ScaleCostMinOffset = TTI.getScalingFactorCost(
17761776
LU.AccessTy.MemTy, F.BaseGV, F.BaseOffset + LU.MinOffset, F.HasBaseReg,
17771777
F.Scale, LU.AccessTy.AddrSpace);
1778-
int ScaleCostMaxOffset = TTI.getScalingFactorCost(
1778+
InstructionCost ScaleCostMaxOffset = TTI.getScalingFactorCost(
17791779
LU.AccessTy.MemTy, F.BaseGV, F.BaseOffset + LU.MaxOffset, F.HasBaseReg,
17801780
F.Scale, LU.AccessTy.AddrSpace);
17811781

1782-
assert(ScaleCostMinOffset >= 0 && ScaleCostMaxOffset >= 0 &&
1782+
assert(ScaleCostMinOffset.isValid() && ScaleCostMaxOffset.isValid() &&
17831783
"Legal addressing mode has an illegal cost!");
17841784
return std::max(ScaleCostMinOffset, ScaleCostMaxOffset);
17851785
}

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