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Justin Lebar
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[NVPTX] Auto-upgrade some NVPTX intrinsics to LLVM target-generic code.
Summary: Specifically, we upgrade llvm.nvvm.: * brev{32,64} * clz.{i,ll} * popc.{i,ll} * abs.{i,ll} * {min,max}.{i,ll,u,ull} * h2f These either map directly to an existing LLVM target-generic intrinsic or map to a simple LLVM target-generic idiom. In all cases, we check that the code we generate is lowered to PTX as we expect. These builtins don't need to be backfilled in clang: They're not accessible to user code from nvcc. Reviewers: tra Subscribers: majnemer, cfe-commits, llvm-commits, jholewinski Differential Revision: https://reviews.llvm.org/D28793 llvm-svn: 292694
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5 files changed

+209
-129
lines changed

5 files changed

+209
-129
lines changed

‎clang/include/clang/Basic/BuiltinsNVPTX.def

Lines changed: 0 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -64,24 +64,10 @@ BUILTIN(__nvvm_read_ptx_sreg_pm3, "i", "n")
6464

6565
// MISC
6666

67-
BUILTIN(__nvvm_clz_i, "ii", "")
68-
BUILTIN(__nvvm_clz_ll, "iLLi", "")
69-
BUILTIN(__nvvm_popc_i, "ii", "")
70-
BUILTIN(__nvvm_popc_ll, "iLLi", "")
7167
BUILTIN(__nvvm_prmt, "UiUiUiUi", "")
7268

7369
// Min Max
7470

75-
BUILTIN(__nvvm_min_i, "iii", "")
76-
BUILTIN(__nvvm_min_ui, "UiUiUi", "")
77-
BUILTIN(__nvvm_min_ll, "LLiLLiLLi", "")
78-
BUILTIN(__nvvm_min_ull, "ULLiULLiULLi", "")
79-
80-
BUILTIN(__nvvm_max_i, "iii", "")
81-
BUILTIN(__nvvm_max_ui, "UiUiUi", "")
82-
BUILTIN(__nvvm_max_ll, "LLiLLiLLi", "")
83-
BUILTIN(__nvvm_max_ull, "ULLiULLiULLi", "")
84-
8571
BUILTIN(__nvvm_fmax_ftz_f, "fff", "")
8672
BUILTIN(__nvvm_fmax_f, "fff", "")
8773
BUILTIN(__nvvm_fmin_ftz_f, "fff", "")
@@ -133,11 +119,6 @@ BUILTIN(__nvvm_div_rz_d, "ddd", "")
133119
BUILTIN(__nvvm_div_rm_d, "ddd", "")
134120
BUILTIN(__nvvm_div_rp_d, "ddd", "")
135121

136-
// Brev
137-
138-
BUILTIN(__nvvm_brev32, "UiUi", "")
139-
BUILTIN(__nvvm_brev64, "ULLiULLi", "")
140-
141122
// Sad
142123

143124
BUILTIN(__nvvm_sad_i, "iiii", "")
@@ -155,9 +136,6 @@ BUILTIN(__nvvm_ceil_d, "dd", "")
155136

156137
// Abs
157138

158-
BUILTIN(__nvvm_abs_i, "ii", "")
159-
BUILTIN(__nvvm_abs_ll, "LLiLLi", "")
160-
161139
BUILTIN(__nvvm_fabs_ftz_f, "ff", "")
162140
BUILTIN(__nvvm_fabs_f, "ff", "")
163141
BUILTIN(__nvvm_fabs_d, "dd", "")
@@ -385,8 +363,6 @@ BUILTIN(__nvvm_ull2d_rp, "dULLi", "")
385363
BUILTIN(__nvvm_f2h_rn_ftz, "Usf", "")
386364
BUILTIN(__nvvm_f2h_rn, "Usf", "")
387365

388-
BUILTIN(__nvvm_h2f, "fUs", "")
389-
390366
// Bitcast
391367

392368
BUILTIN(__nvvm_bitcast_f2i, "if", "")

‎llvm/include/llvm/IR/IntrinsicsNVVM.td

Lines changed: 21 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -11,23 +11,34 @@
1111
//
1212
//===----------------------------------------------------------------------===//
1313

14+
// The following intrinsics were once defined here, but are now auto-upgraded
15+
// to target-generic LLVM intrinsics.
16+
//
17+
// * llvm.nvvm.brev32 --> llvm.bitreverse.i32
18+
// * llvm.nvvm.brev64 --> llvm.bitreverse.i64
19+
// * llvm.nvvm.clz.i --> llvm.ctlz.i32
20+
// * llvm.nvvm.clz.ll --> trunc i64 llvm.ctlz.i64(x) to i32
21+
// * llvm.nvvm.popc.i --> llvm.ctpop.i32
22+
// * llvm.nvvm.popc.ll --> trunc i64 llvm.ctpop.i64 to i32
23+
// * llvm.nvvm.abs.i --> select(x >= -x, x, -x)
24+
// * llvm.nvvm.abs.ll --> ibid.
25+
// * llvm.nvvm.max.i --> select(x sge y, x, y)
26+
// * llvm.nvvm.max.ll --> ibid.
27+
// * llvm.nvvm.max.ui --> select(x uge y, x, y)
28+
// * llvm.nvvm.max.ull --> ibid.
29+
// * llvm.nvvm.max.i --> select(x sle y, x, y)
30+
// * llvm.nvvm.max.ll --> ibid.
31+
// * llvm.nvvm.max.ui --> select(x ule y, x, y)
32+
// * llvm.nvvm.max.ull --> ibid.
33+
// * llvm.nvvm.h2f --> llvm.convert.to.fp16.f32
34+
1435
def llvm_anyi64ptr_ty : LLVMAnyPointerType<llvm_i64_ty>; // (space)i64*
1536

1637
//
1738
// MISC
1839
//
1940

2041
let TargetPrefix = "nvvm" in {
21-
def int_nvvm_clz_i : GCCBuiltin<"__nvvm_clz_i">,
22-
Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
23-
def int_nvvm_clz_ll : GCCBuiltin<"__nvvm_clz_ll">,
24-
Intrinsic<[llvm_i32_ty], [llvm_i64_ty], [IntrNoMem]>;
25-
26-
def int_nvvm_popc_i : GCCBuiltin<"__nvvm_popc_i">,
27-
Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
28-
def int_nvvm_popc_ll : GCCBuiltin<"__nvvm_popc_ll">,
29-
Intrinsic<[llvm_i32_ty], [llvm_i64_ty], [IntrNoMem]>;
30-
3142
def int_nvvm_prmt : GCCBuiltin<"__nvvm_prmt">,
3243
Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
3344
[IntrNoMem, Commutative]>;
@@ -36,34 +47,6 @@ let TargetPrefix = "nvvm" in {
3647
// Min Max
3748
//
3849

39-
def int_nvvm_min_i : GCCBuiltin<"__nvvm_min_i">,
40-
Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
41-
[IntrNoMem, Commutative]>;
42-
def int_nvvm_min_ui : GCCBuiltin<"__nvvm_min_ui">,
43-
Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
44-
[IntrNoMem, Commutative]>;
45-
46-
def int_nvvm_min_ll : GCCBuiltin<"__nvvm_min_ll">,
47-
Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty],
48-
[IntrNoMem, Commutative]>;
49-
def int_nvvm_min_ull : GCCBuiltin<"__nvvm_min_ull">,
50-
Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty],
51-
[IntrNoMem, Commutative]>;
52-
53-
def int_nvvm_max_i : GCCBuiltin<"__nvvm_max_i">,
54-
Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
55-
[IntrNoMem, Commutative]>;
56-
def int_nvvm_max_ui : GCCBuiltin<"__nvvm_max_ui">,
57-
Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
58-
[IntrNoMem, Commutative]>;
59-
60-
def int_nvvm_max_ll : GCCBuiltin<"__nvvm_max_ll">,
61-
Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty],
62-
[IntrNoMem, Commutative]>;
63-
def int_nvvm_max_ull : GCCBuiltin<"__nvvm_max_ull">,
64-
Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty],
65-
[IntrNoMem, Commutative]>;
66-
6750
def int_nvvm_fmin_f : GCCBuiltin<"__nvvm_fmin_f">,
6851
Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty],
6952
[IntrNoMem, Commutative]>;
@@ -200,15 +183,6 @@ let TargetPrefix = "nvvm" in {
200183
Intrinsic<[llvm_double_ty], [llvm_double_ty, llvm_double_ty],
201184
[IntrNoMem, Commutative]>;
202185

203-
//
204-
// Brev
205-
//
206-
207-
def int_nvvm_brev32 : GCCBuiltin<"__nvvm_brev32">,
208-
Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
209-
def int_nvvm_brev64 : GCCBuiltin<"__nvvm_brev64">,
210-
Intrinsic<[llvm_i64_ty], [llvm_i64_ty], [IntrNoMem]>;
211-
212186
//
213187
// Sad
214188
//
@@ -242,16 +216,10 @@ let TargetPrefix = "nvvm" in {
242216
// Abs
243217
//
244218

245-
def int_nvvm_abs_i : GCCBuiltin<"__nvvm_abs_i">,
246-
Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
247-
def int_nvvm_abs_ll : GCCBuiltin<"__nvvm_abs_ll">,
248-
Intrinsic<[llvm_i64_ty], [llvm_i64_ty], [IntrNoMem]>;
249-
250219
def int_nvvm_fabs_ftz_f : GCCBuiltin<"__nvvm_fabs_ftz_f">,
251220
Intrinsic<[llvm_float_ty], [llvm_float_ty], [IntrNoMem]>;
252221
def int_nvvm_fabs_f : GCCBuiltin<"__nvvm_fabs_f">,
253222
Intrinsic<[llvm_float_ty], [llvm_float_ty], [IntrNoMem]>;
254-
255223
def int_nvvm_fabs_d : GCCBuiltin<"__nvvm_fabs_d">,
256224
Intrinsic<[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>;
257225

@@ -700,9 +668,6 @@ let TargetPrefix = "nvvm" in {
700668
def int_nvvm_f2h_rn : GCCBuiltin<"__nvvm_f2h_rn">,
701669
Intrinsic<[llvm_i16_ty], [llvm_float_ty], [IntrNoMem]>;
702670

703-
def int_nvvm_h2f : GCCBuiltin<"__nvvm_h2f">,
704-
Intrinsic<[llvm_float_ty], [llvm_i16_ty], [IntrNoMem]>;
705-
706671
//
707672
// Bitcast
708673
//

‎llvm/lib/IR/AutoUpgrade.cpp

Lines changed: 85 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@
1414
//===----------------------------------------------------------------------===//
1515

1616
#include "llvm/IR/AutoUpgrade.h"
17+
#include "llvm/ADT/StringSwitch.h"
1718
#include "llvm/IR/CFG.h"
1819
#include "llvm/IR/CallSite.h"
1920
#include "llvm/IR/Constants.h"
@@ -204,7 +205,38 @@ static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) {
204205
}
205206
break;
206207
}
208+
case 'n': {
209+
if (Name.startswith("nvvm.")) {
210+
Name = Name.substr(5);
211+
212+
// The following nvvm intrinsics correspond exactly to an LLVM intrinsic.
213+
Intrinsic::ID IID = StringSwitch<Intrinsic::ID>(Name)
214+
.Cases("brev32", "brev64", Intrinsic::bitreverse)
215+
.Case("clz.i", Intrinsic::ctlz)
216+
.Case("popc.i", Intrinsic::ctpop)
217+
.Default(Intrinsic::not_intrinsic);
218+
if (IID != Intrinsic::not_intrinsic && F->arg_size() == 1) {
219+
NewFn = Intrinsic::getDeclaration(F->getParent(), IID,
220+
{F->getReturnType()});
221+
return true;
222+
}
207223

224+
// The following nvvm intrinsics correspond exactly to an LLVM idiom, but
225+
// not to an intrinsic alone. We expand them in UpgradeIntrinsicCall.
226+
//
227+
// TODO: We could add lohi.i2d.
228+
bool Expand = StringSwitch<bool>(Name)
229+
.Cases("abs.i", "abs.ll", true)
230+
.Cases("clz.ll", "popc.ll", "h2f", true)
231+
.Cases("max.i", "max.ll", "max.ui", "max.ull", true)
232+
.Cases("min.i", "min.ll", "min.ui", "min.ull", true)
233+
.Default(false);
234+
if (Expand) {
235+
NewFn = nullptr;
236+
return true;
237+
}
238+
}
239+
}
208240
case 'o':
209241
// We only need to change the name to match the mangling including the
210242
// address space.
@@ -753,6 +785,9 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
753785
bool IsX86 = Name.startswith("x86.");
754786
if (IsX86)
755787
Name = Name.substr(4);
788+
bool IsNVVM = Name.startswith("nvvm.");
789+
if (IsNVVM)
790+
Name = Name.substr(5);
756791

757792
if (IsX86 && Name.startswith("sse4a.movnt.")) {
758793
Module *M = F->getParent();
@@ -1727,6 +1762,50 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
17271762
{ CI->getArgOperand(0), CI->getArgOperand(1) });
17281763
Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
17291764
CI->getArgOperand(2));
1765+
} else if (IsNVVM && (Name == "abs.i" || Name == "abs.ll")) {
1766+
Value *Arg = CI->getArgOperand(0);
1767+
Value *Neg = Builder.CreateNeg(Arg, "neg");
1768+
Value *Cmp = Builder.CreateICmpSGE(
1769+
Arg, llvm::Constant::getNullValue(Arg->getType()), "abs.cond");
1770+
Rep = Builder.CreateSelect(Cmp, Arg, Neg, "abs");
1771+
} else if (IsNVVM && (Name == "max.i" || Name == "max.ll" ||
1772+
Name == "max.ui" || Name == "max.ull")) {
1773+
Value *Arg0 = CI->getArgOperand(0);
1774+
Value *Arg1 = CI->getArgOperand(1);
1775+
Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull")
1776+
? Builder.CreateICmpUGE(Arg0, Arg1, "max.cond")
1777+
: Builder.CreateICmpSGE(Arg0, Arg1, "max.cond");
1778+
Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "max");
1779+
} else if (IsNVVM && (Name == "min.i" || Name == "min.ll" ||
1780+
Name == "min.ui" || Name == "min.ull")) {
1781+
Value *Arg0 = CI->getArgOperand(0);
1782+
Value *Arg1 = CI->getArgOperand(1);
1783+
Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull")
1784+
? Builder.CreateICmpULE(Arg0, Arg1, "min.cond")
1785+
: Builder.CreateICmpSLE(Arg0, Arg1, "min.cond");
1786+
Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "min");
1787+
} else if (IsNVVM && Name == "clz.ll") {
1788+
// llvm.nvvm.clz.ll returns an i32, but llvm.ctlz.i64 and returns an i64.
1789+
Value *Arg = CI->getArgOperand(0);
1790+
Value *Ctlz = Builder.CreateCall(
1791+
Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz,
1792+
{Arg->getType()}),
1793+
{Arg, Builder.getFalse()}, "ctlz");
1794+
Rep = Builder.CreateTrunc(Ctlz, Builder.getInt32Ty(), "ctlz.trunc");
1795+
} else if (IsNVVM && Name == "popc.ll") {
1796+
// llvm.nvvm.popc.ll returns an i32, but llvm.ctpop.i64 and returns an
1797+
// i64.
1798+
Value *Arg = CI->getArgOperand(0);
1799+
Value *Popc = Builder.CreateCall(
1800+
Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop,
1801+
{Arg->getType()}),
1802+
Arg, "ctpop");
1803+
Rep = Builder.CreateTrunc(Popc, Builder.getInt32Ty(), "ctpop.trunc");
1804+
} else if (IsNVVM && Name == "h2f") {
1805+
Rep = Builder.CreateCall(Intrinsic::getDeclaration(
1806+
F->getParent(), Intrinsic::convert_from_fp16,
1807+
{Builder.getFloatTy()}),
1808+
CI->getArgOperand(0), "h2f");
17301809
} else {
17311810
llvm_unreachable("Unknown function for CallInst upgrade.");
17321811
}
@@ -1786,11 +1865,15 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
17861865
CI->eraseFromParent();
17871866
return;
17881867

1789-
case Intrinsic::ctpop: {
1868+
case Intrinsic::ctpop:
1869+
CI->replaceAllUsesWith(Builder.CreateCall(NewFn, {CI->getArgOperand(0)}));
1870+
CI->eraseFromParent();
1871+
return;
1872+
1873+
case Intrinsic::convert_from_fp16:
17901874
CI->replaceAllUsesWith(Builder.CreateCall(NewFn, {CI->getArgOperand(0)}));
17911875
CI->eraseFromParent();
17921876
return;
1793-
}
17941877

17951878
case Intrinsic::x86_xop_vfrcz_ss:
17961879
case Intrinsic::x86_xop_vfrcz_sd:

‎llvm/lib/Target/NVPTX/NVPTXIntrinsics.td

Lines changed: 1 addition & 47 deletions
Original file line numberDiff line numberDiff line change
@@ -187,43 +187,13 @@ class F_MATH_3<string OpcStr, NVPTXRegClass t_regclass,
187187
// MISC
188188
//
189189

190-
def INT_NVVM_CLZ_I : F_MATH_1<"clz.b32 \t$dst, $src0;", Int32Regs, Int32Regs,
191-
int_nvvm_clz_i>;
192-
def INT_NVVM_CLZ_LL : F_MATH_1<"clz.b64 \t$dst, $src0;", Int32Regs, Int64Regs,
193-
int_nvvm_clz_ll>;
194-
195-
def INT_NVVM_POPC_I : F_MATH_1<"popc.b32 \t$dst, $src0;", Int32Regs, Int32Regs,
196-
int_nvvm_popc_i>;
197-
def INT_NVVM_POPC_LL : F_MATH_1<"popc.b64 \t$dst, $src0;", Int32Regs, Int64Regs,
198-
int_nvvm_popc_ll>;
199-
200190
def INT_NVVM_PRMT : F_MATH_3<"prmt.b32 \t$dst, $src0, $src1, $src2;", Int32Regs,
201191
Int32Regs, Int32Regs, Int32Regs, int_nvvm_prmt>;
202192

203193
//
204194
// Min Max
205195
//
206196

207-
def INT_NVVM_MIN_I : F_MATH_2<"min.s32 \t$dst, $src0, $src1;", Int32Regs,
208-
Int32Regs, Int32Regs, int_nvvm_min_i>;
209-
def INT_NVVM_MIN_UI : F_MATH_2<"min.u32 \t$dst, $src0, $src1;", Int32Regs,
210-
Int32Regs, Int32Regs, int_nvvm_min_ui>;
211-
212-
def INT_NVVM_MIN_LL : F_MATH_2<"min.s64 \t$dst, $src0, $src1;", Int64Regs,
213-
Int64Regs, Int64Regs, int_nvvm_min_ll>;
214-
def INT_NVVM_MIN_ULL : F_MATH_2<"min.u64 \t$dst, $src0, $src1;", Int64Regs,
215-
Int64Regs, Int64Regs, int_nvvm_min_ull>;
216-
217-
def INT_NVVM_MAX_I : F_MATH_2<"max.s32 \t$dst, $src0, $src1;", Int32Regs,
218-
Int32Regs, Int32Regs, int_nvvm_max_i>;
219-
def INT_NVVM_MAX_UI : F_MATH_2<"max.u32 \t$dst, $src0, $src1;", Int32Regs,
220-
Int32Regs, Int32Regs, int_nvvm_max_ui>;
221-
222-
def INT_NVVM_MAX_LL : F_MATH_2<"max.s64 \t$dst, $src0, $src1;", Int64Regs,
223-
Int64Regs, Int64Regs, int_nvvm_max_ll>;
224-
def INT_NVVM_MAX_ULL : F_MATH_2<"max.u64 \t$dst, $src0, $src1;", Int64Regs,
225-
Int64Regs, Int64Regs, int_nvvm_max_ull>;
226-
227197
def INT_NVVM_FMIN_F : F_MATH_2<"min.f32 \t$dst, $src0, $src1;", Float32Regs,
228198
Float32Regs, Float32Regs, int_nvvm_fmin_f>;
229199
def INT_NVVM_FMIN_FTZ_F : F_MATH_2<"min.ftz.f32 \t$dst, $src0, $src1;",
@@ -239,6 +209,7 @@ def INT_NVVM_FMIN_D : F_MATH_2<"min.f64 \t$dst, $src0, $src1;", Float64Regs,
239209
def INT_NVVM_FMAX_D : F_MATH_2<"max.f64 \t$dst, $src0, $src1;", Float64Regs,
240210
Float64Regs, Float64Regs, int_nvvm_fmax_d>;
241211

212+
242213
//
243214
// Multiplication
244215
//
@@ -320,15 +291,6 @@ def INT_NVVM_DIV_RM_D : F_MATH_2<"div.rm.f64 \t$dst, $src0, $src1;",
320291
def INT_NVVM_DIV_RP_D : F_MATH_2<"div.rp.f64 \t$dst, $src0, $src1;",
321292
Float64Regs, Float64Regs, Float64Regs, int_nvvm_div_rp_d>;
322293

323-
//
324-
// Brev
325-
//
326-
327-
def INT_NVVM_BREV32 : F_MATH_1<"brev.b32 \t$dst, $src0;", Int32Regs, Int32Regs,
328-
int_nvvm_brev32>;
329-
def INT_NVVM_BREV64 : F_MATH_1<"brev.b64 \t$dst, $src0;", Int64Regs, Int64Regs,
330-
int_nvvm_brev64>;
331-
332294
//
333295
// Sad
334296
//
@@ -360,11 +322,6 @@ def : Pat<(int_nvvm_ceil_d Float64Regs:$a),
360322
// Abs
361323
//
362324

363-
def INT_NVVM_ABS_I : F_MATH_1<"abs.s32 \t$dst, $src0;", Int32Regs, Int32Regs,
364-
int_nvvm_abs_i>;
365-
def INT_NVVM_ABS_LL : F_MATH_1<"abs.s64 \t$dst, $src0;", Int64Regs, Int64Regs,
366-
int_nvvm_abs_ll>;
367-
368325
def INT_NVVM_FABS_FTZ_F : F_MATH_1<"abs.ftz.f32 \t$dst, $src0;", Float32Regs,
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Float32Regs, int_nvvm_fabs_ftz_f>;
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def INT_NVVM_FABS_F : F_MATH_1<"abs.f32 \t$dst, $src0;", Float32Regs,
@@ -810,9 +767,6 @@ def : Pat<(int_nvvm_f2h_rn_ftz Float32Regs:$a),
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def : Pat<(int_nvvm_f2h_rn Float32Regs:$a),
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(BITCONVERT_16_F2I (CVT_f16_f32 Float32Regs:$a, CvtRN))>;
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def : Pat<(int_nvvm_h2f Int16Regs:$a),
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(CVT_f32_f16 (BITCONVERT_16_I2F Int16Regs:$a), CvtNONE)>;
815-
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//
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// Bitcast
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//

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