Skip to content

Commit 469c5e3

Browse files
committed
[AMDGPU] Simplify definition of renamed DS instructions. NFC.
Following the pattern used for SOP instructions, we can use the same multiclass with a default argument to define renamed and non-renamed instructions.
1 parent bf7f62a commit 469c5e3

File tree

1 file changed

+66
-83
lines changed

1 file changed

+66
-83
lines changed

llvm/lib/Target/AMDGPU/DSInstructions.td

Lines changed: 66 additions & 83 deletions
Original file line numberDiff line numberDiff line change
@@ -1210,33 +1210,24 @@ class Base_DS_Real_gfx6_gfx7_gfx10_gfx11_gfx12<bits<8> op, DS_Pseudo ps, int ef,
12101210
// GFX12.
12111211
//===----------------------------------------------------------------------===//
12121212

1213-
let AssemblerPredicate = isGFX12Plus, DecoderNamespace = "GFX12" in {
1214-
multiclass DS_Real_gfx12<bits<8> op> {
1215-
defvar ps = !cast<DS_Pseudo>(NAME);
1213+
multiclass DS_Real_gfx12<bits<8> op, string name = !tolower(NAME)> {
1214+
defvar ps = !cast<DS_Pseudo>(NAME);
1215+
let AssemblerPredicate = isGFX12Plus, DecoderNamespace = "GFX12" in
12161216
def _gfx12 :
12171217
Base_DS_Real_gfx6_gfx7_gfx10_gfx11_gfx12<op, ps, SIEncodingFamily.GFX12,
1218-
ps.Mnemonic, /*hasGDS=*/false>;
1219-
}
1220-
1221-
multiclass DS_Real_Renamed_gfx12<bits<8> op, string name> {
1222-
defvar ps = !cast<DS_Pseudo>(NAME);
1223-
def _gfx12 :
1224-
Base_DS_Real_gfx6_gfx7_gfx10_gfx11_gfx12<op, ps,
1225-
SIEncodingFamily.GFX12,
1226-
name, /*hasGDS=*/false>,
1227-
MnemonicAlias<ps.Mnemonic, name>,
1228-
Requires<[isGFX12Plus]>;
1229-
}
1230-
} // End AssemblerPredicate = isGFX12Plus, DecoderNamespace = "GFX12"
1231-
1232-
defm DS_MIN_F32 : DS_Real_Renamed_gfx12<0x012, "ds_min_num_f32">;
1233-
defm DS_MAX_F32 : DS_Real_Renamed_gfx12<0x013, "ds_max_num_f32">;
1234-
defm DS_MIN_RTN_F32 : DS_Real_Renamed_gfx12<0x032, "ds_min_num_rtn_f32">;
1235-
defm DS_MAX_RTN_F32 : DS_Real_Renamed_gfx12<0x033, "ds_max_num_rtn_f32">;
1236-
defm DS_MIN_F64 : DS_Real_Renamed_gfx12<0x052, "ds_min_num_f64">;
1237-
defm DS_MAX_F64 : DS_Real_Renamed_gfx12<0x053, "ds_max_num_f64">;
1238-
defm DS_MIN_RTN_F64 : DS_Real_Renamed_gfx12<0x072, "ds_min_num_rtn_f64">;
1239-
defm DS_MAX_RTN_F64 : DS_Real_Renamed_gfx12<0x073, "ds_max_num_rtn_f64">;
1218+
name, /*hasGDS=*/false>;
1219+
if !ne(ps.Mnemonic, name) then
1220+
def : MnemonicAlias<ps.Mnemonic, name>, Requires<[isGFX12Plus]>;
1221+
}
1222+
1223+
defm DS_MIN_F32 : DS_Real_gfx12<0x012, "ds_min_num_f32">;
1224+
defm DS_MAX_F32 : DS_Real_gfx12<0x013, "ds_max_num_f32">;
1225+
defm DS_MIN_RTN_F32 : DS_Real_gfx12<0x032, "ds_min_num_rtn_f32">;
1226+
defm DS_MAX_RTN_F32 : DS_Real_gfx12<0x033, "ds_max_num_rtn_f32">;
1227+
defm DS_MIN_F64 : DS_Real_gfx12<0x052, "ds_min_num_f64">;
1228+
defm DS_MAX_F64 : DS_Real_gfx12<0x053, "ds_max_num_f64">;
1229+
defm DS_MIN_RTN_F64 : DS_Real_gfx12<0x072, "ds_min_num_rtn_f64">;
1230+
defm DS_MAX_RTN_F64 : DS_Real_gfx12<0x073, "ds_max_num_rtn_f64">;
12401231
defm DS_COND_SUB_U32 : DS_Real_gfx12<0x098>;
12411232
defm DS_SUB_CLAMP_U32 : DS_Real_gfx12<0x099>;
12421233
defm DS_COND_SUB_RTN_U32 : DS_Real_gfx12<0x0a8>;
@@ -1256,65 +1247,57 @@ def : MnemonicAlias<"ds_subrev_rtn_u64", "ds_rsub_rtn_u64">, Requires<[isGFX12Pl
12561247
// GFX11.
12571248
//===----------------------------------------------------------------------===//
12581249

1259-
let AssemblerPredicate = isGFX11Only, DecoderNamespace = "GFX11" in {
1260-
multiclass DS_Real_gfx11<bits<8> op> {
1250+
multiclass DS_Real_gfx11<bits<8> op, string name = !tolower(NAME)> {
1251+
defvar ps = !cast<DS_Pseudo>(NAME);
1252+
let AssemblerPredicate = isGFX11Only, DecoderNamespace = "GFX11" in
12611253
def _gfx11 :
1262-
Base_DS_Real_gfx6_gfx7_gfx10_gfx11_gfx12<op, !cast<DS_Pseudo>(NAME),
1263-
SIEncodingFamily.GFX11>;
1264-
}
1265-
1266-
multiclass DS_Real_Renamed_gfx11<bits<8> op, string name> {
1267-
defvar ps = !cast<DS_Pseudo>(NAME);
1268-
def _gfx11 : Base_DS_Real_gfx6_gfx7_gfx10_gfx11_gfx12<op, ps, SIEncodingFamily.GFX11, name>,
1269-
MnemonicAlias<ps.Mnemonic, name>, Requires<[isGFX11Only]>;
1270-
}
1271-
} // End AssemblerPredicate = isGFX11Only, DecoderNamespace = "GFX11"
1272-
1273-
multiclass DS_Real_gfx11_gfx12<bits<8> op>
1274-
: DS_Real_gfx11<op>, DS_Real_gfx12<op>;
1275-
1276-
multiclass DS_Real_Renamed_gfx11_gfx12<bits<8> op, string name>
1277-
: DS_Real_Renamed_gfx11<op, name>,
1278-
DS_Real_Renamed_gfx12<op, name>;
1279-
1280-
defm DS_WRITE_B32 : DS_Real_Renamed_gfx11_gfx12<0x00d, "ds_store_b32">;
1281-
defm DS_WRITE2_B32 : DS_Real_Renamed_gfx11_gfx12<0x00e, "ds_store_2addr_b32">;
1282-
defm DS_WRITE2ST64_B32 : DS_Real_Renamed_gfx11_gfx12<0x00f, "ds_store_2addr_stride64_b32">;
1283-
defm DS_WRITE_B8 : DS_Real_Renamed_gfx11_gfx12<0x01e, "ds_store_b8">;
1284-
defm DS_WRITE_B16 : DS_Real_Renamed_gfx11_gfx12<0x01f, "ds_store_b16">;
1285-
defm DS_WRXCHG_RTN_B32 : DS_Real_Renamed_gfx11_gfx12<0x02d, "ds_storexchg_rtn_b32">;
1286-
defm DS_WRXCHG2_RTN_B32 : DS_Real_Renamed_gfx11_gfx12<0x02e, "ds_storexchg_2addr_rtn_b32">;
1287-
defm DS_WRXCHG2ST64_RTN_B32 : DS_Real_Renamed_gfx11_gfx12<0x02f, "ds_storexchg_2addr_stride64_rtn_b32">;
1288-
defm DS_READ_B32 : DS_Real_Renamed_gfx11_gfx12<0x036, "ds_load_b32">;
1289-
defm DS_READ2_B32 : DS_Real_Renamed_gfx11_gfx12<0x037, "ds_load_2addr_b32">;
1290-
defm DS_READ2ST64_B32 : DS_Real_Renamed_gfx11_gfx12<0x038, "ds_load_2addr_stride64_b32">;
1291-
defm DS_READ_I8 : DS_Real_Renamed_gfx11_gfx12<0x039, "ds_load_i8">;
1292-
defm DS_READ_U8 : DS_Real_Renamed_gfx11_gfx12<0x03a, "ds_load_u8">;
1293-
defm DS_READ_I16 : DS_Real_Renamed_gfx11_gfx12<0x03b, "ds_load_i16">;
1294-
defm DS_READ_U16 : DS_Real_Renamed_gfx11_gfx12<0x03c, "ds_load_u16">;
1295-
defm DS_WRITE_B64 : DS_Real_Renamed_gfx11_gfx12<0x04d, "ds_store_b64">;
1296-
defm DS_WRITE2_B64 : DS_Real_Renamed_gfx11_gfx12<0x04e, "ds_store_2addr_b64">;
1297-
defm DS_WRITE2ST64_B64 : DS_Real_Renamed_gfx11_gfx12<0x04f, "ds_store_2addr_stride64_b64">;
1298-
defm DS_WRXCHG_RTN_B64 : DS_Real_Renamed_gfx11_gfx12<0x06d, "ds_storexchg_rtn_b64">;
1299-
defm DS_WRXCHG2_RTN_B64 : DS_Real_Renamed_gfx11_gfx12<0x06e, "ds_storexchg_2addr_rtn_b64">;
1300-
defm DS_WRXCHG2ST64_RTN_B64 : DS_Real_Renamed_gfx11_gfx12<0x06f, "ds_storexchg_2addr_stride64_rtn_b64">;
1301-
defm DS_READ_B64 : DS_Real_Renamed_gfx11_gfx12<0x076, "ds_load_b64">;
1302-
defm DS_READ2_B64 : DS_Real_Renamed_gfx11_gfx12<0x077, "ds_load_2addr_b64">;
1303-
defm DS_READ2ST64_B64 : DS_Real_Renamed_gfx11_gfx12<0x078, "ds_load_2addr_stride64_b64">;
1304-
defm DS_WRITE_B8_D16_HI : DS_Real_Renamed_gfx11_gfx12<0x0a0, "ds_store_b8_d16_hi">;
1305-
defm DS_WRITE_B16_D16_HI : DS_Real_Renamed_gfx11_gfx12<0x0a1, "ds_store_b16_d16_hi">;
1306-
defm DS_READ_U8_D16 : DS_Real_Renamed_gfx11_gfx12<0x0a2, "ds_load_u8_d16">;
1307-
defm DS_READ_U8_D16_HI : DS_Real_Renamed_gfx11_gfx12<0x0a3, "ds_load_u8_d16_hi">;
1308-
defm DS_READ_I8_D16 : DS_Real_Renamed_gfx11_gfx12<0x0a4, "ds_load_i8_d16">;
1309-
defm DS_READ_I8_D16_HI : DS_Real_Renamed_gfx11_gfx12<0x0a5, "ds_load_i8_d16_hi">;
1310-
defm DS_READ_U16_D16 : DS_Real_Renamed_gfx11_gfx12<0x0a6, "ds_load_u16_d16">;
1311-
defm DS_READ_U16_D16_HI : DS_Real_Renamed_gfx11_gfx12<0x0a7, "ds_load_u16_d16_hi">;
1312-
defm DS_WRITE_ADDTID_B32 : DS_Real_Renamed_gfx11_gfx12<0x0b0, "ds_store_addtid_b32">;
1313-
defm DS_READ_ADDTID_B32 : DS_Real_Renamed_gfx11_gfx12<0x0b1, "ds_load_addtid_b32">;
1314-
defm DS_WRITE_B96 : DS_Real_Renamed_gfx11_gfx12<0x0de, "ds_store_b96">;
1315-
defm DS_WRITE_B128 : DS_Real_Renamed_gfx11_gfx12<0x0df, "ds_store_b128">;
1316-
defm DS_READ_B96 : DS_Real_Renamed_gfx11_gfx12<0x0fe, "ds_load_b96">;
1317-
defm DS_READ_B128 : DS_Real_Renamed_gfx11_gfx12<0x0ff, "ds_load_b128">;
1254+
Base_DS_Real_gfx6_gfx7_gfx10_gfx11_gfx12<op, ps, SIEncodingFamily.GFX11,
1255+
name>;
1256+
if !ne(ps.Mnemonic, name) then
1257+
def : MnemonicAlias<ps.Mnemonic, name>, Requires<[isGFX11Only]>;
1258+
}
1259+
1260+
multiclass DS_Real_gfx11_gfx12<bits<8> op, string name = !tolower(NAME)>
1261+
: DS_Real_gfx11<op, name>, DS_Real_gfx12<op, name>;
1262+
1263+
defm DS_WRITE_B32 : DS_Real_gfx11_gfx12<0x00d, "ds_store_b32">;
1264+
defm DS_WRITE2_B32 : DS_Real_gfx11_gfx12<0x00e, "ds_store_2addr_b32">;
1265+
defm DS_WRITE2ST64_B32 : DS_Real_gfx11_gfx12<0x00f, "ds_store_2addr_stride64_b32">;
1266+
defm DS_WRITE_B8 : DS_Real_gfx11_gfx12<0x01e, "ds_store_b8">;
1267+
defm DS_WRITE_B16 : DS_Real_gfx11_gfx12<0x01f, "ds_store_b16">;
1268+
defm DS_WRXCHG_RTN_B32 : DS_Real_gfx11_gfx12<0x02d, "ds_storexchg_rtn_b32">;
1269+
defm DS_WRXCHG2_RTN_B32 : DS_Real_gfx11_gfx12<0x02e, "ds_storexchg_2addr_rtn_b32">;
1270+
defm DS_WRXCHG2ST64_RTN_B32 : DS_Real_gfx11_gfx12<0x02f, "ds_storexchg_2addr_stride64_rtn_b32">;
1271+
defm DS_READ_B32 : DS_Real_gfx11_gfx12<0x036, "ds_load_b32">;
1272+
defm DS_READ2_B32 : DS_Real_gfx11_gfx12<0x037, "ds_load_2addr_b32">;
1273+
defm DS_READ2ST64_B32 : DS_Real_gfx11_gfx12<0x038, "ds_load_2addr_stride64_b32">;
1274+
defm DS_READ_I8 : DS_Real_gfx11_gfx12<0x039, "ds_load_i8">;
1275+
defm DS_READ_U8 : DS_Real_gfx11_gfx12<0x03a, "ds_load_u8">;
1276+
defm DS_READ_I16 : DS_Real_gfx11_gfx12<0x03b, "ds_load_i16">;
1277+
defm DS_READ_U16 : DS_Real_gfx11_gfx12<0x03c, "ds_load_u16">;
1278+
defm DS_WRITE_B64 : DS_Real_gfx11_gfx12<0x04d, "ds_store_b64">;
1279+
defm DS_WRITE2_B64 : DS_Real_gfx11_gfx12<0x04e, "ds_store_2addr_b64">;
1280+
defm DS_WRITE2ST64_B64 : DS_Real_gfx11_gfx12<0x04f, "ds_store_2addr_stride64_b64">;
1281+
defm DS_WRXCHG_RTN_B64 : DS_Real_gfx11_gfx12<0x06d, "ds_storexchg_rtn_b64">;
1282+
defm DS_WRXCHG2_RTN_B64 : DS_Real_gfx11_gfx12<0x06e, "ds_storexchg_2addr_rtn_b64">;
1283+
defm DS_WRXCHG2ST64_RTN_B64 : DS_Real_gfx11_gfx12<0x06f, "ds_storexchg_2addr_stride64_rtn_b64">;
1284+
defm DS_READ_B64 : DS_Real_gfx11_gfx12<0x076, "ds_load_b64">;
1285+
defm DS_READ2_B64 : DS_Real_gfx11_gfx12<0x077, "ds_load_2addr_b64">;
1286+
defm DS_READ2ST64_B64 : DS_Real_gfx11_gfx12<0x078, "ds_load_2addr_stride64_b64">;
1287+
defm DS_WRITE_B8_D16_HI : DS_Real_gfx11_gfx12<0x0a0, "ds_store_b8_d16_hi">;
1288+
defm DS_WRITE_B16_D16_HI : DS_Real_gfx11_gfx12<0x0a1, "ds_store_b16_d16_hi">;
1289+
defm DS_READ_U8_D16 : DS_Real_gfx11_gfx12<0x0a2, "ds_load_u8_d16">;
1290+
defm DS_READ_U8_D16_HI : DS_Real_gfx11_gfx12<0x0a3, "ds_load_u8_d16_hi">;
1291+
defm DS_READ_I8_D16 : DS_Real_gfx11_gfx12<0x0a4, "ds_load_i8_d16">;
1292+
defm DS_READ_I8_D16_HI : DS_Real_gfx11_gfx12<0x0a5, "ds_load_i8_d16_hi">;
1293+
defm DS_READ_U16_D16 : DS_Real_gfx11_gfx12<0x0a6, "ds_load_u16_d16">;
1294+
defm DS_READ_U16_D16_HI : DS_Real_gfx11_gfx12<0x0a7, "ds_load_u16_d16_hi">;
1295+
defm DS_WRITE_ADDTID_B32 : DS_Real_gfx11_gfx12<0x0b0, "ds_store_addtid_b32">;
1296+
defm DS_READ_ADDTID_B32 : DS_Real_gfx11_gfx12<0x0b1, "ds_load_addtid_b32">;
1297+
defm DS_WRITE_B96 : DS_Real_gfx11_gfx12<0x0de, "ds_store_b96">;
1298+
defm DS_WRITE_B128 : DS_Real_gfx11_gfx12<0x0df, "ds_store_b128">;
1299+
defm DS_READ_B96 : DS_Real_gfx11_gfx12<0x0fe, "ds_load_b96">;
1300+
defm DS_READ_B128 : DS_Real_gfx11_gfx12<0x0ff, "ds_load_b128">;
13181301

13191302
// DS_CMPST_* are renamed to DS_CMPSTORE_* in GFX11, but also the data operands (src and cmp) are swapped
13201303
// comparing to pre-GFX11.

0 commit comments

Comments
 (0)