@@ -845,7 +845,7 @@ SDValue XtensaTargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
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SDValue SizeTmp =
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DAG.getNode (ISD::ADD, DL, VT, Size, DAG.getConstant (31 , DL, MVT::i32 ));
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SDValue SizeRoundUp = DAG.getNode (ISD::AND, DL, VT, SizeTmp,
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- DAG.getConstant (~31 , DL, MVT::i32 ));
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+ DAG.getSignedConstant (~31 , DL, MVT::i32 ));
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unsigned SPReg = Xtensa::SP;
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SDValue SP = DAG.getCopyFromReg (Chain, DL, SPReg, VT);
@@ -873,7 +873,7 @@ SDValue XtensaTargetLowering::LowerShiftLeftParts(SDValue Op,
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// Lo = 0
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// Hi = Lo << (Shamt - register size)
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- SDValue MinusRegisterSize = DAG.getConstant (-32 , DL, VT);
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+ SDValue MinusRegisterSize = DAG.getSignedConstant (-32 , DL, VT);
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SDValue ShamtMinusRegisterSize =
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DAG.getNode (ISD::ADD, DL, VT, Shamt, MinusRegisterSize);
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@@ -914,7 +914,7 @@ SDValue XtensaTargetLowering::LowerShiftRightParts(SDValue Op,
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// Hi = 0;
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unsigned ShiftRightOp = IsSRA ? ISD::SRA : ISD::SRL;
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- SDValue MinusRegisterSize = DAG.getConstant (-32 , DL, VT);
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+ SDValue MinusRegisterSize = DAG.getSignedConstant (-32 , DL, VT);
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SDValue RegisterSizeMinus1 = DAG.getConstant (32 - 1 , DL, VT);
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SDValue ShamtMinusRegisterSize =
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DAG.getNode (ISD::ADD, DL, VT, Shamt, MinusRegisterSize);
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