We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent 27a25cd commit 47a9f63Copy full SHA for 47a9f63
mlir/include/mlir/Conversion/Passes.td
@@ -1399,7 +1399,8 @@ def ConvertVectorToLLVMPass : Pass<"convert-vector-to-llvm"> {
1399
"Use the preferred alignment of a vector type in load/store "
1400
"operations instead of the alignment of the element type of the "
1401
"memref. This flag is intended for use with hardware which requires"
1402
- "vector alignment.">,
+ "vector alignment, or in application contexts where it is known all "
1403
+ "vector access are naturally aligned. ">,
1404
Option<"amx", "enable-amx",
1405
"bool", /*default=*/"false",
1406
"Enables the use of AMX dialect while lowering the vector "
0 commit comments