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XinWang10XinWang10
committed
support shift compress
1 parent a4377a9 commit 47c4552

23 files changed

+983
-172
lines changed

‎llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp

Lines changed: 31 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -106,6 +106,12 @@ bool X86::optimizeShiftRotateWithImmediateOne(MCInst &MI) {
106106
#define TO_IMM1(FROM) \
107107
case X86::FROM##i: \
108108
NewOpc = X86::FROM##1; \
109+
break; \
110+
case X86::FROM##i_EVEX: \
111+
NewOpc = X86::FROM##1_EVEX; \
112+
break; \
113+
case X86::FROM##i_ND: \
114+
NewOpc = X86::FROM##1_ND; \
109115
break;
110116
switch (MI.getOpcode()) {
111117
default:
@@ -118,6 +124,31 @@ bool X86::optimizeShiftRotateWithImmediateOne(MCInst &MI) {
118124
TO_IMM1(RCL16r)
119125
TO_IMM1(RCL32r)
120126
TO_IMM1(RCL64r)
127+
TO_IMM1(RCR8m)
128+
TO_IMM1(RCR16m)
129+
TO_IMM1(RCR32m)
130+
TO_IMM1(RCR64m)
131+
TO_IMM1(RCL8m)
132+
TO_IMM1(RCL16m)
133+
TO_IMM1(RCL32m)
134+
TO_IMM1(RCL64m)
135+
#undef TO_IMM1
136+
#define TO_IMM1(FROM) \
137+
case X86::FROM##i: \
138+
NewOpc = X86::FROM##1; \
139+
break; \
140+
case X86::FROM##i_EVEX: \
141+
NewOpc = X86::FROM##1_EVEX; \
142+
break; \
143+
case X86::FROM##i_NF: \
144+
NewOpc = X86::FROM##1_NF; \
145+
break; \
146+
case X86::FROM##i_ND: \
147+
NewOpc = X86::FROM##1_ND; \
148+
break; \
149+
case X86::FROM##i_NF_ND: \
150+
NewOpc = X86::FROM##1_NF_ND; \
151+
break;
121152
TO_IMM1(ROR8r)
122153
TO_IMM1(ROR16r)
123154
TO_IMM1(ROR32r)
@@ -138,14 +169,6 @@ bool X86::optimizeShiftRotateWithImmediateOne(MCInst &MI) {
138169
TO_IMM1(SHL16r)
139170
TO_IMM1(SHL32r)
140171
TO_IMM1(SHL64r)
141-
TO_IMM1(RCR8m)
142-
TO_IMM1(RCR16m)
143-
TO_IMM1(RCR32m)
144-
TO_IMM1(RCR64m)
145-
TO_IMM1(RCL8m)
146-
TO_IMM1(RCL16m)
147-
TO_IMM1(RCL32m)
148-
TO_IMM1(RCL64m)
149172
TO_IMM1(ROR8m)
150173
TO_IMM1(ROR16m)
151174
TO_IMM1(ROR32m)

‎llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimizationForImmediate.def

Lines changed: 65 additions & 120 deletions
Original file line numberDiff line numberDiff line change
@@ -12,133 +12,78 @@
1212
#ifndef ENTRY
1313
#define ENTRY(LONG, SHORT)
1414
#endif
15-
ENTRY(ADC16mi, ADC16mi8)
16-
ENTRY(ADC16ri, ADC16ri8)
17-
ENTRY(ADC32mi, ADC32mi8)
18-
ENTRY(ADC32ri, ADC32ri8)
19-
ENTRY(ADC64mi32, ADC64mi8)
20-
ENTRY(ADC64ri32, ADC64ri8)
21-
ENTRY(SBB16mi, SBB16mi8)
22-
ENTRY(SBB16ri, SBB16ri8)
23-
ENTRY(SBB32mi, SBB32mi8)
24-
ENTRY(SBB32ri, SBB32ri8)
25-
ENTRY(SBB64mi32, SBB64mi8)
26-
ENTRY(SBB64ri32, SBB64ri8)
27-
ENTRY(ADD16mi, ADD16mi8)
28-
ENTRY(ADD16ri, ADD16ri8)
29-
ENTRY(ADD32mi, ADD32mi8)
30-
ENTRY(ADD32ri, ADD32ri8)
31-
ENTRY(ADD64mi32, ADD64mi8)
32-
ENTRY(ADD64ri32, ADD64ri8)
33-
ENTRY(AND16mi, AND16mi8)
34-
ENTRY(AND16ri, AND16ri8)
35-
ENTRY(AND32mi, AND32mi8)
36-
ENTRY(AND32ri, AND32ri8)
37-
ENTRY(AND64mi32, AND64mi8)
38-
ENTRY(AND64ri32, AND64ri8)
39-
ENTRY(OR16mi, OR16mi8)
40-
ENTRY(OR16ri, OR16ri8)
41-
ENTRY(OR32mi, OR32mi8)
42-
ENTRY(OR32ri, OR32ri8)
43-
ENTRY(OR64mi32, OR64mi8)
44-
ENTRY(OR64ri32, OR64ri8)
45-
ENTRY(SUB16mi, SUB16mi8)
46-
ENTRY(SUB16ri, SUB16ri8)
47-
ENTRY(SUB32mi, SUB32mi8)
48-
ENTRY(SUB32ri, SUB32ri8)
49-
ENTRY(SUB64mi32, SUB64mi8)
50-
ENTRY(SUB64ri32, SUB64ri8)
51-
ENTRY(XOR16mi, XOR16mi8)
52-
ENTRY(XOR16ri, XOR16ri8)
53-
ENTRY(XOR32mi, XOR32mi8)
54-
ENTRY(XOR32ri, XOR32ri8)
55-
ENTRY(XOR64mi32, XOR64mi8)
56-
ENTRY(XOR64ri32, XOR64ri8)
5715
ENTRY(CMP16mi, CMP16mi8)
5816
ENTRY(CMP16ri, CMP16ri8)
5917
ENTRY(CMP32mi, CMP32mi8)
6018
ENTRY(CMP32ri, CMP32ri8)
6119
ENTRY(CMP64mi32, CMP64mi8)
6220
ENTRY(CMP64ri32, CMP64ri8)
63-
ENTRY(IMUL16rmi, IMUL16rmi8)
64-
ENTRY(IMUL16rri, IMUL16rri8)
65-
ENTRY(IMUL32rmi, IMUL32rmi8)
66-
ENTRY(IMUL32rri, IMUL32rri8)
67-
ENTRY(IMUL64rmi32, IMUL64rmi8)
68-
ENTRY(IMUL64rri32, IMUL64rri8)
6921
ENTRY(PUSH16i, PUSH16i8)
7022
ENTRY(PUSH32i, PUSH32i8)
7123
ENTRY(PUSH64i32, PUSH64i8)
72-
ENTRY(ADC16mi_ND, ADC16mi8_ND)
73-
ENTRY(ADC16ri_ND, ADC16ri8_ND)
74-
ENTRY(ADC32mi_ND, ADC32mi8_ND)
75-
ENTRY(ADC32ri_ND, ADC32ri8_ND)
76-
ENTRY(ADC64mi32_ND, ADC64mi8_ND)
77-
ENTRY(ADC64ri32_ND, ADC64ri8_ND)
78-
ENTRY(SBB16mi_ND, SBB16mi8_ND)
79-
ENTRY(SBB16ri_ND, SBB16ri8_ND)
80-
ENTRY(SBB32mi_ND, SBB32mi8_ND)
81-
ENTRY(SBB32ri_ND, SBB32ri8_ND)
82-
ENTRY(SBB64mi32_ND, SBB64mi8_ND)
83-
ENTRY(SBB64ri32_ND, SBB64ri8_ND)
84-
ENTRY(ADD16mi_ND, ADD16mi8_ND)
85-
ENTRY(ADD16ri_ND, ADD16ri8_ND)
86-
ENTRY(ADD32mi_ND, ADD32mi8_ND)
87-
ENTRY(ADD32ri_ND, ADD32ri8_ND)
88-
ENTRY(ADD64mi32_ND, ADD64mi8_ND)
89-
ENTRY(ADD64ri32_ND, ADD64ri8_ND)
90-
ENTRY(AND16mi_ND, AND16mi8_ND)
91-
ENTRY(AND16ri_ND, AND16ri8_ND)
92-
ENTRY(AND32mi_ND, AND32mi8_ND)
93-
ENTRY(AND32ri_ND, AND32ri8_ND)
94-
ENTRY(AND64mi32_ND, AND64mi8_ND)
95-
ENTRY(AND64ri32_ND, AND64ri8_ND)
96-
ENTRY(OR16mi_ND, OR16mi8_ND)
97-
ENTRY(OR16ri_ND, OR16ri8_ND)
98-
ENTRY(OR32mi_ND, OR32mi8_ND)
99-
ENTRY(OR32ri_ND, OR32ri8_ND)
100-
ENTRY(OR64mi32_ND, OR64mi8_ND)
101-
ENTRY(OR64ri32_ND, OR64ri8_ND)
102-
ENTRY(SUB16mi_ND, SUB16mi8_ND)
103-
ENTRY(SUB16ri_ND, SUB16ri8_ND)
104-
ENTRY(SUB32mi_ND, SUB32mi8_ND)
105-
ENTRY(SUB32ri_ND, SUB32ri8_ND)
106-
ENTRY(SUB64mi32_ND, SUB64mi8_ND)
107-
ENTRY(SUB64ri32_ND, SUB64ri8_ND)
108-
ENTRY(XOR16mi_ND, XOR16mi8_ND)
109-
ENTRY(XOR16ri_ND, XOR16ri8_ND)
110-
ENTRY(XOR32mi_ND, XOR32mi8_ND)
111-
ENTRY(XOR32ri_ND, XOR32ri8_ND)
112-
ENTRY(XOR64mi32_ND, XOR64mi8_ND)
113-
ENTRY(XOR64ri32_ND, XOR64ri8_ND)
114-
ENTRY(ADD16mi_NF_ND, ADD16mi8_NF_ND)
115-
ENTRY(ADD16ri_NF_ND, ADD16ri8_NF_ND)
116-
ENTRY(ADD32mi_NF_ND, ADD32mi8_NF_ND)
117-
ENTRY(ADD32ri_NF_ND, ADD32ri8_NF_ND)
118-
ENTRY(ADD64mi32_NF_ND, ADD64mi8_NF_ND)
119-
ENTRY(ADD64ri32_NF_ND, ADD64ri8_NF_ND)
120-
ENTRY(AND16mi_NF_ND, AND16mi8_NF_ND)
121-
ENTRY(AND16ri_NF_ND, AND16ri8_NF_ND)
122-
ENTRY(AND32mi_NF_ND, AND32mi8_NF_ND)
123-
ENTRY(AND32ri_NF_ND, AND32ri8_NF_ND)
124-
ENTRY(AND64mi32_NF_ND, AND64mi8_NF_ND)
125-
ENTRY(AND64ri32_NF_ND, AND64ri8_NF_ND)
126-
ENTRY(OR16mi_NF_ND, OR16mi8_NF_ND)
127-
ENTRY(OR16ri_NF_ND, OR16ri8_NF_ND)
128-
ENTRY(OR32mi_NF_ND, OR32mi8_NF_ND)
129-
ENTRY(OR32ri_NF_ND, OR32ri8_NF_ND)
130-
ENTRY(OR64mi32_NF_ND, OR64mi8_NF_ND)
131-
ENTRY(OR64ri32_NF_ND, OR64ri8_NF_ND)
132-
ENTRY(SUB16mi_NF_ND, SUB16mi8_NF_ND)
133-
ENTRY(SUB16ri_NF_ND, SUB16ri8_NF_ND)
134-
ENTRY(SUB32mi_NF_ND, SUB32mi8_NF_ND)
135-
ENTRY(SUB32ri_NF_ND, SUB32ri8_NF_ND)
136-
ENTRY(SUB64mi32_NF_ND, SUB64mi8_NF_ND)
137-
ENTRY(SUB64ri32_NF_ND, SUB64ri8_NF_ND)
138-
ENTRY(XOR16mi_NF_ND, XOR16mi8_NF_ND)
139-
ENTRY(XOR16ri_NF_ND, XOR16ri8_NF_ND)
140-
ENTRY(XOR32mi_NF_ND, XOR32mi8_NF_ND)
141-
ENTRY(XOR32ri_NF_ND, XOR32ri8_NF_ND)
142-
ENTRY(XOR64mi32_NF_ND, XOR64mi8_NF_ND)
143-
ENTRY(XOR64ri32_NF_ND, XOR64ri8_NF_ND)
24+
#define ENTRYS(LONG, SHORT) \
25+
ENTRY(LONG, SHORT) \
26+
ENTRY(LONG##_EVEX, SHORT##_EVEX) \
27+
ENTRY(LONG##_NF, SHORT##_NF) \
28+
ENTRY(LONG##_ND, SHORT##_ND) \
29+
ENTRY(LONG##_NF_ND, SHORT##_NF_ND)
30+
ENTRYS(ADD16mi, ADD16mi8)
31+
ENTRYS(ADD16ri, ADD16ri8)
32+
ENTRYS(ADD32mi, ADD32mi8)
33+
ENTRYS(ADD32ri, ADD32ri8)
34+
ENTRYS(ADD64mi32, ADD64mi8)
35+
ENTRYS(ADD64ri32, ADD64ri8)
36+
ENTRYS(AND16mi, AND16mi8)
37+
ENTRYS(AND16ri, AND16ri8)
38+
ENTRYS(AND32mi, AND32mi8)
39+
ENTRYS(AND32ri, AND32ri8)
40+
ENTRYS(AND64mi32, AND64mi8)
41+
ENTRYS(AND64ri32, AND64ri8)
42+
ENTRYS(OR16mi, OR16mi8)
43+
ENTRYS(OR16ri, OR16ri8)
44+
ENTRYS(OR32mi, OR32mi8)
45+
ENTRYS(OR32ri, OR32ri8)
46+
ENTRYS(OR64mi32, OR64mi8)
47+
ENTRYS(OR64ri32, OR64ri8)
48+
ENTRYS(SUB16mi, SUB16mi8)
49+
ENTRYS(SUB16ri, SUB16ri8)
50+
ENTRYS(SUB32mi, SUB32mi8)
51+
ENTRYS(SUB32ri, SUB32ri8)
52+
ENTRYS(SUB64mi32, SUB64mi8)
53+
ENTRYS(SUB64ri32, SUB64ri8)
54+
ENTRYS(XOR16mi, XOR16mi8)
55+
ENTRYS(XOR16ri, XOR16ri8)
56+
ENTRYS(XOR32mi, XOR32mi8)
57+
ENTRYS(XOR32ri, XOR32ri8)
58+
ENTRYS(XOR64mi32, XOR64mi8)
59+
ENTRYS(XOR64ri32, XOR64ri8)
60+
#undef ENTRYS
61+
#define ENTRYS(LONG, SHORT) \
62+
ENTRY(LONG, SHORT) \
63+
ENTRY(LONG##_EVEX, SHORT##_EVEX) \
64+
ENTRY(LONG##_NF, SHORT##_NF)
65+
ENTRYS(IMUL16rmi, IMUL16rmi8)
66+
ENTRYS(IMUL16rri, IMUL16rri8)
67+
ENTRYS(IMUL32rmi, IMUL32rmi8)
68+
ENTRYS(IMUL32rri, IMUL32rri8)
69+
ENTRYS(IMUL64rmi32, IMUL64rmi8)
70+
ENTRYS(IMUL64rri32, IMUL64rri8)
71+
#undef ENTRYS
72+
#define ENTRYS(LONG, SHORT) \
73+
ENTRY(LONG, SHORT) \
74+
ENTRY(LONG##_EVEX, SHORT##_EVEX) \
75+
ENTRY(LONG##_ND, SHORT##_ND)
76+
ENTRYS(ADC16mi, ADC16mi8)
77+
ENTRYS(ADC16ri, ADC16ri8)
78+
ENTRYS(ADC32mi, ADC32mi8)
79+
ENTRYS(ADC32ri, ADC32ri8)
80+
ENTRYS(ADC64mi32, ADC64mi8)
81+
ENTRYS(ADC64ri32, ADC64ri8)
82+
ENTRYS(SBB16mi, SBB16mi8)
83+
ENTRYS(SBB16ri, SBB16ri8)
84+
ENTRYS(SBB32mi, SBB32mi8)
85+
ENTRYS(SBB32ri, SBB32ri8)
86+
ENTRYS(SBB64mi32, SBB64mi8)
87+
ENTRYS(SBB64ri32, SBB64ri8)
88+
#undef ENTRYS
14489
#undef ENTRY

‎llvm/test/CodeGen/X86/apx/adc.ll

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -112,7 +112,7 @@ define i64 @adc64rm(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
112112
define i16 @adc16ri8(i16 %a, i16 %x, i16 %y) nounwind {
113113
; CHECK-LABEL: adc16ri8:
114114
; CHECK: # %bb.0:
115-
; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
115+
; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
116116
; CHECK-NEXT: adcw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0xd7,0x00]
117117
; CHECK-NEXT: addl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x7b]
118118
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
@@ -127,7 +127,7 @@ define i16 @adc16ri8(i16 %a, i16 %x, i16 %y) nounwind {
127127
define i32 @adc32ri8(i32 %a, i32 %x, i32 %y) nounwind {
128128
; CHECK-LABEL: adc32ri8:
129129
; CHECK: # %bb.0:
130-
; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
130+
; CHECK-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2]
131131
; CHECK-NEXT: adcl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xd7,0x7b]
132132
; CHECK-NEXT: retq # encoding: [0xc3]
133133
%s = add i32 %a, 123
@@ -140,7 +140,7 @@ define i32 @adc32ri8(i32 %a, i32 %x, i32 %y) nounwind {
140140
define i64 @adc64ri8(i64 %a, i64 %x, i64 %y) nounwind {
141141
; CHECK-LABEL: adc64ri8:
142142
; CHECK: # %bb.0:
143-
; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
143+
; CHECK-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
144144
; CHECK-NEXT: adcq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xd7,0x7b]
145145
; CHECK-NEXT: retq # encoding: [0xc3]
146146
%s = add i64 %a, 123
@@ -166,7 +166,7 @@ define i8 @adc8ri(i8 %a, i8 %x, i8 %y) nounwind {
166166
define i16 @adc16ri(i16 %a, i16 %x, i16 %y) nounwind {
167167
; CHECK-LABEL: adc16ri:
168168
; CHECK: # %bb.0:
169-
; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
169+
; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
170170
; CHECK-NEXT: adcw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0xd7,0x00]
171171
; CHECK-NEXT: addl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xd2,0x04,0x00,0x00]
172172
; CHECK-NEXT: # imm = 0x4D2
@@ -266,7 +266,7 @@ define i64 @adc64mr(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
266266
define i16 @adc16mi8(ptr %ptr, i16 %x, i16 %y) nounwind {
267267
; CHECK-LABEL: adc16mi8:
268268
; CHECK: # %bb.0:
269-
; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
269+
; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
270270
; CHECK-NEXT: adcw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0x17,0x00]
271271
; CHECK-NEXT: addl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x7b]
272272
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
@@ -282,7 +282,7 @@ define i16 @adc16mi8(ptr %ptr, i16 %x, i16 %y) nounwind {
282282
define i32 @adc32mi8(ptr %ptr, i32 %x, i32 %y) nounwind {
283283
; CHECK-LABEL: adc32mi8:
284284
; CHECK: # %bb.0:
285-
; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
285+
; CHECK-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2]
286286
; CHECK-NEXT: adcl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x17,0x7b]
287287
; CHECK-NEXT: retq # encoding: [0xc3]
288288
%a = load i32, ptr %ptr
@@ -296,7 +296,7 @@ define i32 @adc32mi8(ptr %ptr, i32 %x, i32 %y) nounwind {
296296
define i64 @adc64mi8(ptr %ptr, i64 %x, i64 %y) nounwind {
297297
; CHECK-LABEL: adc64mi8:
298298
; CHECK: # %bb.0:
299-
; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
299+
; CHECK-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
300300
; CHECK-NEXT: adcq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0x17,0x7b]
301301
; CHECK-NEXT: retq # encoding: [0xc3]
302302
%a = load i64, ptr %ptr
@@ -324,7 +324,7 @@ define i8 @adc8mi(ptr %ptr, i8 %x, i8 %y) nounwind {
324324
define i16 @adc16mi(ptr %ptr, i16 %x, i16 %y) nounwind {
325325
; CHECK-LABEL: adc16mi:
326326
; CHECK: # %bb.0:
327-
; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
327+
; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
328328
; CHECK-NEXT: adcw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0x17,0x00]
329329
; CHECK-NEXT: addl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xd2,0x04,0x00,0x00]
330330
; CHECK-NEXT: # imm = 0x4D2
@@ -446,7 +446,7 @@ define void @adc8mi_legacy(ptr %ptr, i8 %x, i8 %y) nounwind {
446446
define void @adc16mi_legacy(ptr %ptr, i16 %x, i16 %y) nounwind {
447447
; CHECK-LABEL: adc16mi_legacy:
448448
; CHECK: # %bb.0:
449-
; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
449+
; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
450450
; CHECK-NEXT: adcw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0x17,0x00]
451451
; CHECK-NEXT: addl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xd2,0x04,0x00,0x00]
452452
; CHECK-NEXT: # imm = 0x4D2

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