@@ -1100,6 +1100,25 @@ TEST_F(AMDGPUGISelMITest, TestIsKnownToBeAPowerOfTwo) {
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EXPECT_TRUE (isKnownToBeAPowerOfTwo (CopyOrPow2, *MRI, &KB));
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}
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+ static void AddRangeMetadata (LLVMContext &Context, MachineInstr *Load) {
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+ IntegerType *Int8Ty = Type::getInt8Ty (Context);
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+
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+ // Value must be in [0, 2)
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+ Metadata *LowAndHigh[] = {
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+ ConstantAsMetadata::get (ConstantInt::get (Int8Ty, 0 )),
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+ ConstantAsMetadata::get (ConstantInt::get (Int8Ty, 2 ))};
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+ auto NewMDNode = MDNode::get (Context, LowAndHigh);
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+ const MachineMemOperand *OldMMO = *Load->memoperands_begin ();
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+ MachineMemOperand *NewMMO =
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+ Load->getParent ()->getParent ()->getMachineMemOperand (
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+ OldMMO->getPointerInfo (), OldMMO->getFlags (), OldMMO->getMemoryType (),
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+ OldMMO->getAlign (), OldMMO->getAAInfo (), NewMDNode);
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+ MachineIRBuilder MIB (*Load);
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+ MIB.buildLoadInstr (Load->getOpcode (), Load->getOperand (0 ),
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+ Load->getOperand (1 ), *NewMMO);
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+ Load->eraseFromParent ();
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+ }
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+
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TEST_F (AArch64GISelMITest, TestMetadata) {
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StringRef MIRString = " %imp:_(p0) = G_IMPLICIT_DEF\n "
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" %load:_(s8) = G_LOAD %imp(p0) :: (load (s8))\n "
@@ -1120,20 +1139,7 @@ TEST_F(AArch64GISelMITest, TestMetadata) {
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MachineInstr *And = MRI->getVRegDef (SrcReg);
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MachineInstr *Ext = MRI->getVRegDef (And->getOperand (1 ).getReg ());
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MachineInstr *Load = MRI->getVRegDef (Ext->getOperand (1 ).getReg ());
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- IntegerType *Int8Ty = Type::getInt8Ty (Context);
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-
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- // Value must be in [0, 2)
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- Metadata *LowAndHigh[] = {
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- ConstantAsMetadata::get (ConstantInt::get (Int8Ty, 0 )),
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- ConstantAsMetadata::get (ConstantInt::get (Int8Ty, 2 ))};
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- auto NewMDNode = MDNode::get (Context, LowAndHigh);
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- const MachineMemOperand *OldMMO = *Load->memoperands_begin ();
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- MachineMemOperand NewMMO (OldMMO->getPointerInfo (), OldMMO->getFlags (),
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- OldMMO->getSizeInBits (), OldMMO->getAlign (),
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- OldMMO->getAAInfo (), NewMDNode);
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- MachineIRBuilder MIB (*Load);
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- MIB.buildLoad (Load->getOperand (0 ), Load->getOperand (1 ), NewMMO);
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- Load->eraseFromParent ();
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+ AddRangeMetadata (Context, Load);
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GISelKnownBits Info (*MF);
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KnownBits Res = Info.getKnownBits (And->getOperand (1 ).getReg ());
@@ -1148,6 +1154,66 @@ TEST_F(AArch64GISelMITest, TestMetadata) {
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EXPECT_EQ (Mask.getZExtValue (), Res.Zero .getZExtValue ());
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}
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+ TEST_F (AArch64GISelMITest, TestMetadataExt) {
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+ StringRef MIRString = " %imp:_(p0) = G_IMPLICIT_DEF\n "
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+ " %load:_(s32) = G_LOAD %imp(p0) :: (load (s8))\n "
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+ " %copy:_(s32) = COPY %load(s32)\n " ;
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+ setUp (MIRString);
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+ if (!TM)
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+ GTEST_SKIP ();
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+
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+ Register CopyReg = Copies[Copies.size () - 1 ];
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+ MachineInstr *FinalCopy = MRI->getVRegDef (CopyReg);
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+ Register SrcReg = FinalCopy->getOperand (1 ).getReg ();
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+ MachineInstr *Load = MRI->getVRegDef (SrcReg);
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+ AddRangeMetadata (Context, Load);
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+
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+ GISelKnownBits Info (*MF);
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+ KnownBits Res = Info.getKnownBits (SrcReg);
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+ EXPECT_TRUE (Res.One .isZero ());
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+ EXPECT_EQ (Res.Zero .getZExtValue (), 0xfeu );
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+ }
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+
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+ TEST_F (AArch64GISelMITest, TestMetadataZExt) {
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+ StringRef MIRString = " %imp:_(p0) = G_IMPLICIT_DEF\n "
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+ " %load:_(s32) = G_ZEXTLOAD %imp(p0) :: (load (s8))\n "
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+ " %copy:_(s32) = COPY %load(s32)\n " ;
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+ setUp (MIRString);
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+ if (!TM)
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+ GTEST_SKIP ();
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+
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+ Register CopyReg = Copies[Copies.size () - 1 ];
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+ MachineInstr *FinalCopy = MRI->getVRegDef (CopyReg);
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+ Register SrcReg = FinalCopy->getOperand (1 ).getReg ();
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+ MachineInstr *Load = MRI->getVRegDef (SrcReg);
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+ AddRangeMetadata (Context, Load);
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+
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+ GISelKnownBits Info (*MF);
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+ KnownBits Res = Info.getKnownBits (SrcReg);
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+ EXPECT_TRUE (Res.One .isZero ());
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+ EXPECT_EQ (Res.Zero .getZExtValue (), 0xfffffffe );
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+ }
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+
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+ TEST_F (AArch64GISelMITest, TestMetadataSExt) {
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+ StringRef MIRString = " %imp:_(p0) = G_IMPLICIT_DEF\n "
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+ " %load:_(s32) = G_SEXTLOAD %imp(p0) :: (load (s8))\n "
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+ " %copy:_(s32) = COPY %load(s32)\n " ;
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+ setUp (MIRString);
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+ if (!TM)
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+ GTEST_SKIP ();
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+
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+ Register CopyReg = Copies[Copies.size () - 1 ];
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+ MachineInstr *FinalCopy = MRI->getVRegDef (CopyReg);
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+ Register SrcReg = FinalCopy->getOperand (1 ).getReg ();
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+ MachineInstr *Load = MRI->getVRegDef (SrcReg);
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+ AddRangeMetadata (Context, Load);
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+
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+ GISelKnownBits Info (*MF);
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+ KnownBits Res = Info.getKnownBits (SrcReg);
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+ EXPECT_TRUE (Res.One .isZero ());
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+ EXPECT_EQ (Res.Zero .getZExtValue (), 0xfffffffe );
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+ }
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+
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TEST_F (AArch64GISelMITest, TestKnownBitsExt) {
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StringRef MIRString = " %c1:_(s16) = G_CONSTANT i16 1\n "
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" %x:_(s16) = G_IMPLICIT_DEF\n "
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