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true16 for v_rndne_f16
1 parent c19f0f0 commit 480eb39

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lines changed

‎llvm/lib/Target/AMDGPU/VOP1Instructions.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1043,7 +1043,7 @@ defm V_FLOOR_F16_fake16 : VOP1_Real_FULL_t16_gfx11_gfx12<0x05b, "v_floor_f1
10431043
defm V_CEIL_F16_t16 : VOP1_Real_FULL_t16_gfx11_gfx12<0x05c, "v_ceil_f16">;
10441044
defm V_CEIL_F16_fake16 : VOP1_Real_FULL_t16_gfx11_gfx12<0x05c, "v_ceil_f16">;
10451045
defm V_TRUNC_F16 : VOP1_Real_FULL_t16_and_fake16_gfx11_gfx12<0x05d, "v_trunc_f16">;
1046-
defm V_RNDNE_F16_fake16 : VOP1_Real_FULL_t16_gfx11_gfx12<0x05e, "v_rndne_f16">;
1046+
defm V_RNDNE_F16 : VOP1_Real_FULL_t16_and_fake16_gfx11_gfx12<0x05e, "v_rndne_f16">;
10471047
defm V_FRACT_F16_fake16 : VOP1_Real_FULL_t16_gfx11_gfx12<0x05f, "v_fract_f16">;
10481048
defm V_SIN_F16_fake16 : VOP1_Real_FULL_t16_gfx11_gfx12<0x060, "v_sin_f16">;
10491049
defm V_COS_F16_fake16 : VOP1_Real_FULL_t16_gfx11_gfx12<0x061, "v_cos_f16">;

‎llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll

Lines changed: 41 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,7 @@
33
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck --check-prefixes=GFX89,VI %s
44
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck --check-prefixes=GFX89,GFX9 %s
55
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck --check-prefixes=GFX11 %s
6+
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1200 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck --check-prefixes=GFX12 %s
67

78
declare half @llvm.rint.f16(half %a)
89
declare <2 x half> @llvm.rint.v2f16(<2 x half> %a)
@@ -63,6 +64,24 @@ define amdgpu_kernel void @rint_f16(
6364
; GFX11-NEXT: v_rndne_f16_e32 v0, v0
6465
; GFX11-NEXT: buffer_store_b16 v0, off, s[4:7], 0
6566
; GFX11-NEXT: s_endpgm
67+
;
68+
; GFX12-LABEL: rint_f16:
69+
; GFX12: ; %bb.0: ; %entry
70+
; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
71+
; GFX12-NEXT: s_mov_b32 s6, -1
72+
; GFX12-NEXT: s_mov_b32 s7, 0x31016000
73+
; GFX12-NEXT: s_mov_b32 s10, s6
74+
; GFX12-NEXT: s_mov_b32 s11, s7
75+
; GFX12-NEXT: s_wait_kmcnt 0x0
76+
; GFX12-NEXT: s_mov_b32 s8, s2
77+
; GFX12-NEXT: s_mov_b32 s9, s3
78+
; GFX12-NEXT: s_mov_b32 s4, s0
79+
; GFX12-NEXT: buffer_load_u16 v0, off, s[8:11], null
80+
; GFX12-NEXT: s_mov_b32 s5, s1
81+
; GFX12-NEXT: s_wait_loadcnt 0x0
82+
; GFX12-NEXT: v_rndne_f16_e32 v0, v0
83+
; GFX12-NEXT: buffer_store_b16 v0, off, s[4:7], null
84+
; GFX12-NEXT: s_endpgm
6685
ptr addrspace(1) %r,
6786
ptr addrspace(1) %a) {
6887
entry:
@@ -168,6 +187,28 @@ define amdgpu_kernel void @rint_v2f16(
168187
; GFX11-NEXT: v_pack_b32_f16 v0, v0, v1
169188
; GFX11-NEXT: buffer_store_b32 v0, off, s[4:7], 0
170189
; GFX11-NEXT: s_endpgm
190+
;
191+
; GFX12-LABEL: rint_v2f16:
192+
; GFX12: ; %bb.0: ; %entry
193+
; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
194+
; GFX12-NEXT: s_mov_b32 s6, -1
195+
; GFX12-NEXT: s_mov_b32 s7, 0x31016000
196+
; GFX12-NEXT: s_mov_b32 s10, s6
197+
; GFX12-NEXT: s_mov_b32 s11, s7
198+
; GFX12-NEXT: s_wait_kmcnt 0x0
199+
; GFX12-NEXT: s_mov_b32 s8, s2
200+
; GFX12-NEXT: s_mov_b32 s9, s3
201+
; GFX12-NEXT: s_mov_b32 s4, s0
202+
; GFX12-NEXT: buffer_load_b32 v0, off, s[8:11], null
203+
; GFX12-NEXT: s_mov_b32 s5, s1
204+
; GFX12-NEXT: s_wait_loadcnt 0x0
205+
; GFX12-NEXT: v_lshrrev_b32_e32 v1, 16, v0
206+
; GFX12-NEXT: v_rndne_f16_e32 v0, v0
207+
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
208+
; GFX12-NEXT: v_rndne_f16_e32 v1, v1
209+
; GFX12-NEXT: v_pack_b32_f16 v0, v0, v1
210+
; GFX12-NEXT: buffer_store_b32 v0, off, s[4:7], null
211+
; GFX12-NEXT: s_endpgm
171212
ptr addrspace(1) %r,
172213
ptr addrspace(1) %a) {
173214
entry:

‎llvm/test/MC/AMDGPU/gfx11_asm_vop1.s

Lines changed: 45 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -2978,50 +2978,65 @@ v_readfirstlane_b32 ttmp15, v1
29782978
v_readfirstlane_b32 null, v255
29792979
// GFX11: v_readfirstlane_b32 null, v255 ; encoding: [0xff,0x05,0xf8,0x7e]
29802980

2981-
v_rndne_f16 v5, v1
2982-
// GFX11: v_rndne_f16_e32 v5, v1 ; encoding: [0x01,0xbd,0x0a,0x7e]
2981+
v_rndne_f16 v5.l, v1.l
2982+
// GFX11: v_rndne_f16_e32 v5.l, v1.l ; encoding: [0x01,0xbd,0x0a,0x7e]
29832983

2984-
v_rndne_f16 v5, v127
2985-
// GFX11: v_rndne_f16_e32 v5, v127 ; encoding: [0x7f,0xbd,0x0a,0x7e]
2984+
v_rndne_f16 v5.l, v127.l
2985+
// GFX11: v_rndne_f16_e32 v5.l, v127.l ; encoding: [0x7f,0xbd,0x0a,0x7e]
29862986

2987-
v_rndne_f16 v5, s1
2988-
// GFX11: v_rndne_f16_e32 v5, s1 ; encoding: [0x01,0xbc,0x0a,0x7e]
2987+
v_rndne_f16 v5.l, s1
2988+
// GFX11: v_rndne_f16_e32 v5.l, s1 ; encoding: [0x01,0xbc,0x0a,0x7e]
29892989

2990-
v_rndne_f16 v5, s105
2991-
// GFX11: v_rndne_f16_e32 v5, s105 ; encoding: [0x69,0xbc,0x0a,0x7e]
2990+
v_rndne_f16 v5.l, s105
2991+
// GFX11: v_rndne_f16_e32 v5.l, s105 ; encoding: [0x69,0xbc,0x0a,0x7e]
29922992

2993-
v_rndne_f16 v5, vcc_lo
2994-
// GFX11: v_rndne_f16_e32 v5, vcc_lo ; encoding: [0x6a,0xbc,0x0a,0x7e]
2993+
v_rndne_f16 v5.l, vcc_lo
2994+
// GFX11: v_rndne_f16_e32 v5.l, vcc_lo ; encoding: [0x6a,0xbc,0x0a,0x7e]
29952995

2996-
v_rndne_f16 v5, vcc_hi
2997-
// GFX11: v_rndne_f16_e32 v5, vcc_hi ; encoding: [0x6b,0xbc,0x0a,0x7e]
2996+
v_rndne_f16 v5.l, vcc_hi
2997+
// GFX11: v_rndne_f16_e32 v5.l, vcc_hi ; encoding: [0x6b,0xbc,0x0a,0x7e]
29982998

2999-
v_rndne_f16 v5, ttmp15
3000-
// GFX11: v_rndne_f16_e32 v5, ttmp15 ; encoding: [0x7b,0xbc,0x0a,0x7e]
2999+
v_rndne_f16 v5.l, ttmp15
3000+
// GFX11: v_rndne_f16_e32 v5.l, ttmp15 ; encoding: [0x7b,0xbc,0x0a,0x7e]
30013001

3002-
v_rndne_f16 v5, m0
3003-
// GFX11: v_rndne_f16_e32 v5, m0 ; encoding: [0x7d,0xbc,0x0a,0x7e]
3002+
v_rndne_f16 v5.l, m0
3003+
// GFX11: v_rndne_f16_e32 v5.l, m0 ; encoding: [0x7d,0xbc,0x0a,0x7e]
30043004

3005-
v_rndne_f16 v5, exec_lo
3006-
// GFX11: v_rndne_f16_e32 v5, exec_lo ; encoding: [0x7e,0xbc,0x0a,0x7e]
3005+
v_rndne_f16 v5.l, exec_lo
3006+
// GFX11: v_rndne_f16_e32 v5.l, exec_lo ; encoding: [0x7e,0xbc,0x0a,0x7e]
30073007

3008-
v_rndne_f16 v5, exec_hi
3009-
// GFX11: v_rndne_f16_e32 v5, exec_hi ; encoding: [0x7f,0xbc,0x0a,0x7e]
3008+
v_rndne_f16 v5.l, exec_hi
3009+
// GFX11: v_rndne_f16_e32 v5.l, exec_hi ; encoding: [0x7f,0xbc,0x0a,0x7e]
30103010

3011-
v_rndne_f16 v5, null
3012-
// GFX11: v_rndne_f16_e32 v5, null ; encoding: [0x7c,0xbc,0x0a,0x7e]
3011+
v_rndne_f16 v5.l, null
3012+
// GFX11: v_rndne_f16_e32 v5.l, null ; encoding: [0x7c,0xbc,0x0a,0x7e]
30133013

3014-
v_rndne_f16 v5, -1
3015-
// GFX11: v_rndne_f16_e32 v5, -1 ; encoding: [0xc1,0xbc,0x0a,0x7e]
3014+
v_rndne_f16 v5.l, -1
3015+
// GFX11: v_rndne_f16_e32 v5.l, -1 ; encoding: [0xc1,0xbc,0x0a,0x7e]
30163016

3017-
v_rndne_f16 v5, 0.5
3018-
// GFX11: v_rndne_f16_e32 v5, 0.5 ; encoding: [0xf0,0xbc,0x0a,0x7e]
3017+
v_rndne_f16 v5.l, 0.5
3018+
// GFX11: v_rndne_f16_e32 v5.l, 0.5 ; encoding: [0xf0,0xbc,0x0a,0x7e]
30193019

3020-
v_rndne_f16 v5, src_scc
3021-
// GFX11: v_rndne_f16_e32 v5, src_scc ; encoding: [0xfd,0xbc,0x0a,0x7e]
3020+
v_rndne_f16 v5.l, src_scc
3021+
// GFX11: v_rndne_f16_e32 v5.l, src_scc ; encoding: [0xfd,0xbc,0x0a,0x7e]
30223022

3023-
v_rndne_f16 v127, 0xfe0b
3024-
// GFX11: v_rndne_f16_e32 v127, 0xfe0b ; encoding: [0xff,0xbc,0xfe,0x7e,0x0b,0xfe,0x00,0x00]
3023+
v_rndne_f16 v127.l, 0xfe0b
3024+
// GFX11: v_rndne_f16_e32 v127.l, 0xfe0b ; encoding: [0xff,0xbc,0xfe,0x7e,0x0b,0xfe,0x00,0x00]
3025+
3026+
v_rndne_f16 v5.l, v1.h
3027+
// GFX11: v_rndne_f16_e32 v5.l, v1.h ; encoding: [0x81,0xbd,0x0a,0x7e]
3028+
3029+
v_rndne_f16 v5.l, v127.h
3030+
// GFX11: v_rndne_f16_e32 v5.l, v127.h ; encoding: [0xff,0xbd,0x0a,0x7e]
3031+
3032+
v_rndne_f16 v127.l, 0.5
3033+
// GFX11: v_rndne_f16_e32 v127.l, 0.5 ; encoding: [0xf0,0xbc,0xfe,0x7e]
3034+
3035+
v_rndne_f16 v5.h, src_scc
3036+
// GFX11: v_rndne_f16_e32 v5.h, src_scc ; encoding: [0xfd,0xbc,0x0a,0x7f]
3037+
3038+
v_rndne_f16 v127.h, 0xfe0b
3039+
// GFX11: v_rndne_f16_e32 v127.h, 0xfe0b ; encoding: [0xff,0xbc,0xfe,0x7f,0x0b,0xfe,0x00,0x00]
30253040

30263041
v_rndne_f32 v5, v1
30273042
// GFX11: v_rndne_f32_e32 v5, v1 ; encoding: [0x01,0x47,0x0a,0x7e]

‎llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s

Lines changed: 37 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -2354,47 +2354,56 @@ v_rcp_iflag_f32 v5, v1 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
23542354
v_rcp_iflag_f32 v255, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
23552355
// GFX11: v_rcp_iflag_f32_dpp v255, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x56,0xfe,0x7f,0xff,0x6f,0x35,0x30]
23562356

2357-
v_rndne_f16 v5, v1 quad_perm:[3,2,1,0]
2358-
// GFX11: v_rndne_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2357+
v_rndne_f16 v5.l, v1.l quad_perm:[3,2,1,0]
2358+
// GFX11: v_rndne_f16_dpp v5.l, v1.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x1b,0x00,0xff]
23592359

2360-
v_rndne_f16 v5, v1 quad_perm:[0,1,2,3]
2361-
// GFX11: v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2360+
v_rndne_f16 v5.l, v1.l quad_perm:[0,1,2,3]
2361+
// GFX11: v_rndne_f16_dpp v5.l, v1.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0xe4,0x00,0xff]
23622362

2363-
v_rndne_f16 v5, v1 row_mirror
2364-
// GFX11: v_rndne_f16_dpp v5, v1 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x40,0x01,0xff]
2363+
v_rndne_f16 v5.l, v1.l row_mirror
2364+
// GFX11: v_rndne_f16_dpp v5.l, v1.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x40,0x01,0xff]
23652365

2366-
v_rndne_f16 v5, v1 row_half_mirror
2367-
// GFX11: v_rndne_f16_dpp v5, v1 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x41,0x01,0xff]
2366+
v_rndne_f16 v5.l, v1.l row_half_mirror
2367+
// GFX11: v_rndne_f16_dpp v5.l, v1.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x41,0x01,0xff]
23682368

2369-
v_rndne_f16 v5, v1 row_shl:1
2370-
// GFX11: v_rndne_f16_dpp v5, v1 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x01,0x01,0xff]
2369+
v_rndne_f16 v5.l, v1.l row_shl:1
2370+
// GFX11: v_rndne_f16_dpp v5.l, v1.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x01,0x01,0xff]
23712371

2372-
v_rndne_f16 v5, v1 row_shl:15
2373-
// GFX11: v_rndne_f16_dpp v5, v1 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2372+
v_rndne_f16 v5.l, v1.l row_shl:15
2373+
// GFX11: v_rndne_f16_dpp v5.l, v1.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x0f,0x01,0xff]
23742374

2375-
v_rndne_f16 v5, v1 row_shr:1
2376-
// GFX11: v_rndne_f16_dpp v5, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x11,0x01,0xff]
2375+
v_rndne_f16 v5.l, v1.l row_shr:1
2376+
// GFX11: v_rndne_f16_dpp v5.l, v1.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x11,0x01,0xff]
23772377

2378-
v_rndne_f16 v5, v1 row_shr:15
2379-
// GFX11: v_rndne_f16_dpp v5, v1 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2378+
v_rndne_f16 v5.l, v1.l row_shr:15
2379+
// GFX11: v_rndne_f16_dpp v5.l, v1.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x1f,0x01,0xff]
23802380

2381-
v_rndne_f16 v5, v1 row_ror:1
2382-
// GFX11: v_rndne_f16_dpp v5, v1 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x21,0x01,0xff]
2381+
v_rndne_f16 v5.l, v1.l row_ror:1
2382+
// GFX11: v_rndne_f16_dpp v5.l, v1.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x21,0x01,0xff]
23832383

2384-
v_rndne_f16 v5, v1 row_ror:15
2385-
// GFX11: v_rndne_f16_dpp v5, v1 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2384+
v_rndne_f16 v5.l, v1.l row_ror:15
2385+
// GFX11: v_rndne_f16_dpp v5.l, v1.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x2f,0x01,0xff]
23862386

2387-
v_rndne_f16 v5, v1 row_share:0 row_mask:0xf bank_mask:0xf
2388-
// GFX11: v_rndne_f16_dpp v5, v1 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x50,0x01,0xff]
2387+
v_rndne_f16 v5.l, v1.l row_share:0 row_mask:0xf bank_mask:0xf
2388+
// GFX11: v_rndne_f16_dpp v5.l, v1.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x50,0x01,0xff]
23892389

2390-
v_rndne_f16 v5, v1 row_share:15 row_mask:0x0 bank_mask:0x1
2391-
// GFX11: v_rndne_f16_dpp v5, v1 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x5f,0x01,0x01]
2390+
v_rndne_f16 v5.l, v1.l row_share:15 row_mask:0x0 bank_mask:0x1
2391+
// GFX11: v_rndne_f16_dpp v5.l, v1.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x5f,0x01,0x01]
23922392

2393-
v_rndne_f16 v5, v1 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
2394-
// GFX11: v_rndne_f16_dpp v5, v1 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x60,0x09,0x13]
2393+
v_rndne_f16 v5.l, v1.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
2394+
// GFX11: v_rndne_f16_dpp v5.l, v1.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x60,0x09,0x13]
23952395

2396-
v_rndne_f16 v127, -|v127| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
2397-
// GFX11: v_rndne_f16_dpp v127, -|v127| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xbc,0xfe,0x7e,0x7f,0x6f,0x35,0x30]
2396+
v_rndne_f16 v127.l, -|v127.l| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
2397+
// GFX11: v_rndne_f16_dpp v127.l, -|v127.l| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xbc,0xfe,0x7e,0x7f,0x6f,0x35,0x30]
2398+
2399+
v_rndne_f16 v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
2400+
// GFX11: v_rndne_f16_dpp v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xbc,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
2401+
2402+
v_rndne_f16 v5.h, v1.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
2403+
// GFX11: v_rndne_f16_dpp v5.h, v1.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0xbc,0x0a,0x7f,0x81,0x60,0x09,0x13]
2404+
2405+
v_rndne_f16 v127.h, -|v127.h| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
2406+
// GFX11: v_rndne_f16_dpp v127.h, -|v127.h| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xbc,0xfe,0x7f,0xff,0x6f,0x35,0x30]
23982407

23992408
v_rndne_f32 v5, v1 quad_perm:[3,2,1,0]
24002409
// GFX11: v_rndne_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x46,0x0a,0x7e,0x01,0x1b,0x00,0xff]

‎llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s

Lines changed: 15 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -548,14 +548,23 @@ v_rcp_iflag_f32 v5, v1 dpp8:[7,6,5,4,3,2,1,0] fi:1
548548
v_rcp_iflag_f32 v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
549549
// GFX11: v_rcp_iflag_f32_dpp v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0x56,0xfe,0x7f,0xff,0x00,0x00,0x00]
550550

551-
v_rndne_f16 v5, v1 dpp8:[7,6,5,4,3,2,1,0]
552-
// GFX11: v_rndne_f16_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xbc,0x0a,0x7e,0x01,0x77,0x39,0x05]
551+
v_rndne_f16 v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0]
552+
// GFX11: v_rndne_f16_dpp v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xbc,0x0a,0x7e,0x01,0x77,0x39,0x05]
553553

554-
v_rndne_f16 v5, v1 dpp8:[7,6,5,4,3,2,1,0] fi:1
555-
// GFX11: v_rndne_f16_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0xbc,0x0a,0x7e,0x01,0x77,0x39,0x05]
554+
v_rndne_f16 v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0] fi:1
555+
// GFX11: v_rndne_f16_dpp v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0xbc,0x0a,0x7e,0x01,0x77,0x39,0x05]
556556

557-
v_rndne_f16 v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
558-
// GFX11: v_rndne_f16_dpp v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xbc,0xfe,0x7e,0x7f,0x00,0x00,0x00]
557+
v_rndne_f16 v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
558+
// GFX11: v_rndne_f16_dpp v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xbc,0xfe,0x7e,0x7f,0x00,0x00,0x00]
559+
560+
v_rndne_f16 v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
561+
// GFX11: v_rndne_f16_dpp v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xbc,0xfe,0x7e,0x7f,0x77,0x39,0x05]
562+
563+
v_rndne_f16 v5.h, v1.h dpp8:[7,6,5,4,3,2,1,0] fi:1
564+
// GFX11: v_rndne_f16_dpp v5.h, v1.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0xbc,0x0a,0x7f,0x81,0x77,0x39,0x05]
565+
566+
v_rndne_f16 v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
567+
// GFX11: v_rndne_f16_dpp v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xbc,0xfe,0x7f,0xff,0x00,0x00,0x00]
559568

560569
v_rndne_f32 v5, v1 dpp8:[7,6,5,4,3,2,1,0]
561570
// GFX11: v_rndne_f32_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x46,0x0a,0x7e,0x01,0x77,0x39,0x05]

‎llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s

Lines changed: 42 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -647,6 +647,12 @@ v_rcp_f16_e32 v5.l, v199.l quad_perm:[3,2,1,0]
647647
v_rndne_f16_e32 v128, 0xfe0b
648648
// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
649649

650+
v_rndne_f16_e32 v128.h, 0xfe0b
651+
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
652+
653+
v_rndne_f16_e32 v128.l, 0xfe0b
654+
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
655+
650656
v_rndne_f16_e32 v255, v1
651657
// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
652658

@@ -656,6 +662,24 @@ v_rndne_f16_e32 v255, v1 dpp8:[7,6,5,4,3,2,1,0]
656662
v_rndne_f16_e32 v255, v1 quad_perm:[3,2,1,0]
657663
// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
658664

665+
v_rndne_f16_e32 v255.h, v1.h
666+
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
667+
668+
v_rndne_f16_e32 v255.h, v1.h dpp8:[7,6,5,4,3,2,1,0]
669+
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
670+
671+
v_rndne_f16_e32 v255.h, v1.h quad_perm:[3,2,1,0]
672+
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
673+
674+
v_rndne_f16_e32 v255.l, v1.l
675+
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
676+
677+
v_rndne_f16_e32 v255.l, v1.l dpp8:[7,6,5,4,3,2,1,0]
678+
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
679+
680+
v_rndne_f16_e32 v255.l, v1.l quad_perm:[3,2,1,0]
681+
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
682+
659683
v_rndne_f16_e32 v5, v199
660684
// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
661685

@@ -665,6 +689,24 @@ v_rndne_f16_e32 v5, v199 dpp8:[7,6,5,4,3,2,1,0]
665689
v_rndne_f16_e32 v5, v199 quad_perm:[3,2,1,0]
666690
// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
667691

692+
v_rndne_f16_e32 v5.h, v199.h
693+
// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
694+
695+
v_rndne_f16_e32 v5.h, v199.h dpp8:[7,6,5,4,3,2,1,0]
696+
// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
697+
698+
v_rndne_f16_e32 v5.h, v199.h quad_perm:[3,2,1,0]
699+
// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
700+
701+
v_rndne_f16_e32 v5.l, v199.l
702+
// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
703+
704+
v_rndne_f16_e32 v5.l, v199.l dpp8:[7,6,5,4,3,2,1,0]
705+
// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
706+
707+
v_rndne_f16_e32 v5.l, v199.l quad_perm:[3,2,1,0]
708+
// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
709+
668710
v_rsq_f16_e32 v128.h, 0xfe0b
669711
// GFX11: :[[@LINE-1]]:15: error: invalid operand for instruction
670712

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