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[RISCV][TTI] Add shuffle costing for masked slide lowering (#128537)
This change adds the TTI costing corresponding to the recently added isMaskedSlidePair lowering for vector shuffles. However, since the existing costing code hadn't covered either slideup, slidedown, or the (now removed) isElementRotate, the impact is larger in scope than just that new lowering. --------- Co-authored-by: Alexey Bataev <[email protected]> Co-authored-by: Luke Lau <[email protected]>
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10 files changed

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llvm/include/llvm/Analysis/VectorUtils.h

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -203,6 +203,15 @@ bool getShuffleDemandedElts(int SrcWidth, ArrayRef<int> Mask,
203203
const APInt &DemandedElts, APInt &DemandedLHS,
204204
APInt &DemandedRHS, bool AllowUndefElts = false);
205205

206+
/// Does this shuffle mask represent either one slide shuffle or a pair of
207+
/// two slide shuffles, combined with a select on some constant vector mask?
208+
/// A slide is a shuffle mask which shifts some set of elements up or down
209+
/// the vector, with all other elements being undefined. An identity shuffle
210+
/// will be matched a slide by 0. The output parameter provides the source
211+
/// (-1 means no source), and slide direction for each slide.
212+
bool isMaskedSlidePair(ArrayRef<int> Mask, int NumElts,
213+
std::array<std::pair<int, int>, 2> &SrcInfo);
214+
206215
/// Replace each shuffle mask index with the scaled sequential indices for an
207216
/// equivalent mask of narrowed elements. Mask elements that are less than 0
208217
/// (sentinel values) are repeated in the output mask.

llvm/lib/Analysis/VectorUtils.cpp

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -415,6 +415,36 @@ bool llvm::getShuffleDemandedElts(int SrcWidth, ArrayRef<int> Mask,
415415
return true;
416416
}
417417

418+
bool llvm::isMaskedSlidePair(ArrayRef<int> Mask, int NumElts,
419+
std::array<std::pair<int, int>, 2> &SrcInfo) {
420+
const int SignalValue = NumElts * 2;
421+
SrcInfo[0] = {-1, SignalValue};
422+
SrcInfo[1] = {-1, SignalValue};
423+
for (auto [i, M] : enumerate(Mask)) {
424+
if (M < 0)
425+
continue;
426+
int Src = M >= (int)NumElts;
427+
int Diff = (int)i - (M % NumElts);
428+
bool Match = false;
429+
for (int j = 0; j < 2; j++) {
430+
auto &[SrcE, DiffE] = SrcInfo[j];
431+
if (SrcE == -1) {
432+
assert(DiffE == SignalValue);
433+
SrcE = Src;
434+
DiffE = Diff;
435+
}
436+
if (SrcE == Src && DiffE == Diff) {
437+
Match = true;
438+
break;
439+
}
440+
}
441+
if (!Match)
442+
return false;
443+
}
444+
assert(SrcInfo[0].first != -1 && "Must find one slide");
445+
return true;
446+
}
447+
418448
void llvm::narrowShuffleMaskElts(int Scale, ArrayRef<int> Mask,
419449
SmallVectorImpl<int> &ScaledMask) {
420450
assert(Scale > 0 && "Unexpected scaling factor");

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 10 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -4562,32 +4562,9 @@ static bool isInterleaveShuffle(ArrayRef<int> Mask, MVT VT, int &EvenSrc,
45624562

45634563
/// Is this mask representing a masked combination of two slides?
45644564
static bool isMaskedSlidePair(ArrayRef<int> Mask,
4565-
std::pair<int, int> SrcInfo[2]) {
4566-
int NumElts = Mask.size();
4567-
int SignalValue = NumElts * 2;
4568-
SrcInfo[0] = {-1, SignalValue};
4569-
SrcInfo[1] = {-1, SignalValue};
4570-
for (unsigned i = 0; i != Mask.size(); ++i) {
4571-
int M = Mask[i];
4572-
if (M < 0)
4573-
continue;
4574-
int Src = M >= (int)NumElts;
4575-
int Diff = (int)i - (M % NumElts);
4576-
bool Match = false;
4577-
for (int j = 0; j < 2; j++) {
4578-
if (SrcInfo[j].first == -1) {
4579-
assert(SrcInfo[j].second == SignalValue);
4580-
SrcInfo[j].first = Src;
4581-
SrcInfo[j].second = Diff;
4582-
}
4583-
if (SrcInfo[j].first == Src && SrcInfo[j].second == Diff) {
4584-
Match = true;
4585-
break;
4586-
}
4587-
}
4588-
if (!Match)
4589-
return false;
4590-
}
4565+
std::array<std::pair<int, int>, 2> &SrcInfo) {
4566+
if (!llvm::isMaskedSlidePair(Mask, Mask.size(), SrcInfo))
4567+
return false;
45914568

45924569
// Avoid matching vselect idioms
45934570
if (SrcInfo[0].second == 0 && SrcInfo[1].second == 0)
@@ -4603,7 +4580,8 @@ static bool isMaskedSlidePair(ArrayRef<int> Mask,
46034580

46044581
// Exactly matches the semantics of a previously existing custom matcher
46054582
// to allow migration to new matcher without changing output.
4606-
static bool isElementRotate(std::pair<int, int> SrcInfo[2], unsigned NumElts) {
4583+
static bool isElementRotate(std::array<std::pair<int, int>, 2> &SrcInfo,
4584+
unsigned NumElts) {
46074585
if (SrcInfo[1].first == -1)
46084586
return true;
46094587
return SrcInfo[0].second < 0 && SrcInfo[1].second > 0 &&
@@ -5604,10 +5582,10 @@ static SDValue lowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG,
56045582
// without masking. Avoid matching bit rotates (which are not also element
56055583
// rotates) as slide pairs. This is a performance heuristic, not a
56065584
// functional check.
5607-
std::pair<int, int> SrcInfo[2];
5585+
std::array<std::pair<int, int>, 2> SrcInfo;
56085586
unsigned RotateAmt;
56095587
MVT RotateVT;
5610-
if (isMaskedSlidePair(Mask, SrcInfo) &&
5588+
if (::isMaskedSlidePair(Mask, SrcInfo) &&
56115589
(isElementRotate(SrcInfo, NumElts) ||
56125590
!isLegalBitRotate(Mask, VT, Subtarget, RotateVT, RotateAmt))) {
56135591
SDValue Sources[2];
@@ -5964,10 +5942,11 @@ bool RISCVTargetLowering::isShuffleMaskLegal(ArrayRef<int> M, EVT VT) const {
59645942
if (SVT.getScalarType() == MVT::i1)
59655943
return false;
59665944

5967-
std::pair<int, int> SrcInfo[2];
5945+
std::array<std::pair<int, int>, 2> SrcInfo;
59685946
int Dummy1, Dummy2;
59695947
return ShuffleVectorInst::isReverseMask(M, NumElts) ||
5970-
(isMaskedSlidePair(M, SrcInfo) && isElementRotate(SrcInfo, NumElts)) ||
5948+
(::isMaskedSlidePair(M, SrcInfo) &&
5949+
isElementRotate(SrcInfo, NumElts)) ||
59715950
isInterleaveShuffle(M, SVT, Dummy1, Dummy2, Subtarget);
59725951
}
59735952

llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp

Lines changed: 70 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -475,6 +475,64 @@ costShuffleViaVRegSplitting(RISCVTTIImpl &TTI, MVT LegalVT,
475475
return InstructionCost::getInvalid();
476476
}
477477

478+
InstructionCost RISCVTTIImpl::getSlideCost(FixedVectorType *Tp,
479+
ArrayRef<int> Mask,
480+
TTI::TargetCostKind CostKind) {
481+
// Avoid missing masks and length changing shuffles
482+
if (Mask.size() <= 2 || Mask.size() != Tp->getNumElements())
483+
return InstructionCost::getInvalid();
484+
485+
int NumElts = Tp->getNumElements();
486+
std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Tp);
487+
// Avoid scalarization cases
488+
if (!LT.second.isFixedLengthVector())
489+
return InstructionCost::getInvalid();
490+
491+
// Requires moving elements between parts, which requires additional
492+
// unmodeled instructions.
493+
if (LT.first != 1)
494+
return InstructionCost::getInvalid();
495+
496+
auto GetSlideOpcode = [&](int SlideAmt) {
497+
assert(SlideAmt != 0);
498+
bool IsVI = isUInt<5>(std::abs(SlideAmt));
499+
if (SlideAmt < 0)
500+
return IsVI ? RISCV::VSLIDEDOWN_VI : RISCV::VSLIDEDOWN_VX;
501+
return IsVI ? RISCV::VSLIDEUP_VI : RISCV::VSLIDEUP_VX;
502+
};
503+
504+
std::array<std::pair<int, int>, 2> SrcInfo;
505+
if (!isMaskedSlidePair(Mask, NumElts, SrcInfo))
506+
return InstructionCost::getInvalid();
507+
508+
if (SrcInfo[1].second == 0)
509+
std::swap(SrcInfo[0], SrcInfo[1]);
510+
511+
InstructionCost FirstSlideCost = 0;
512+
if (SrcInfo[0].second != 0) {
513+
unsigned Opcode = GetSlideOpcode(SrcInfo[0].second);
514+
FirstSlideCost = getRISCVInstructionCost(Opcode, LT.second, CostKind);
515+
}
516+
517+
if (SrcInfo[1].first == -1)
518+
return FirstSlideCost;
519+
520+
InstructionCost SecondSlideCost = 0;
521+
if (SrcInfo[1].second != 0) {
522+
unsigned Opcode = GetSlideOpcode(SrcInfo[1].second);
523+
SecondSlideCost = getRISCVInstructionCost(Opcode, LT.second, CostKind);
524+
} else {
525+
SecondSlideCost =
526+
getRISCVInstructionCost(RISCV::VMERGE_VVM, LT.second, CostKind);
527+
}
528+
529+
auto EC = Tp->getElementCount();
530+
VectorType *MaskTy =
531+
VectorType::get(IntegerType::getInt1Ty(Tp->getContext()), EC);
532+
InstructionCost MaskCost = getConstantPoolLoadCost(MaskTy, CostKind);
533+
return FirstSlideCost + SecondSlideCost + MaskCost;
534+
}
535+
478536
InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind,
479537
VectorType *Tp, ArrayRef<int> Mask,
480538
TTI::TargetCostKind CostKind,
@@ -487,8 +545,8 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind,
487545
// First, handle cases where having a fixed length vector enables us to
488546
// give a more accurate cost than falling back to generic scalable codegen.
489547
// TODO: Each of these cases hints at a modeling gap around scalable vectors.
490-
if (ST->hasVInstructions() && isa<FixedVectorType>(Tp) &&
491-
LT.second.isFixedLengthVector()) {
548+
if (auto *FVTp = dyn_cast<FixedVectorType>(Tp);
549+
FVTp && ST->hasVInstructions() && LT.second.isFixedLengthVector()) {
492550
InstructionCost VRegSplittingCost = costShuffleViaVRegSplitting(
493551
*this, LT.second, ST->getRealVLen(), Tp, Mask, CostKind);
494552
if (VRegSplittingCost.isValid())
@@ -544,6 +602,11 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind,
544602
return Cost;
545603
}
546604
}
605+
606+
if (InstructionCost SlideCost = getSlideCost(FVTp, Mask, CostKind);
607+
SlideCost.isValid())
608+
return SlideCost;
609+
547610
// vrgather + cost of generating the mask constant.
548611
// We model this for an unknown mask with a single vrgather.
549612
if (LT.first == 1 && (LT.second.getScalarSizeInBits() != 8 ||
@@ -558,6 +621,11 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind,
558621
}
559622
case TTI::SK_Transpose:
560623
case TTI::SK_PermuteTwoSrc: {
624+
625+
if (InstructionCost SlideCost = getSlideCost(FVTp, Mask, CostKind);
626+
SlideCost.isValid())
627+
return SlideCost;
628+
561629
// 2 x (vrgather + cost of generating the mask constant) + cost of mask
562630
// register for the second vrgather. We model this for an unknown
563631
// (shuffle) mask.

llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -63,6 +63,12 @@ class RISCVTTIImpl : public BasicTTIImplBase<RISCVTTIImpl> {
6363
/// type.
6464
InstructionCost getConstantPoolLoadCost(Type *Ty,
6565
TTI::TargetCostKind CostKind);
66+
67+
/// If this shuffle can be lowered as a masked slide pair (at worst),
68+
/// return a cost for it.
69+
InstructionCost getSlideCost(FixedVectorType *Tp, ArrayRef<int> Mask,
70+
TTI::TargetCostKind CostKind);
71+
6672
public:
6773
explicit RISCVTTIImpl(const RISCVTargetMachine *TM, const Function &F)
6874
: BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),

llvm/test/Analysis/CostModel/RISCV/shuffle-exact-vlen.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -186,7 +186,7 @@ define void @insert_subvec() vscale_range(2,2) {
186186
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %v16i32_4_1 = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
187187
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %v16i32_4_2 = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 12, i32 13, i32 14, i32 15>
188188
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %v16i32_4_3 = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
189-
; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i32_4_05 = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
189+
; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v16i32_4_05 = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
190190
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
191191
;
192192
; CHECK-SIZE-LABEL: 'insert_subvec'
@@ -225,7 +225,7 @@ define void @insert_subvec() vscale_range(2,2) {
225225
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %v16i32_4_1 = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
226226
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %v16i32_4_2 = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 12, i32 13, i32 14, i32 15>
227227
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %v16i32_4_3 = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
228-
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i32_4_05 = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
228+
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v16i32_4_05 = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
229229
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
230230
;
231231
%v4i8_2_0 = shufflevector <4 x i8> poison, <4 x i8> poison, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
@@ -737,8 +737,8 @@ define void @multipart() vscale_range(2,2) {
737737
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16b = shufflevector <8 x i16> poison, <8 x i16> poison, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
738738
; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16c = shufflevector <16 x i16> poison, <16 x i16> poison, <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
739739
; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16d = shufflevector <16 x i16> poison, <16 x i16> poison, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
740-
; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32a = shufflevector <4 x i32> poison, <4 x i32> poison, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
741-
; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v32a4 = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1>
740+
; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32a = shufflevector <4 x i32> poison, <4 x i32> poison, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
741+
; CHECK-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %v32a4 = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1>
742742
; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32idrev = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 15, i32 14, i32 13, i32 12, i32 16, i32 17, i32 18, i32 19, i32 31, i32 30, i32 29, i32 28>
743743
; CHECK-NEXT: Cost Model: Found an estimated cost of 47 for instruction: %v32many = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 0, i32 4, i32 8, i32 12, i32 16, i32 20, i32 24, i32 28, i32 2, i32 6, i32 10, i32 14, i32 18, i32 22, i32 26, i32 30>
744744
; CHECK-NEXT: Cost Model: Found an estimated cost of 47 for instruction: %v32many2 = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 1, i32 4, i32 8, i32 12, i32 17, i32 20, i32 24, i32 28, i32 2, i32 6, i32 11, i32 14, i32 18, i32 22, i32 27, i32 30>
@@ -757,8 +757,8 @@ define void @multipart() vscale_range(2,2) {
757757
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16b = shufflevector <8 x i16> poison, <8 x i16> poison, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
758758
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16c = shufflevector <16 x i16> poison, <16 x i16> poison, <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
759759
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16d = shufflevector <16 x i16> poison, <16 x i16> poison, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
760-
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32a = shufflevector <4 x i32> poison, <4 x i32> poison, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
761-
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v32a4 = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1>
760+
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32a = shufflevector <4 x i32> poison, <4 x i32> poison, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
761+
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %v32a4 = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1>
762762
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32idrev = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 15, i32 14, i32 13, i32 12, i32 16, i32 17, i32 18, i32 19, i32 31, i32 30, i32 29, i32 28>
763763
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v32many = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 0, i32 4, i32 8, i32 12, i32 16, i32 20, i32 24, i32 28, i32 2, i32 6, i32 10, i32 14, i32 18, i32 22, i32 26, i32 30>
764764
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v32many2 = shufflevector <16 x i32> poison, <16 x i32> poison, <16 x i32> <i32 1, i32 4, i32 8, i32 12, i32 17, i32 20, i32 24, i32 28, i32 2, i32 6, i32 11, i32 14, i32 18, i32 22, i32 27, i32 30>

llvm/test/Analysis/CostModel/RISCV/shuffle-extract_subvector.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ define void @test_vXf64(<4 x double> %src256, <8 x double> %src512) {
1919
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V512_0123 = shufflevector <8 x double> %src512, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
2020
; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512_2345 = shufflevector <8 x double> %src512, <8 x double> undef, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
2121
; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512_4567 = shufflevector <8 x double> %src512, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
22-
; CHECK-NEXT: Cost Model: Found an estimated cost of 19 for instruction: %V512_567u = shufflevector <8 x double> %src512, <8 x double> undef, <4 x i32> <i32 5, i32 6, i32 7, i32 poison>
22+
; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512_567u = shufflevector <8 x double> %src512, <8 x double> undef, <4 x i32> <i32 5, i32 6, i32 7, i32 poison>
2323
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
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;
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; VLEN128-LABEL: 'test_vXf64'

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