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[PowerPC] Fix behavior of rldimi/rlwimi/rlwnm builtins
rldimi is 64-bit instruction, so the corresponding builtin should not be available in 32-bit mode. Rotate amount should be in range and cases when mask is zero needs special handling. This change also swaps the first and second operands of rldimi/rlwimi to match previous behavior. For masks not ending at bit 63-SH, rotation will be inserted before rldimi.
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5 files changed

+54
-18
lines changed

5 files changed

+54
-18
lines changed

‎clang/lib/Sema/SemaChecking.cpp

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4992,6 +4992,7 @@ static bool isPPC_64Builtin(unsigned BuiltinID) {
49924992
case PPC::BI__builtin_ppc_fetch_and_andlp:
49934993
case PPC::BI__builtin_ppc_fetch_and_orlp:
49944994
case PPC::BI__builtin_ppc_fetch_and_swaplp:
4995+
case PPC::BI__builtin_ppc_rldimi:
49954996
return true;
49964997
}
49974998
return false;
@@ -5093,8 +5094,10 @@ bool Sema::CheckPPCBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
50935094
case PPC::BI__builtin_ppc_rlwnm:
50945095
return SemaValueIsRunOfOnes(TheCall, 2);
50955096
case PPC::BI__builtin_ppc_rlwimi:
5097+
return SemaBuiltinConstantArgRange(TheCall, 2, 0, 31) ||
5098+
SemaValueIsRunOfOnes(TheCall, 3);
50965099
case PPC::BI__builtin_ppc_rldimi:
5097-
return SemaBuiltinConstantArg(TheCall, 2, Result) ||
5100+
return SemaBuiltinConstantArgRange(TheCall, 2, 0, 63) ||
50985101
SemaValueIsRunOfOnes(TheCall, 3);
50995102
case PPC::BI__builtin_ppc_addex: {
51005103
if (SemaBuiltinConstantArgRange(TheCall, 2, 0, 3))

‎clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-error.c

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,13 +24,16 @@ void test_trap(void) {
2424
__tw(ia, ib, 0); //expected-error {{argument value 0 is outside the valid range [1, 31]}}
2525
}
2626

27+
#ifdef __PPC64__
2728
void test_builtin_ppc_rldimi() {
2829
unsigned int shift;
2930
unsigned long long mask;
3031
unsigned long long res = __builtin_ppc_rldimi(ull, ull, shift, 7); // expected-error {{argument to '__builtin_ppc_rldimi' must be a constant integer}}
3132
res = __builtin_ppc_rldimi(ull, ull, 63, mask); // expected-error {{argument to '__builtin_ppc_rldimi' must be a constant integer}}
3233
res = __builtin_ppc_rldimi(ull, ull, 63, 0xFFFF000000000F00); // expected-error {{argument 3 value should represent a contiguous bit field}}
34+
res = __builtin_ppc_rldimi(ull, ull, 64, 0xFFFF000000000000); // expected-error {{argument value 64 is outside the valid range [0, 63]}}
3335
}
36+
#endif
3437

3538
void test_builtin_ppc_rlwimi() {
3639
unsigned int shift;
@@ -83,6 +86,10 @@ void testalignx(const void *pointer, unsigned int alignment) {
8386
}
8487

8588
#ifndef __PPC64__
89+
unsigned long long testrldimi32() {
90+
return __rldimi(ull, ui, 3, 0x7ffff8ULL); //expected-error {{this builtin is only available on 64-bit targets}}
91+
}
92+
8693
long long testbpermd(long long bit_selector, long long source) {
8794
return __bpermd(bit_selector, source); //expected-error {{this builtin is only available on 64-bit targets}}
8895
}

‎clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-rotate.c

Lines changed: 13 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,10 @@
11
// REQUIRES: powerpc-registered-target
22
// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu \
3-
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
3+
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s \
4+
// RUN: -check-prefixes=PPC64,CHECK
45
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu \
5-
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
6+
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s \
7+
// RUN: -check-prefixes=PPC64,CHECK
68
// RUN: %clang_cc1 -triple powerpc-unknown-aix \
79
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
810
// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
@@ -11,18 +13,20 @@
1113
extern unsigned int ui;
1214
extern unsigned long long ull;
1315

16+
#ifdef __PPC64__
1417
void test_builtin_ppc_rldimi() {
15-
// CHECK-LABEL: test_builtin_ppc_rldimi
16-
// CHECK: %res = alloca i64, align 8
17-
// CHECK-NEXT: [[RA:%[0-9]+]] = load i64, ptr @ull, align 8
18-
// CHECK-NEXT: [[RB:%[0-9]+]] = load i64, ptr @ull, align 8
19-
// CHECK-NEXT: [[RC:%[0-9]+]] = call i64 @llvm.ppc.rldimi(i64 [[RA]], i64 [[RB]], i32 63, i64 72057593769492480)
20-
// CHECK-NEXT: store i64 [[RC]], ptr %res, align 8
21-
// CHECK-NEXT: ret void
18+
// PPC64-LABEL: test_builtin_ppc_rldimi
19+
// PPC64: %res = alloca i64, align 8
20+
// PPC64-NEXT: [[RA:%[0-9]+]] = load i64, ptr @ull, align 8
21+
// PPC64-NEXT: [[RB:%[0-9]+]] = load i64, ptr @ull, align 8
22+
// PPC64-NEXT: [[RC:%[0-9]+]] = call i64 @llvm.ppc.rldimi(i64 [[RA]], i64 [[RB]], i32 63, i64 72057593769492480)
23+
// PPC64-NEXT: store i64 [[RC]], ptr %res, align 8
24+
// PPC64-NEXT: ret void
2225

2326
/*shift = 63, mask = 0x00FFFFFFF0000000 = 72057593769492480, ~mask = 0xFF0000000FFFFFFF = -72057593769492481*/
2427
unsigned long long res = __builtin_ppc_rldimi(ull, ull, 63, 0x00FFFFFFF0000000);
2528
}
29+
#endif
2630

2731
void test_builtin_ppc_rlwimi() {
2832
// CHECK-LABEL: test_builtin_ppc_rlwimi

‎llvm/lib/Target/PowerPC/PPCISelLowering.cpp

Lines changed: 28 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -10764,30 +10764,51 @@ SDValue PPCTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
1076410764
return DAG.getRegister(PPC::R2, MVT::i32);
1076510765

1076610766
case Intrinsic::ppc_rldimi: {
10767+
assert(Subtarget.isPPC64() && "rldimi is only available in 64-bit!");
10768+
if (Op.getConstantOperandVal(4) == 0)
10769+
return Op.getOperand(2);
1076710770
uint64_t SH = Op.getConstantOperandVal(3);
1076810771
unsigned MB = 0, ME = 0;
10769-
if (!isRunOfOnes64(Op.getConstantOperandVal(4), MB, ME) || ME != 63 - SH)
10772+
if (!isRunOfOnes64(Op.getConstantOperandVal(4), MB, ME))
1077010773
report_fatal_error("invalid rldimi mask!");
10771-
return SDValue(DAG.getMachineNode(
10772-
PPC::RLDIMI, dl, MVT::i64,
10773-
{Op.getOperand(1), Op.getOperand(2), Op.getOperand(3),
10774-
DAG.getTargetConstant(MB, dl, MVT::i32)}),
10775-
0);
10774+
10775+
// For all-one mask, MB will be set to 0, adjust it next to 63-SH.
10776+
if (MB == 0 && ME == 63 && SH != 0)
10777+
MB = 64 - SH;
10778+
SDValue Src = Op.getOperand(1);
10779+
// rldimi requires ME=63-SH, otherwise rotation is needed before rldimi.
10780+
if (ME < 63 - SH) {
10781+
Src = DAG.getNode(ISD::ROTL, dl, MVT::i64, Src,
10782+
DAG.getConstant(ME + SH + 1, dl, MVT::i32));
10783+
} else if (ME > 63 - SH) {
10784+
Src = DAG.getNode(ISD::ROTL, dl, MVT::i64, Src,
10785+
DAG.getConstant(ME + SH - 63, dl, MVT::i32));
10786+
}
10787+
return SDValue(
10788+
DAG.getMachineNode(PPC::RLDIMI, dl, MVT::i64,
10789+
{Op.getOperand(2), Src,
10790+
DAG.getTargetConstant(63 - ME, dl, MVT::i32),
10791+
DAG.getTargetConstant(MB, dl, MVT::i32)}),
10792+
0);
1077610793
}
1077710794

1077810795
case Intrinsic::ppc_rlwimi: {
10796+
if (Op.getConstantOperandVal(4) == 0)
10797+
return Op.getOperand(2);
1077910798
unsigned MB = 0, ME = 0;
1078010799
if (!isRunOfOnes(Op.getConstantOperandVal(4), MB, ME))
1078110800
report_fatal_error("invalid rlwimi mask!");
1078210801
return SDValue(DAG.getMachineNode(
1078310802
PPC::RLWIMI, dl, MVT::i32,
10784-
{Op.getOperand(1), Op.getOperand(2), Op.getOperand(3),
10803+
{Op.getOperand(2), Op.getOperand(1), Op.getOperand(3),
1078510804
DAG.getTargetConstant(MB, dl, MVT::i32),
1078610805
DAG.getTargetConstant(ME, dl, MVT::i32)}),
1078710806
0);
1078810807
}
1078910808

1079010809
case Intrinsic::ppc_rlwnm: {
10810+
if (Op.getConstantOperandVal(3) == 0)
10811+
return DAG.getConstant(0, dl, MVT::i32);
1079110812
unsigned MB = 0, ME = 0;
1079210813
if (!isRunOfOnes(Op.getConstantOperandVal(3), MB, ME))
1079310814
report_fatal_error("invalid rlwnm mask!");

‎llvm/test/CodeGen/PowerPC/rlwimi.ll

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -107,7 +107,8 @@ entry:
107107
define i32 @test9(i32 %a, i32 %b) {
108108
; CHECK-LABEL: test9:
109109
; CHECK: # %bb.0: # %entry
110-
; CHECK-NEXT: rlwimi 3, 4, 8, 20, 26
110+
; CHECK-NEXT: rlwimi 4, 3, 8, 20, 26
111+
; CHECK-NEXT: mr 3, 4
111112
; CHECK-NEXT: blr
112113
entry:
113114
%r = call i32 @llvm.ppc.rlwimi(i32 %a, i32 %b, i32 8, i32 4064)

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