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Update tests
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-3501
lines changed

12 files changed

+2820
-3501
lines changed

‎llvm/test/CodeGen/ARM/scmp.ll

Lines changed: 48 additions & 64 deletions
Original file line numberDiff line numberDiff line change
@@ -4,14 +4,12 @@
44
define i8 @scmp_8_8(i8 signext %x, i8 signext %y) nounwind {
55
; CHECK-LABEL: scmp_8_8:
66
; CHECK: @ %bb.0:
7-
; CHECK-NEXT: mov r2, #0
87
; CHECK-NEXT: cmp r0, r1
8+
; CHECK-NEXT: mov r0, #0
9+
; CHECK-NEXT: mov r2, #0
10+
; CHECK-NEXT: movwlt r0, #1
911
; CHECK-NEXT: movwgt r2, #1
10-
; CHECK-NEXT: cmp r2, #0
11-
; CHECK-NEXT: movwne r2, #1
12-
; CHECK-NEXT: cmp r0, r1
13-
; CHECK-NEXT: mvnlt r2, #0
14-
; CHECK-NEXT: mov r0, r2
12+
; CHECK-NEXT: sub r0, r2, r0
1513
; CHECK-NEXT: bx lr
1614
%1 = call i8 @llvm.scmp(i8 %x, i8 %y)
1715
ret i8 %1
@@ -20,14 +18,12 @@ define i8 @scmp_8_8(i8 signext %x, i8 signext %y) nounwind {
2018
define i8 @scmp_8_16(i16 signext %x, i16 signext %y) nounwind {
2119
; CHECK-LABEL: scmp_8_16:
2220
; CHECK: @ %bb.0:
23-
; CHECK-NEXT: mov r2, #0
2421
; CHECK-NEXT: cmp r0, r1
22+
; CHECK-NEXT: mov r0, #0
23+
; CHECK-NEXT: mov r2, #0
24+
; CHECK-NEXT: movwlt r0, #1
2525
; CHECK-NEXT: movwgt r2, #1
26-
; CHECK-NEXT: cmp r2, #0
27-
; CHECK-NEXT: movwne r2, #1
28-
; CHECK-NEXT: cmp r0, r1
29-
; CHECK-NEXT: mvnlt r2, #0
30-
; CHECK-NEXT: mov r0, r2
26+
; CHECK-NEXT: sub r0, r2, r0
3127
; CHECK-NEXT: bx lr
3228
%1 = call i8 @llvm.scmp(i16 %x, i16 %y)
3329
ret i8 %1
@@ -36,14 +32,12 @@ define i8 @scmp_8_16(i16 signext %x, i16 signext %y) nounwind {
3632
define i8 @scmp_8_32(i32 %x, i32 %y) nounwind {
3733
; CHECK-LABEL: scmp_8_32:
3834
; CHECK: @ %bb.0:
39-
; CHECK-NEXT: mov r2, #0
4035
; CHECK-NEXT: cmp r0, r1
36+
; CHECK-NEXT: mov r0, #0
37+
; CHECK-NEXT: mov r2, #0
38+
; CHECK-NEXT: movwlt r0, #1
4139
; CHECK-NEXT: movwgt r2, #1
42-
; CHECK-NEXT: cmp r2, #0
43-
; CHECK-NEXT: movwne r2, #1
44-
; CHECK-NEXT: cmp r0, r1
45-
; CHECK-NEXT: mvnlt r2, #0
46-
; CHECK-NEXT: mov r0, r2
40+
; CHECK-NEXT: sub r0, r2, r0
4741
; CHECK-NEXT: bx lr
4842
%1 = call i8 @llvm.scmp(i32 %x, i32 %y)
4943
ret i8 %1
@@ -54,16 +48,15 @@ define i8 @scmp_8_64(i64 %x, i64 %y) nounwind {
5448
; CHECK: @ %bb.0:
5549
; CHECK-NEXT: .save {r11, lr}
5650
; CHECK-NEXT: push {r11, lr}
57-
; CHECK-NEXT: subs lr, r2, r0
51+
; CHECK-NEXT: subs lr, r0, r2
5852
; CHECK-NEXT: mov r12, #0
59-
; CHECK-NEXT: sbcs lr, r3, r1
53+
; CHECK-NEXT: sbcs lr, r1, r3
54+
; CHECK-NEXT: mov lr, #0
55+
; CHECK-NEXT: movwlt lr, #1
56+
; CHECK-NEXT: subs r0, r2, r0
57+
; CHECK-NEXT: sbcs r0, r3, r1
6058
; CHECK-NEXT: movwlt r12, #1
61-
; CHECK-NEXT: cmp r12, #0
62-
; CHECK-NEXT: movwne r12, #1
63-
; CHECK-NEXT: subs r0, r0, r2
64-
; CHECK-NEXT: sbcs r0, r1, r3
65-
; CHECK-NEXT: mvnlt r12, #0
66-
; CHECK-NEXT: mov r0, r12
59+
; CHECK-NEXT: sub r0, r12, lr
6760
; CHECK-NEXT: pop {r11, pc}
6861
%1 = call i8 @llvm.scmp(i64 %x, i64 %y)
6962
ret i8 %1
@@ -74,24 +67,23 @@ define i8 @scmp_8_128(i128 %x, i128 %y) nounwind {
7467
; CHECK: @ %bb.0:
7568
; CHECK-NEXT: .save {r4, r5, r6, r7, r11, lr}
7669
; CHECK-NEXT: push {r4, r5, r6, r7, r11, lr}
77-
; CHECK-NEXT: ldr r5, [sp, #24]
78-
; CHECK-NEXT: mov r12, #0
70+
; CHECK-NEXT: ldr r4, [sp, #24]
71+
; CHECK-NEXT: mov r5, #0
7972
; CHECK-NEXT: ldr r6, [sp, #28]
80-
; CHECK-NEXT: subs r7, r5, r0
81-
; CHECK-NEXT: ldr lr, [sp, #32]
82-
; CHECK-NEXT: sbcs r7, r6, r1
83-
; CHECK-NEXT: ldr r4, [sp, #36]
84-
; CHECK-NEXT: sbcs r7, lr, r2
85-
; CHECK-NEXT: sbcs r7, r4, r3
86-
; CHECK-NEXT: movwlt r12, #1
87-
; CHECK-NEXT: cmp r12, #0
88-
; CHECK-NEXT: movwne r12, #1
89-
; CHECK-NEXT: subs r0, r0, r5
90-
; CHECK-NEXT: sbcs r0, r1, r6
91-
; CHECK-NEXT: sbcs r0, r2, lr
92-
; CHECK-NEXT: sbcs r0, r3, r4
93-
; CHECK-NEXT: mvnlt r12, #0
94-
; CHECK-NEXT: mov r0, r12
73+
; CHECK-NEXT: subs r7, r0, r4
74+
; CHECK-NEXT: ldr r12, [sp, #32]
75+
; CHECK-NEXT: sbcs r7, r1, r6
76+
; CHECK-NEXT: ldr lr, [sp, #36]
77+
; CHECK-NEXT: sbcs r7, r2, r12
78+
; CHECK-NEXT: sbcs r7, r3, lr
79+
; CHECK-NEXT: mov r7, #0
80+
; CHECK-NEXT: movwlt r7, #1
81+
; CHECK-NEXT: subs r0, r4, r0
82+
; CHECK-NEXT: sbcs r0, r6, r1
83+
; CHECK-NEXT: sbcs r0, r12, r2
84+
; CHECK-NEXT: sbcs r0, lr, r3
85+
; CHECK-NEXT: movwlt r5, #1
86+
; CHECK-NEXT: sub r0, r5, r7
9587
; CHECK-NEXT: pop {r4, r5, r6, r7, r11, pc}
9688
%1 = call i8 @llvm.scmp(i128 %x, i128 %y)
9789
ret i8 %1
@@ -100,14 +92,12 @@ define i8 @scmp_8_128(i128 %x, i128 %y) nounwind {
10092
define i32 @scmp_32_32(i32 %x, i32 %y) nounwind {
10193
; CHECK-LABEL: scmp_32_32:
10294
; CHECK: @ %bb.0:
103-
; CHECK-NEXT: mov r2, #0
10495
; CHECK-NEXT: cmp r0, r1
96+
; CHECK-NEXT: mov r0, #0
97+
; CHECK-NEXT: mov r2, #0
98+
; CHECK-NEXT: movwlt r0, #1
10599
; CHECK-NEXT: movwgt r2, #1
106-
; CHECK-NEXT: cmp r2, #0
107-
; CHECK-NEXT: movwne r2, #1
108-
; CHECK-NEXT: cmp r0, r1
109-
; CHECK-NEXT: mvnlt r2, #0
110-
; CHECK-NEXT: mov r0, r2
100+
; CHECK-NEXT: sub r0, r2, r0
111101
; CHECK-NEXT: bx lr
112102
%1 = call i32 @llvm.scmp(i32 %x, i32 %y)
113103
ret i32 %1
@@ -118,16 +108,15 @@ define i32 @scmp_32_64(i64 %x, i64 %y) nounwind {
118108
; CHECK: @ %bb.0:
119109
; CHECK-NEXT: .save {r11, lr}
120110
; CHECK-NEXT: push {r11, lr}
121-
; CHECK-NEXT: subs lr, r2, r0
111+
; CHECK-NEXT: subs lr, r0, r2
122112
; CHECK-NEXT: mov r12, #0
123-
; CHECK-NEXT: sbcs lr, r3, r1
113+
; CHECK-NEXT: sbcs lr, r1, r3
114+
; CHECK-NEXT: mov lr, #0
115+
; CHECK-NEXT: movwlt lr, #1
116+
; CHECK-NEXT: subs r0, r2, r0
117+
; CHECK-NEXT: sbcs r0, r3, r1
124118
; CHECK-NEXT: movwlt r12, #1
125-
; CHECK-NEXT: cmp r12, #0
126-
; CHECK-NEXT: movwne r12, #1
127-
; CHECK-NEXT: subs r0, r0, r2
128-
; CHECK-NEXT: sbcs r0, r1, r3
129-
; CHECK-NEXT: mvnlt r12, #0
130-
; CHECK-NEXT: mov r0, r12
119+
; CHECK-NEXT: sub r0, r12, lr
131120
; CHECK-NEXT: pop {r11, pc}
132121
%1 = call i32 @llvm.scmp(i64 %x, i64 %y)
133122
ret i32 %1
@@ -146,13 +135,8 @@ define i64 @scmp_64_64(i64 %x, i64 %y) nounwind {
146135
; CHECK-NEXT: subs r0, r2, r0
147136
; CHECK-NEXT: sbcs r0, r3, r1
148137
; CHECK-NEXT: movwlt r12, #1
149-
; CHECK-NEXT: cmp r12, #0
150-
; CHECK-NEXT: movwne r12, #1
151-
; CHECK-NEXT: cmp lr, #0
152-
; CHECK-NEXT: mvnne r12, #0
153-
; CHECK-NEXT: mvnne lr, #0
154-
; CHECK-NEXT: mov r0, r12
155-
; CHECK-NEXT: mov r1, lr
138+
; CHECK-NEXT: sub r0, r12, lr
139+
; CHECK-NEXT: asr r1, r0, #31
156140
; CHECK-NEXT: pop {r11, pc}
157141
%1 = call i64 @llvm.scmp(i64 %x, i64 %y)
158142
ret i64 %1

‎llvm/test/CodeGen/ARM/ucmp.ll

Lines changed: 48 additions & 64 deletions
Original file line numberDiff line numberDiff line change
@@ -4,14 +4,12 @@
44
define i8 @ucmp_8_8(i8 zeroext %x, i8 zeroext %y) nounwind {
55
; CHECK-LABEL: ucmp_8_8:
66
; CHECK: @ %bb.0:
7-
; CHECK-NEXT: mov r2, #0
87
; CHECK-NEXT: cmp r0, r1
8+
; CHECK-NEXT: mov r0, #0
9+
; CHECK-NEXT: mov r2, #0
10+
; CHECK-NEXT: movwlo r0, #1
911
; CHECK-NEXT: movwhi r2, #1
10-
; CHECK-NEXT: cmp r2, #0
11-
; CHECK-NEXT: movwne r2, #1
12-
; CHECK-NEXT: cmp r0, r1
13-
; CHECK-NEXT: mvnlo r2, #0
14-
; CHECK-NEXT: mov r0, r2
12+
; CHECK-NEXT: sub r0, r2, r0
1513
; CHECK-NEXT: bx lr
1614
%1 = call i8 @llvm.ucmp(i8 %x, i8 %y)
1715
ret i8 %1
@@ -20,14 +18,12 @@ define i8 @ucmp_8_8(i8 zeroext %x, i8 zeroext %y) nounwind {
2018
define i8 @ucmp_8_16(i16 zeroext %x, i16 zeroext %y) nounwind {
2119
; CHECK-LABEL: ucmp_8_16:
2220
; CHECK: @ %bb.0:
23-
; CHECK-NEXT: mov r2, #0
2421
; CHECK-NEXT: cmp r0, r1
22+
; CHECK-NEXT: mov r0, #0
23+
; CHECK-NEXT: mov r2, #0
24+
; CHECK-NEXT: movwlo r0, #1
2525
; CHECK-NEXT: movwhi r2, #1
26-
; CHECK-NEXT: cmp r2, #0
27-
; CHECK-NEXT: movwne r2, #1
28-
; CHECK-NEXT: cmp r0, r1
29-
; CHECK-NEXT: mvnlo r2, #0
30-
; CHECK-NEXT: mov r0, r2
26+
; CHECK-NEXT: sub r0, r2, r0
3127
; CHECK-NEXT: bx lr
3228
%1 = call i8 @llvm.ucmp(i16 %x, i16 %y)
3329
ret i8 %1
@@ -36,14 +32,12 @@ define i8 @ucmp_8_16(i16 zeroext %x, i16 zeroext %y) nounwind {
3632
define i8 @ucmp_8_32(i32 %x, i32 %y) nounwind {
3733
; CHECK-LABEL: ucmp_8_32:
3834
; CHECK: @ %bb.0:
39-
; CHECK-NEXT: mov r2, #0
4035
; CHECK-NEXT: cmp r0, r1
36+
; CHECK-NEXT: mov r0, #0
37+
; CHECK-NEXT: mov r2, #0
38+
; CHECK-NEXT: movwlo r0, #1
4139
; CHECK-NEXT: movwhi r2, #1
42-
; CHECK-NEXT: cmp r2, #0
43-
; CHECK-NEXT: movwne r2, #1
44-
; CHECK-NEXT: cmp r0, r1
45-
; CHECK-NEXT: mvnlo r2, #0
46-
; CHECK-NEXT: mov r0, r2
40+
; CHECK-NEXT: sub r0, r2, r0
4741
; CHECK-NEXT: bx lr
4842
%1 = call i8 @llvm.ucmp(i32 %x, i32 %y)
4943
ret i8 %1
@@ -54,16 +48,15 @@ define i8 @ucmp_8_64(i64 %x, i64 %y) nounwind {
5448
; CHECK: @ %bb.0:
5549
; CHECK-NEXT: .save {r11, lr}
5650
; CHECK-NEXT: push {r11, lr}
57-
; CHECK-NEXT: subs lr, r2, r0
51+
; CHECK-NEXT: subs lr, r0, r2
5852
; CHECK-NEXT: mov r12, #0
59-
; CHECK-NEXT: sbcs lr, r3, r1
53+
; CHECK-NEXT: sbcs lr, r1, r3
54+
; CHECK-NEXT: mov lr, #0
55+
; CHECK-NEXT: movwlo lr, #1
56+
; CHECK-NEXT: subs r0, r2, r0
57+
; CHECK-NEXT: sbcs r0, r3, r1
6058
; CHECK-NEXT: movwlo r12, #1
61-
; CHECK-NEXT: cmp r12, #0
62-
; CHECK-NEXT: movwne r12, #1
63-
; CHECK-NEXT: subs r0, r0, r2
64-
; CHECK-NEXT: sbcs r0, r1, r3
65-
; CHECK-NEXT: mvnlo r12, #0
66-
; CHECK-NEXT: mov r0, r12
59+
; CHECK-NEXT: sub r0, r12, lr
6760
; CHECK-NEXT: pop {r11, pc}
6861
%1 = call i8 @llvm.ucmp(i64 %x, i64 %y)
6962
ret i8 %1
@@ -74,24 +67,23 @@ define i8 @ucmp_8_128(i128 %x, i128 %y) nounwind {
7467
; CHECK: @ %bb.0:
7568
; CHECK-NEXT: .save {r4, r5, r6, r7, r11, lr}
7669
; CHECK-NEXT: push {r4, r5, r6, r7, r11, lr}
77-
; CHECK-NEXT: ldr r5, [sp, #24]
78-
; CHECK-NEXT: mov r12, #0
70+
; CHECK-NEXT: ldr r4, [sp, #24]
71+
; CHECK-NEXT: mov r5, #0
7972
; CHECK-NEXT: ldr r6, [sp, #28]
80-
; CHECK-NEXT: subs r7, r5, r0
81-
; CHECK-NEXT: ldr lr, [sp, #32]
82-
; CHECK-NEXT: sbcs r7, r6, r1
83-
; CHECK-NEXT: ldr r4, [sp, #36]
84-
; CHECK-NEXT: sbcs r7, lr, r2
85-
; CHECK-NEXT: sbcs r7, r4, r3
86-
; CHECK-NEXT: movwlo r12, #1
87-
; CHECK-NEXT: cmp r12, #0
88-
; CHECK-NEXT: movwne r12, #1
89-
; CHECK-NEXT: subs r0, r0, r5
90-
; CHECK-NEXT: sbcs r0, r1, r6
91-
; CHECK-NEXT: sbcs r0, r2, lr
92-
; CHECK-NEXT: sbcs r0, r3, r4
93-
; CHECK-NEXT: mvnlo r12, #0
94-
; CHECK-NEXT: mov r0, r12
73+
; CHECK-NEXT: subs r7, r0, r4
74+
; CHECK-NEXT: ldr r12, [sp, #32]
75+
; CHECK-NEXT: sbcs r7, r1, r6
76+
; CHECK-NEXT: ldr lr, [sp, #36]
77+
; CHECK-NEXT: sbcs r7, r2, r12
78+
; CHECK-NEXT: sbcs r7, r3, lr
79+
; CHECK-NEXT: mov r7, #0
80+
; CHECK-NEXT: movwlo r7, #1
81+
; CHECK-NEXT: subs r0, r4, r0
82+
; CHECK-NEXT: sbcs r0, r6, r1
83+
; CHECK-NEXT: sbcs r0, r12, r2
84+
; CHECK-NEXT: sbcs r0, lr, r3
85+
; CHECK-NEXT: movwlo r5, #1
86+
; CHECK-NEXT: sub r0, r5, r7
9587
; CHECK-NEXT: pop {r4, r5, r6, r7, r11, pc}
9688
%1 = call i8 @llvm.ucmp(i128 %x, i128 %y)
9789
ret i8 %1
@@ -100,14 +92,12 @@ define i8 @ucmp_8_128(i128 %x, i128 %y) nounwind {
10092
define i32 @ucmp_32_32(i32 %x, i32 %y) nounwind {
10193
; CHECK-LABEL: ucmp_32_32:
10294
; CHECK: @ %bb.0:
103-
; CHECK-NEXT: mov r2, #0
10495
; CHECK-NEXT: cmp r0, r1
96+
; CHECK-NEXT: mov r0, #0
97+
; CHECK-NEXT: mov r2, #0
98+
; CHECK-NEXT: movwlo r0, #1
10599
; CHECK-NEXT: movwhi r2, #1
106-
; CHECK-NEXT: cmp r2, #0
107-
; CHECK-NEXT: movwne r2, #1
108-
; CHECK-NEXT: cmp r0, r1
109-
; CHECK-NEXT: mvnlo r2, #0
110-
; CHECK-NEXT: mov r0, r2
100+
; CHECK-NEXT: sub r0, r2, r0
111101
; CHECK-NEXT: bx lr
112102
%1 = call i32 @llvm.ucmp(i32 %x, i32 %y)
113103
ret i32 %1
@@ -118,16 +108,15 @@ define i32 @ucmp_32_64(i64 %x, i64 %y) nounwind {
118108
; CHECK: @ %bb.0:
119109
; CHECK-NEXT: .save {r11, lr}
120110
; CHECK-NEXT: push {r11, lr}
121-
; CHECK-NEXT: subs lr, r2, r0
111+
; CHECK-NEXT: subs lr, r0, r2
122112
; CHECK-NEXT: mov r12, #0
123-
; CHECK-NEXT: sbcs lr, r3, r1
113+
; CHECK-NEXT: sbcs lr, r1, r3
114+
; CHECK-NEXT: mov lr, #0
115+
; CHECK-NEXT: movwlo lr, #1
116+
; CHECK-NEXT: subs r0, r2, r0
117+
; CHECK-NEXT: sbcs r0, r3, r1
124118
; CHECK-NEXT: movwlo r12, #1
125-
; CHECK-NEXT: cmp r12, #0
126-
; CHECK-NEXT: movwne r12, #1
127-
; CHECK-NEXT: subs r0, r0, r2
128-
; CHECK-NEXT: sbcs r0, r1, r3
129-
; CHECK-NEXT: mvnlo r12, #0
130-
; CHECK-NEXT: mov r0, r12
119+
; CHECK-NEXT: sub r0, r12, lr
131120
; CHECK-NEXT: pop {r11, pc}
132121
%1 = call i32 @llvm.ucmp(i64 %x, i64 %y)
133122
ret i32 %1
@@ -146,13 +135,8 @@ define i64 @ucmp_64_64(i64 %x, i64 %y) nounwind {
146135
; CHECK-NEXT: subs r0, r2, r0
147136
; CHECK-NEXT: sbcs r0, r3, r1
148137
; CHECK-NEXT: movwlo r12, #1
149-
; CHECK-NEXT: cmp r12, #0
150-
; CHECK-NEXT: movwne r12, #1
151-
; CHECK-NEXT: cmp lr, #0
152-
; CHECK-NEXT: mvnne r12, #0
153-
; CHECK-NEXT: mvnne lr, #0
154-
; CHECK-NEXT: mov r0, r12
155-
; CHECK-NEXT: mov r1, lr
138+
; CHECK-NEXT: sub r0, r12, lr
139+
; CHECK-NEXT: asr r1, r0, #31
156140
; CHECK-NEXT: pop {r11, pc}
157141
%1 = call i64 @llvm.ucmp(i64 %x, i64 %y)
158142
ret i64 %1

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