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mshockwavemshockwave
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Add more tests and address review comments
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‎llvm/lib/Transforms/Vectorize/LoopIdiomVectorize.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -507,10 +507,9 @@ Value *LoopIdiomVectorize::createPredicatedFindMismatch(
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auto *VectorLoadType = ScalableVectorType::get(LoadType, ByteCompareVF);
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auto *VF = ConstantInt::get(I32Type, ByteCompareVF);
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auto *IsScalable = ConstantInt::getBool(Builder.getContext(), true);
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Value *VL = Builder.CreateIntrinsic(Intrinsic::experimental_get_vector_length,
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{I64Type}, {AVL, VF, IsScalable});
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{I64Type}, {AVL, VF, Builder.getTrue()});
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Value *GepOffset = VectorIndexPhi;
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Value *VectorLhsGep =

‎llvm/test/CodeGen/RISCV/rvv/vfirst-byte-compare-index.ll

Lines changed: 178 additions & 0 deletions
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=riscv64 -mattr=+v < %s | FileCheck %s
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; Testing VFIRST patterns related to llvm/test/Transforms/LoopIdiom/RISCV/byte-compare-index.ll
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define i32 @compare_bytes_simple(ptr %a, ptr %b, i32 %len, i32 %n) {
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; CHECK-LABEL: compare_bytes_simple:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: sext.w a4, a3
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; CHECK-NEXT: addiw a5, a2, 1
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; CHECK-NEXT: bltu a4, a5, .LBB0_7
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; CHECK-NEXT: # %bb.1: # %mismatch_mem_check
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; CHECK-NEXT: slli a2, a5, 32
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; CHECK-NEXT: srli a2, a2, 32
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; CHECK-NEXT: slli a6, a3, 32
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; CHECK-NEXT: srli a6, a6, 32
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; CHECK-NEXT: add a7, a0, a2
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; CHECK-NEXT: add t0, a0, a6
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; CHECK-NEXT: srli a7, a7, 12
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; CHECK-NEXT: srli t0, t0, 12
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; CHECK-NEXT: bne a7, t0, .LBB0_7
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; CHECK-NEXT: # %bb.2: # %mismatch_mem_check
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; CHECK-NEXT: add a7, a1, a2
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; CHECK-NEXT: add t0, a1, a6
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; CHECK-NEXT: srli a7, a7, 12
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; CHECK-NEXT: srli t0, t0, 12
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; CHECK-NEXT: bne a7, t0, .LBB0_7
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; CHECK-NEXT: .LBB0_3: # %mismatch_vec_loop
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: sub a4, a6, a2
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; CHECK-NEXT: vsetvli a4, a4, e8, m2, ta, ma
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; CHECK-NEXT: add a5, a0, a2
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; CHECK-NEXT: vle8.v v8, (a5)
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; CHECK-NEXT: add a5, a1, a2
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; CHECK-NEXT: vle8.v v10, (a5)
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; CHECK-NEXT: vmsne.vv v12, v8, v10
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; CHECK-NEXT: vfirst.m a7, v12
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; CHECK-NEXT: mv a5, a4
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; CHECK-NEXT: bltz a7, .LBB0_5
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; CHECK-NEXT: # %bb.4: # %mismatch_vec_loop
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; CHECK-NEXT: # in Loop: Header=BB0_3 Depth=1
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; CHECK-NEXT: mv a5, a7
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; CHECK-NEXT: .LBB0_5: # %mismatch_vec_loop
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; CHECK-NEXT: # in Loop: Header=BB0_3 Depth=1
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; CHECK-NEXT: sext.w a7, a5
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; CHECK-NEXT: bne a7, a4, .LBB0_11
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; CHECK-NEXT: # %bb.6: # %mismatch_vec_loop_inc
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; CHECK-NEXT: # in Loop: Header=BB0_3 Depth=1
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; CHECK-NEXT: add a2, a2, a4
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; CHECK-NEXT: bne a2, a6, .LBB0_3
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; CHECK-NEXT: j .LBB0_9
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; CHECK-NEXT: .LBB0_7: # %mismatch_loop
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: slli a2, a5, 32
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; CHECK-NEXT: srli a2, a2, 32
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; CHECK-NEXT: add a6, a0, a2
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; CHECK-NEXT: lbu a6, 0(a6)
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; CHECK-NEXT: add a2, a1, a2
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; CHECK-NEXT: lbu a2, 0(a2)
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; CHECK-NEXT: bne a6, a2, .LBB0_10
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; CHECK-NEXT: # %bb.8: # %mismatch_loop_inc
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; CHECK-NEXT: # in Loop: Header=BB0_7 Depth=1
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; CHECK-NEXT: addiw a5, a5, 1
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; CHECK-NEXT: bne a4, a5, .LBB0_7
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; CHECK-NEXT: .LBB0_9: # %while.end
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; CHECK-NEXT: mv a0, a3
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB0_10:
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; CHECK-NEXT: mv a0, a5
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB0_11: # %mismatch_vec_loop_found
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; CHECK-NEXT: slli a5, a5, 32
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; CHECK-NEXT: srli a3, a5, 32
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; CHECK-NEXT: add a0, a2, a3
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; CHECK-NEXT: ret
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entry:
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%0 = add i32 %len, 1
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br label %mismatch_min_it_check
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mismatch_min_it_check: ; preds = %entry
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%1 = zext i32 %0 to i64
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%2 = zext i32 %n to i64
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%3 = icmp ule i32 %0, %n
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br i1 %3, label %mismatch_mem_check, label %mismatch_loop_pre
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mismatch_mem_check: ; preds = %mismatch_min_it_check
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%4 = getelementptr i8, ptr %a, i64 %1
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%5 = getelementptr i8, ptr %b, i64 %1
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%6 = ptrtoint ptr %5 to i64
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%7 = ptrtoint ptr %4 to i64
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%8 = getelementptr i8, ptr %a, i64 %2
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%9 = getelementptr i8, ptr %b, i64 %2
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%10 = ptrtoint ptr %8 to i64
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%11 = ptrtoint ptr %9 to i64
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%12 = lshr i64 %7, 12
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%13 = lshr i64 %10, 12
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%14 = lshr i64 %6, 12
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%15 = lshr i64 %11, 12
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%16 = icmp ne i64 %12, %13
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%17 = icmp ne i64 %14, %15
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%18 = or i1 %16, %17
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br i1 %18, label %mismatch_loop_pre, label %mismatch_vec_loop_preheader
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mismatch_vec_loop_preheader: ; preds = %mismatch_mem_check
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br label %mismatch_vec_loop
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mismatch_vec_loop: ; preds = %mismatch_vec_loop_inc, %mismatch_vec_loop_preheader
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%mismatch_vector_index = phi i64 [ %1, %mismatch_vec_loop_preheader ], [ %25, %mismatch_vec_loop_inc ]
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%avl = sub nuw nsw i64 %2, %mismatch_vector_index
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%19 = call i32 @llvm.experimental.get.vector.length.i64(i64 %avl, i32 16, i1 true)
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%20 = getelementptr inbounds i8, ptr %a, i64 %mismatch_vector_index
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%lhs.load = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr %20, <vscale x 16 x i1> shufflevector (<vscale x 16 x i1> insertelement (<vscale x 16 x i1> poison, i1 true, i64 0), <vscale x 16 x i1> poison, <vscale x 16 x i32> zeroinitializer), i32 %19)
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%21 = getelementptr inbounds i8, ptr %b, i64 %mismatch_vector_index
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%rhs.load = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr %21, <vscale x 16 x i1> shufflevector (<vscale x 16 x i1> insertelement (<vscale x 16 x i1> poison, i1 true, i64 0), <vscale x 16 x i1> poison, <vscale x 16 x i32> zeroinitializer), i32 %19)
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%mismatch.cmp = call <vscale x 16 x i1> @llvm.vp.icmp.nxv16i8(<vscale x 16 x i8> %lhs.load, <vscale x 16 x i8> %rhs.load, metadata !"ne", <vscale x 16 x i1> shufflevector (<vscale x 16 x i1> insertelement (<vscale x 16 x i1> poison, i1 true, i64 0), <vscale x 16 x i1> poison, <vscale x 16 x i32> zeroinitializer), i32 %19)
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%22 = call i32 @llvm.vp.cttz.elts.i32.nxv16i1(<vscale x 16 x i1> %mismatch.cmp, i1 false, <vscale x 16 x i1> shufflevector (<vscale x 16 x i1> insertelement (<vscale x 16 x i1> poison, i1 true, i64 0), <vscale x 16 x i1> poison, <vscale x 16 x i32> zeroinitializer), i32 %19)
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%23 = icmp ne i32 %22, %19
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br i1 %23, label %mismatch_vec_loop_found, label %mismatch_vec_loop_inc
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mismatch_vec_loop_inc: ; preds = %mismatch_vec_loop
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%24 = zext i32 %19 to i64
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%25 = add nuw nsw i64 %mismatch_vector_index, %24
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%26 = icmp ne i64 %25, %2
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br i1 %26, label %mismatch_vec_loop, label %mismatch_end
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mismatch_vec_loop_found: ; preds = %mismatch_vec_loop
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%ctz = phi i32 [ %22, %mismatch_vec_loop ]
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%mismatch_vector_index1 = phi i64 [ %mismatch_vector_index, %mismatch_vec_loop ]
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%27 = zext i32 %ctz to i64
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%28 = add nuw nsw i64 %mismatch_vector_index1, %27
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%29 = trunc i64 %28 to i32
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br label %mismatch_end
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mismatch_loop_pre: ; preds = %mismatch_mem_check, %mismatch_min_it_check
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br label %mismatch_loop
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mismatch_loop: ; preds = %mismatch_loop_inc, %mismatch_loop_pre
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%mismatch_index = phi i32 [ %0, %mismatch_loop_pre ], [ %36, %mismatch_loop_inc ]
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%30 = zext i32 %mismatch_index to i64
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%31 = getelementptr inbounds i8, ptr %a, i64 %30
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%32 = load i8, ptr %31, align 1
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%33 = getelementptr inbounds i8, ptr %b, i64 %30
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%34 = load i8, ptr %33, align 1
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%35 = icmp eq i8 %32, %34
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br i1 %35, label %mismatch_loop_inc, label %mismatch_end
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mismatch_loop_inc: ; preds = %mismatch_loop
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%36 = add i32 %mismatch_index, 1
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%37 = icmp eq i32 %36, %n
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br i1 %37, label %mismatch_end, label %mismatch_loop
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mismatch_end: ; preds = %mismatch_loop_inc, %mismatch_loop, %mismatch_vec_loop_found, %mismatch_vec_loop_inc
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%mismatch_result = phi i32 [ %n, %mismatch_loop_inc ], [ %mismatch_index, %mismatch_loop ], [ %n, %mismatch_vec_loop_inc ], [ %29, %mismatch_vec_loop_found ]
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br i1 true, label %byte.compare, label %while.cond
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while.cond: ; preds = %mismatch_end, %while.body
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%len.addr = phi i32 [ %len, %mismatch_end ], [ %mismatch_result, %while.body ]
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%inc = add i32 %len.addr, 1
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%cmp.not = icmp eq i32 %mismatch_result, %n
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br i1 %cmp.not, label %while.end, label %while.body
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while.body: ; preds = %while.cond
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%idxprom = zext i32 %mismatch_result to i64
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%arrayidx = getelementptr inbounds i8, ptr %a, i64 %idxprom
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%38 = load i8, ptr %arrayidx, align 1
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%arrayidx2 = getelementptr inbounds i8, ptr %b, i64 %idxprom
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%39 = load i8, ptr %arrayidx2, align 1
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%cmp.not2 = icmp eq i8 %38, %39
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br i1 %cmp.not2, label %while.cond, label %while.end
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byte.compare: ; preds = %mismatch_end
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br label %while.end
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while.end: ; preds = %byte.compare, %while.body, %while.cond
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%inc.lcssa = phi i32 [ %mismatch_result, %while.body ], [ %mismatch_result, %while.cond ], [ %mismatch_result, %byte.compare ]
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ret i32 %inc.lcssa
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}
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