[AArch64][GlobalISel] Materialize 64b FP immediates instead of loading if profitable.

This just mimics what the SDAG backend does.

Author: aemerson

llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp

@@ -2629,12 +2629,17 @@ bool AArch64InstructionSelector::select(MachineInstr &I) {
       default:
         llvm_unreachable("Unexpected destination size for G_FCONSTANT?");
       case 32:
-        // For s32, use a cp load if we have optsize/minsize.
-        if (!shouldOptForSize(&MF))
+      case 64: {
+        bool OptForSize = shouldOptForSize(&MF);
+        const auto &TLI = MF.getSubtarget().getTargetLowering();
+        // If TLI says that this fpimm is illegal, then we'll expand to a
+        // constant pool load.
+        if (TLI->isFPImmLegal(I.getOperand(1).getFPImm()->getValueAPF(),
+                              EVT::getFloatingPointVT(DefSize), OptForSize))
           break;
         [[fallthrough]];
+      }
       case 16:
-      case 64:
       case 128: {
         auto *FPImm = I.getOperand(1).getFPImm();
         auto *LoadMI = emitLoadFromConstantPool(FPImm, MIB);
@@ -2648,11 +2653,10 @@ bool AArch64InstructionSelector::select(MachineInstr &I) {
       }
       }
 
+      assert(DefSize == 32 || DefSize == 64 && "Unexpected const def size");
       // Either emit a FMOV, or emit a copy to emit a normal mov.
-      assert(DefSize == 32 &&
-             "Expected constant pool loads for all sizes other than 32!");
-      const Register DefGPRReg =
-          MRI.createVirtualRegister(&AArch64::GPR32RegClass);
+      const Register DefGPRReg = MRI.createVirtualRegister(
+          DefSize == 32 ? &AArch64::GPR32RegClass : &AArch64::GPR64RegClass);
       MachineOperand &RegOp = I.getOperand(0);
       RegOp.setReg(DefGPRReg);
       MIB.setInsertPt(MIB.getMBB(), std::next(I.getIterator()));

llvm/test/CodeGen/AArch64/arm64-fp-imm-size.ll

@@ -1,4 +1,5 @@
 ; RUN: llc < %s -mtriple=arm64-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=arm64-apple-darwin -global-isel | FileCheck %s
 
 ; CHECK: literal8
 ; CHECK: .quad  0x400921fb54442d18

llvm/test/CodeGen/AArch64/arm64-fp-imm.ll

@@ -1,4 +1,5 @@
 ; RUN: llc < %s -mtriple=arm64-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=arm64-apple-darwin -global-isel | FileCheck %s
 
 ; CHECK: literal8
 ; CHECK: .quad 0x400921fb54442d18

llvm/test/CodeGen/AArch64/fpimm.ll

@@ -1,6 +1,7 @@
 ; RUN: llc -mtriple=aarch64-linux-gnu                                                  -verify-machineinstrs < %s | FileCheck %s
 ; RUN: llc -mtriple=aarch64-apple-darwin -code-model=large                             -verify-machineinstrs < %s | FileCheck %s --check-prefixes=LARGE
 ; RUN: llc -mtriple=aarch64    -code-model=tiny                              -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-linux-gnu -global-isel                           -verify-machineinstrs < %s | FileCheck %s
 
 @varf32 = global float 0.0
 @varf64 = global double 0.0

llvm/test/CodeGen/AArch64/sme-disable-gisel-fisel.ll

@@ -135,15 +135,25 @@ define double @locally_streaming_caller_normal_callee(double %x) nounwind noinli
 }
 
 define double @normal_caller_to_locally_streaming_callee(double %x) nounwind noinline optnone {
-; CHECK-COMMON-LABEL: normal_caller_to_locally_streaming_callee:
-; CHECK-COMMON:       // %bb.0:
-; CHECK-COMMON-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-COMMON-NEXT:    bl locally_streaming_caller_normal_callee
-; CHECK-COMMON-NEXT:    adrp x8, .LCPI3_0
-; CHECK-COMMON-NEXT:    ldr d1, [x8, :lo12:.LCPI3_0]
-; CHECK-COMMON-NEXT:    fadd d0, d0, d1
-; CHECK-COMMON-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-COMMON-NEXT:    ret
+; CHECK-FISEL-LABEL: normal_caller_to_locally_streaming_callee:
+; CHECK-FISEL:       // %bb.0:
+; CHECK-FISEL-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-FISEL-NEXT:    bl locally_streaming_caller_normal_callee
+; CHECK-FISEL-NEXT:    adrp x8, .LCPI3_0
+; CHECK-FISEL-NEXT:    ldr d1, [x8, :lo12:.LCPI3_0]
+; CHECK-FISEL-NEXT:    fadd d0, d0, d1
+; CHECK-FISEL-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
+; CHECK-FISEL-NEXT:    ret
+;
+; CHECK-GISEL-LABEL: normal_caller_to_locally_streaming_callee:
+; CHECK-GISEL:       // %bb.0:
+; CHECK-GISEL-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-GISEL-NEXT:    bl locally_streaming_caller_normal_callee
+; CHECK-GISEL-NEXT:    mov x8, #4631107791820423168 // =0x4045000000000000
+; CHECK-GISEL-NEXT:    fmov d1, x8
+; CHECK-GISEL-NEXT:    fadd d0, d0, d1
+; CHECK-GISEL-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
+; CHECK-GISEL-NEXT:    ret
   %call = call double  @locally_streaming_caller_normal_callee(double %x) "aarch64_pstate_sm_body";
   %add = fadd double %call, 4.200000e+01
   ret double %add;