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[TTI] Support scalable offsets in getScalingFactorCost
1 parent b4a0fd4 commit 49ee8d7

10 files changed

+30
-21
lines changed

‎llvm/include/llvm/Analysis/TargetTransformInfo.h

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -835,8 +835,8 @@ class TargetTransformInfo {
835835
/// TODO: Handle pre/postinc as well.
836836
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
837837
int64_t BaseOffset, bool HasBaseReg,
838-
int64_t Scale,
839-
unsigned AddrSpace = 0) const;
838+
int64_t Scale, unsigned AddrSpace = 0,
839+
int64_t ScalableOffset = 0) const;
840840

841841
/// Return true if the loop strength reduce pass should make
842842
/// Instruction* based TTI queries to isLegalAddressingMode(). This is
@@ -1893,7 +1893,8 @@ class TargetTransformInfo::Concept {
18931893
virtual InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
18941894
int64_t BaseOffset,
18951895
bool HasBaseReg, int64_t Scale,
1896-
unsigned AddrSpace) = 0;
1896+
unsigned AddrSpace,
1897+
int64_t ScalableOffset) = 0;
18971898
virtual bool LSRWithInstrQueries() = 0;
18981899
virtual bool isTruncateFree(Type *Ty1, Type *Ty2) = 0;
18991900
virtual bool isProfitableToHoist(Instruction *I) = 0;
@@ -2404,10 +2405,10 @@ class TargetTransformInfo::Model final : public TargetTransformInfo::Concept {
24042405
}
24052406
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
24062407
int64_t BaseOffset, bool HasBaseReg,
2407-
int64_t Scale,
2408-
unsigned AddrSpace) override {
2408+
int64_t Scale, unsigned AddrSpace,
2409+
int64_t ScalableOffset) override {
24092410
return Impl.getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg, Scale,
2410-
AddrSpace);
2411+
AddrSpace, ScalableOffset);
24112412
}
24122413
bool LSRWithInstrQueries() override { return Impl.LSRWithInstrQueries(); }
24132414
bool isTruncateFree(Type *Ty1, Type *Ty2) override {

‎llvm/include/llvm/Analysis/TargetTransformInfoImpl.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -327,11 +327,11 @@ class TargetTransformInfoImplBase {
327327

328328
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
329329
int64_t BaseOffset, bool HasBaseReg,
330-
int64_t Scale,
331-
unsigned AddrSpace) const {
330+
int64_t Scale, unsigned AddrSpace,
331+
int64_t ScalableOffset) const {
332332
// Guess that all legal addressing mode are free.
333333
if (isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, Scale,
334-
AddrSpace))
334+
AddrSpace, /*I=*/nullptr, ScalableOffset))
335335
return 0;
336336
return -1;
337337
}

‎llvm/include/llvm/CodeGen/BasicTTIImpl.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -404,12 +404,14 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
404404

405405
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
406406
int64_t BaseOffset, bool HasBaseReg,
407-
int64_t Scale, unsigned AddrSpace) {
407+
int64_t Scale, unsigned AddrSpace,
408+
int64_t ScalableOffset) {
408409
TargetLoweringBase::AddrMode AM;
409410
AM.BaseGV = BaseGV;
410411
AM.BaseOffs = BaseOffset;
411412
AM.HasBaseReg = HasBaseReg;
412413
AM.Scale = Scale;
414+
AM.ScalableOffset = ScalableOffset;
413415
if (getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace))
414416
return 0;
415417
return -1;

‎llvm/lib/Analysis/TargetTransformInfo.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -532,9 +532,9 @@ bool TargetTransformInfo::prefersVectorizedAddressing() const {
532532

533533
InstructionCost TargetTransformInfo::getScalingFactorCost(
534534
Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg,
535-
int64_t Scale, unsigned AddrSpace) const {
535+
int64_t Scale, unsigned AddrSpace, int64_t ScalableOffset) const {
536536
InstructionCost Cost = TTIImpl->getScalingFactorCost(
537-
Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
537+
Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace, ScalableOffset);
538538
assert(Cost >= 0 && "TTI should not produce negative costs!");
539539
return Cost;
540540
}

‎llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -4160,10 +4160,9 @@ bool AArch64TTIImpl::preferPredicateOverEpilogue(TailFoldingInfo *TFI) {
41604160
return NumInsns >= SVETailFoldInsnThreshold;
41614161
}
41624162

4163-
InstructionCost
4164-
AArch64TTIImpl::getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
4165-
int64_t BaseOffset, bool HasBaseReg,
4166-
int64_t Scale, unsigned AddrSpace) const {
4163+
InstructionCost AArch64TTIImpl::getScalingFactorCost(
4164+
Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg,
4165+
int64_t Scale, unsigned AddrSpace, int64_t ScalableOffset) const {
41674166
// Scaling factors are not free at all.
41684167
// Operands | Rt Latency
41694168
// -------------------------------------------
@@ -4176,6 +4175,7 @@ AArch64TTIImpl::getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
41764175
AM.BaseOffs = BaseOffset;
41774176
AM.HasBaseReg = HasBaseReg;
41784177
AM.Scale = Scale;
4178+
AM.ScalableOffset = ScalableOffset;
41794179
if (getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace))
41804180
// Scale represents reg2 * scale, thus account for 1 if
41814181
// it is not equal to 0 or 1.

‎llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -408,7 +408,8 @@ class AArch64TTIImpl : public BasicTTIImplBase<AArch64TTIImpl> {
408408
/// If the AM is not supported, it returns a negative value.
409409
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
410410
int64_t BaseOffset, bool HasBaseReg,
411-
int64_t Scale, unsigned AddrSpace) const;
411+
int64_t Scale, unsigned AddrSpace,
412+
int64_t ScalableOffset) const;
412413
/// @}
413414

414415
bool enableSelectOptimize() { return ST->enableSelectOptimize(); }

‎llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2573,12 +2573,14 @@ bool ARMTTIImpl::preferPredicatedReductionSelect(
25732573
InstructionCost ARMTTIImpl::getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
25742574
int64_t BaseOffset,
25752575
bool HasBaseReg, int64_t Scale,
2576-
unsigned AddrSpace) const {
2576+
unsigned AddrSpace,
2577+
int64_t ScalableOffset) const {
25772578
TargetLoweringBase::AddrMode AM;
25782579
AM.BaseGV = BaseGV;
25792580
AM.BaseOffs = BaseOffset;
25802581
AM.HasBaseReg = HasBaseReg;
25812582
AM.Scale = Scale;
2583+
AM.ScalableOffset = ScalableOffset;
25822584
if (getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace)) {
25832585
if (ST->hasFPAO())
25842586
return AM.Scale < 0 ? 1 : 0; // positive offsets execute faster

‎llvm/lib/Target/ARM/ARMTargetTransformInfo.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -304,7 +304,8 @@ class ARMTTIImpl : public BasicTTIImplBase<ARMTTIImpl> {
304304
/// If the AM is not supported, the return value must be negative.
305305
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
306306
int64_t BaseOffset, bool HasBaseReg,
307-
int64_t Scale, unsigned AddrSpace) const;
307+
int64_t Scale, unsigned AddrSpace,
308+
int64_t ScalableOffset) const;
308309

309310
bool maybeLoweredToCall(Instruction &I);
310311
bool isLoweredToCall(const Function *F);

‎llvm/lib/Target/X86/X86TargetTransformInfo.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6710,7 +6710,8 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCost(
67106710
InstructionCost X86TTIImpl::getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
67116711
int64_t BaseOffset,
67126712
bool HasBaseReg, int64_t Scale,
6713-
unsigned AddrSpace) const {
6713+
unsigned AddrSpace,
6714+
int64_t ScalableOffset) const {
67146715
// Scaling factors are not free at all.
67156716
// An indexed folded instruction, i.e., inst (reg1, reg2, scale),
67166717
// will take 2 allocations in the out of order engine instead of 1

‎llvm/lib/Target/X86/X86TargetTransformInfo.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -254,7 +254,8 @@ class X86TTIImpl : public BasicTTIImplBase<X86TTIImpl> {
254254
/// If the AM is not supported, it returns a negative value.
255255
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
256256
int64_t BaseOffset, bool HasBaseReg,
257-
int64_t Scale, unsigned AddrSpace) const;
257+
int64_t Scale, unsigned AddrSpace,
258+
int64_t ScalableOffset) const;
258259

259260
bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1,
260261
const TargetTransformInfo::LSRCost &C2);

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